JP5671443B2 - 多結晶シリコン半導体素子及びその製造方法 - Google Patents

多結晶シリコン半導体素子及びその製造方法 Download PDF

Info

Publication number
JP5671443B2
JP5671443B2 JP2011256327A JP2011256327A JP5671443B2 JP 5671443 B2 JP5671443 B2 JP 5671443B2 JP 2011256327 A JP2011256327 A JP 2011256327A JP 2011256327 A JP2011256327 A JP 2011256327A JP 5671443 B2 JP5671443 B2 JP 5671443B2
Authority
JP
Japan
Prior art keywords
gate
transistor
line
source
drain
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
JP2011256327A
Other languages
English (en)
Japanese (ja)
Other versions
JP2012064966A (ja
Inventor
道 暎 金
道 暎 金
野口 隆
隆 野口
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Samsung Electronics Co Ltd
Original Assignee
Samsung Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Samsung Electronics Co Ltd filed Critical Samsung Electronics Co Ltd
Publication of JP2012064966A publication Critical patent/JP2012064966A/ja
Application granted granted Critical
Publication of JP5671443B2 publication Critical patent/JP5671443B2/ja
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/124Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362Active matrix addressed cells
    • G02F1/136286Wiring, e.g. gate line, drain line
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/417Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched
    • H01L29/41725Source or drain electrodes for field effect devices
    • H01L29/41733Source or drain electrodes for field effect devices for thin film transistors with insulated gate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/423Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
    • H01L29/42312Gate electrodes for field effect devices
    • H01L29/42316Gate electrodes for field effect devices for field-effect transistors
    • H01L29/4232Gate electrodes for field effect devices for field-effect transistors with insulated gate
    • H01L29/42384Gate electrodes for field effect devices for field-effect transistors with insulated gate for thin film field effect transistors, e.g. characterised by the thickness or the shape of the insulator or the dimensions, the shape or the lay-out of the conductor
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10OLED displays
    • H10K59/12Active-matrix OLED [AMOLED] displays
    • H10K59/131Interconnections, e.g. wiring lines or terminals

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Computer Hardware Design (AREA)
  • Ceramic Engineering (AREA)
  • Nonlinear Science (AREA)
  • Mathematical Physics (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Optics & Photonics (AREA)
  • Thin Film Transistor (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
JP2011256327A 2003-12-30 2011-11-24 多結晶シリコン半導体素子及びその製造方法 Active JP5671443B2 (ja)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
KR20030100618 2003-12-30
KR2003-100618 2003-12-30
KR1020040052982A KR100624428B1 (ko) 2003-12-30 2004-07-08 다결정 실리콘 반도체소자 및 그 제조방법
KR2004-052982 2004-07-08

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
JP2004380811A Division JP5144001B2 (ja) 2003-12-30 2004-12-28 多結晶シリコン半導体素子及びその製造方法

Publications (2)

Publication Number Publication Date
JP2012064966A JP2012064966A (ja) 2012-03-29
JP5671443B2 true JP5671443B2 (ja) 2015-02-18

Family

ID=37260209

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2011256327A Active JP5671443B2 (ja) 2003-12-30 2011-11-24 多結晶シリコン半導体素子及びその製造方法

Country Status (2)

Country Link
JP (1) JP5671443B2 (ko)
KR (1) KR100624428B1 (ko)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2011004723A1 (en) * 2009-07-10 2011-01-13 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and manufacturing method the same

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62229873A (ja) * 1986-03-29 1987-10-08 Hitachi Ltd 薄膜半導体装置の製造方法
JP3381184B2 (ja) * 1991-05-16 2003-02-24 株式会社半導体エネルギー研究所 絶縁ゲイト型電界効果半導体装置
JPH0918005A (ja) * 1995-06-30 1997-01-17 Citizen Watch Co Ltd 液晶表示装置用薄膜トランジスター
JP3361670B2 (ja) * 1995-11-13 2003-01-07 シャープ株式会社 半導体装置およびその製造方法
JP2002033483A (ja) * 2000-07-17 2002-01-31 Sony Corp 薄膜半導体装置の製造方法
JP4662647B2 (ja) * 2001-03-30 2011-03-30 シャープ株式会社 表示装置及びその製造方法

Also Published As

Publication number Publication date
KR20050069867A (ko) 2005-07-05
JP2012064966A (ja) 2012-03-29
KR100624428B1 (ko) 2006-09-19

Similar Documents

Publication Publication Date Title
US7768010B2 (en) Poly crystalline silicon semiconductor device and method of fabricating the same
US7300831B2 (en) Liquid crystal display device having driving circuit and method of fabricating the same
US8310612B2 (en) Thin film transistor liquid crystal display panel having gate line and data line formed on same layer and method of fabricating the same
CN1917155B (zh) 薄膜晶体管基板及其制造
US7638371B2 (en) Method for manufacturing thin film transistor display array with dual-layer metal line
US7642141B2 (en) Manufacturing method for display device
JP2001119029A (ja) 薄膜トランジスタ及びその製造方法及びそれを備えた液晶表示装置
JP2010003910A (ja) 表示素子
JP2005011920A (ja) 表示装置とその製造方法
TWI389314B (zh) 薄膜電晶體陣列面板及其製造方法
JP4984369B2 (ja) 画像表示装置及びその製造方法
CN1893116B (zh) 薄膜晶体管板及其制造方法
JP3799915B2 (ja) 電気光学装置の製造方法並びに半導体基板及び電気光学装置
WO2013163880A1 (zh) 阵列基板及其制造方法和显示装置
JP5671443B2 (ja) 多結晶シリコン半導体素子及びその製造方法
JPH098311A (ja) 薄膜半導体装置の製造方法とその構造
KR20060040167A (ko) 폴리 실리콘형 박막 트랜지스터 기판 및 제조 방법
JP2002176179A (ja) 電気光学装置および電気光学装置の製造方法、並びに半導体装置
JP5507159B2 (ja) 表示装置およびその製造方法
KR20080047773A (ko) 폴리실리콘 박막 트랜지스터 기판 및 그 제조 방법
KR101172015B1 (ko) 박막 트랜지스터 기판 및 그 제조 방법
JPH10209452A (ja) 薄膜トランジスタ及びその製造方法
KR100683142B1 (ko) 박막트랜지스터-액정표시장치의 제조방법
JP2007142059A (ja) 表示装置の製造方法
KR100391156B1 (ko) 액정표시장치용 어레이 패널 및 그 제조방법

Legal Events

Date Code Title Description
A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20121107

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20130830

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20130903

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20131203

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20140513

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20140813

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20141202

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20141219

R150 Certificate of patent or registration of utility model

Ref document number: 5671443

Country of ref document: JP

Free format text: JAPANESE INTERMEDIATE CODE: R150

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250