JP5656010B2 - ハードマスク膜を形成する方法およびハードマスク膜を成膜する装置 - Google Patents

ハードマスク膜を形成する方法およびハードマスク膜を成膜する装置 Download PDF

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JP5656010B2
JP5656010B2 JP2010256165A JP2010256165A JP5656010B2 JP 5656010 B2 JP5656010 B2 JP 5656010B2 JP 2010256165 A JP2010256165 A JP 2010256165A JP 2010256165 A JP2010256165 A JP 2010256165A JP 5656010 B2 JP5656010 B2 JP 5656010B2
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film
hard mask
plasma
forming
silicon carbide
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JP2011139033A (ja
JP2011139033A5 (ko
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ランガラジャン、ヴィシュワナサン
アンドリュー アントネリ、ジョージ
アンドリュー アントネリ、ジョージ
バナージ、アナンダ
ヴァン シュラヴェンディジク バート
ヴァン シュラヴェンディジク バート
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Novellus Systems Inc
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Novellus Systems Inc
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Priority claimed from US12/631,691 external-priority patent/US8247332B2/en
Priority claimed from US12/631,709 external-priority patent/US8178443B2/en
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Publication of JP2011139033A publication Critical patent/JP2011139033A/ja
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
    • H01L21/76807—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics for dual damascene structures
    • H01L21/76811—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics for dual damascene structures involving multiple stacked pre-patterned masks
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
    • H01L21/76807—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics for dual damascene structures
    • H01L21/76813—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics for dual damascene structures involving a partial via etch

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Plasma & Fusion (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Vapour Deposition (AREA)
  • Formation Of Insulating Films (AREA)
  • Drying Of Semiconductors (AREA)
  • Electrodes Of Semiconductors (AREA)
JP2010256165A 2009-12-04 2010-11-16 ハードマスク膜を形成する方法およびハードマスク膜を成膜する装置 Active JP5656010B2 (ja)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US12/631,691 US8247332B2 (en) 2009-12-04 2009-12-04 Hardmask materials
US12/631,709 2009-12-04
US12/631,709 US8178443B2 (en) 2009-12-04 2009-12-04 Hardmask materials
US12/631,691 2009-12-04

Publications (3)

Publication Number Publication Date
JP2011139033A JP2011139033A (ja) 2011-07-14
JP2011139033A5 JP2011139033A5 (ko) 2013-12-26
JP5656010B2 true JP5656010B2 (ja) 2015-01-21

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JP2010256165A Active JP5656010B2 (ja) 2009-12-04 2010-11-16 ハードマスク膜を形成する方法およびハードマスク膜を成膜する装置

Country Status (4)

Country Link
JP (1) JP5656010B2 (ko)
KR (2) KR101798235B1 (ko)
CN (2) CN102097364B (ko)
TW (2) TWI547997B (ko)

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KR20180069705A (ko) 2016-12-15 2018-06-25 도쿄엘렉트론가부시키가이샤 성막 방법, 붕소 막 및 성막 장치

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US10832904B2 (en) 2012-06-12 2020-11-10 Lam Research Corporation Remote plasma based deposition of oxygen doped silicon carbide films
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JP6111097B2 (ja) * 2013-03-12 2017-04-05 株式会社日立国際電気 半導体装置の製造方法、基板処理装置およびプログラム
JP6111106B2 (ja) * 2013-03-19 2017-04-05 株式会社日立国際電気 半導体装置の製造方法、基板処理装置およびプログラム
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JP6914143B2 (ja) * 2016-12-26 2021-08-04 東京エレクトロン株式会社 基板処理方法、基板処理装置、基板処理システム、基板処理システムの制御装置および半導体基板の製造方法
KR102020211B1 (ko) * 2017-01-09 2019-11-04 주식회사 테스 탄소 및/또는 보론를 포함하는 비정질 실리콘막의 형성 방법
JP7229929B2 (ja) * 2017-02-01 2023-02-28 アプライド マテリアルズ インコーポレイテッド ハードマスク応用向けのホウ素がドープされた炭化タングステン
JP6914107B2 (ja) * 2017-06-05 2021-08-04 東京エレクトロン株式会社 ボロン膜の除去方法
CN107742607B (zh) * 2017-08-31 2021-05-11 重庆中科渝芯电子有限公司 一种用icp干法刻蚀制作薄膜电阻的方法
US10474027B2 (en) * 2017-11-13 2019-11-12 Macronix International Co., Ltd. Method for forming an aligned mask
JP7049883B2 (ja) * 2018-03-28 2022-04-07 東京エレクトロン株式会社 ボロン系膜の成膜方法および成膜装置
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KR20180069705A (ko) 2016-12-15 2018-06-25 도쿄엘렉트론가부시키가이샤 성막 방법, 붕소 막 및 성막 장치
US10388524B2 (en) 2016-12-15 2019-08-20 Tokyo Electron Limited Film forming method, boron film, and film forming apparatus

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Publication number Publication date
CN105185707B (zh) 2018-06-01
CN105185707A (zh) 2015-12-23
TW201543574A (zh) 2015-11-16
KR20170126827A (ko) 2017-11-20
CN102097364A (zh) 2011-06-15
KR101907802B1 (ko) 2018-12-05
TWI505364B (zh) 2015-10-21
JP2011139033A (ja) 2011-07-14
TW201130050A (en) 2011-09-01
TWI547997B (zh) 2016-09-01
CN102097364B (zh) 2015-10-14
KR20110063386A (ko) 2011-06-10
KR101798235B1 (ko) 2017-11-15

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