JP5595555B2 - Imaging apparatus and imaging system - Google Patents

Description

  The present invention relates to an imaging device with an expanded dynamic range, and more particularly to a pixel structure that can add different functions to an active pixel sensor with an expanded dynamic range.

  An image sensor used for an input device of a digital camera is roughly divided into an active pixel sensor (hereinafter referred to as APS) in which an amplifying element is provided in a CCD and a pixel. In particular, among APSs, a sensor called a CMOS image sensor is now widely used.

  A rough comparison of the two is that the CCD is relatively easy to miniaturize, the drive is simple and the system is simple, and the CMOS image sensor is relatively power-saving, and An advantage is that speeding up is possible. Therefore, the CMOS sensor is suitable for applications such as a digital camera where high speed is required while saving power.

  A major challenge required for CMOS sensors is the realization of an in-plane synchronous electronic shutter and the expansion of the input dynamic range. The in-plane synchronized electronic shutter is a function of the CCD, and is a technology that can align the start time and end time of accumulation of all pixels in the plane.

  The input dynamic range expansion is a technique for increasing the maximum amount of incident light while maintaining the detection limit of the sensor in the dark, and is a function for making it possible to cope with a larger in-plane luminance difference.

  A technique related to the in-plane synchronous electronic shutter using the CMOS sensor is described in Patent Document 1, for example. The configuration will be described with reference to FIG.

  FIG. 1 shows a schematic diagram of a cross section of one pixel. In an image sensor in which such pixels are arranged in a matrix, each pixel starts to accumulate electric charge converted photoelectrically in the photodiode region 17 at the same time. Thereafter, the charge of the photodiode is simultaneously transferred to the charge holding region 21 and held at a certain timing. Thereafter, each row is scanned, and the charge in the charge holding region is converted into a voltage and read.

  Next, a technique relating to the expansion of the input dynamic range is described in Patent Document 2, for example. The configuration will be described with reference to FIG.

  FIG. 2 shows a conceptual diagram of the potential distribution of one pixel. In an image sensor in which such pixels are arranged in a matrix, the floating diffusion of each pixel has an additional capacitance MOS1 part and MOS2 part, and the charge conversion coefficient is switched according to the amount of charge of the photodiode. Designed to be As a result, even if the incident light quantity is at a level that would be saturated in a conventional CMOS sensor, voltage conversion can be performed so that the incident light quantity is not saturated.

JP 2002-368201 A JP 2000-165755 A

  However, in the example as described above, the problem is that the number of elements in a pixel always increases. If an additional capacitor is provided separately from the photodiode in order to expand the dynamic range, an increase in pixel area is inevitable. The photodiode needs to have both functions of photoelectric conversion and charge storage. If the area is increased, both of these performances can be improved.

  However, if the area of the photodiode is increased and an additional capacitor is provided in order to expand the dynamic range while maintaining the performance of both, the pixel area is further increased.

  With regard to photoelectric conversion efficiency, it is possible to improve the light collection efficiency by devising an optical system such as a lens and reduce the photodiode area. However, with regard to the amount of charge accumulation, if the photodiode area is reduced, the saturation charge amount Becomes smaller. Although it is conceivable to increase the impurity concentration in order to reduce the saturation charge amount, in this case, the depletion voltage increases and power consumption may increase.

  For example, in the example of FIG. 1, an area corresponding to the charge holding region is necessarily required by providing a charge holding region between the photodiode and the floating diffusion. When designing with the same amount of saturation charge and sensitivity as compared with the conventional CMOS sensor, the pixel area increases by the area of the charge holding region, and if the pixel area is designed to be constant, It is inevitable that the saturation charge amount is reduced as compared with the conventional case.

  Also in the example of FIG. 2, by adding a new capacity unit, an increase in the area is inevitable, and the same problem as described above occurs. In addition, the conventional dynamic range expansion technique cannot expand the dynamic range beyond the saturation charge amount of the photodiode, and further studies are required in this regard.

  An object of the present invention is to expand the dynamic range while suppressing an increase in pixel area, and another object is to provide a dynamic range expansion technique that is not limited by the saturation charge amount of a photodiode.

In view of the above problems, an imaging apparatus according to the present invention accumulates at least a part of signal charges generated by the photoelectric conversion unit separately from the photoelectric conversion unit that photoelectrically converts incident light and the photoelectric conversion unit. A charge storage region; a first transfer unit for transferring charges in the charge storage region to a floating diffusion region; a second transfer unit for transferring signal charges from the photoelectric conversion unit to the charge storage region; An amplification unit that amplifies a signal based on the signal charge transferred to the floating diffusion region, and an imaging device having an imaging region including a plurality of pixels, and an optical waveguide for condensing light onto the photoelectric conversion unit , A microlens for condensing light on the optical waveguide, and a light shielding portion disposed above the charge storage region, the first transfer unit, the second transfer unit, and the amplification unit And a part of the optical waveguide is arranged in the opening of the light shielding portion, and the plurality of pixels included in the imaging region are controlled so that the exposure time is simultaneously within the imaging surface. It is characterized by that .

  According to the imaging apparatus of the present invention, it is possible to expand the dynamic range while suppressing an increase in pixel area.

It is drawing explaining the conventional example. It is drawing explaining the conventional example. It is drawing explaining a 1st Example. It is drawing explaining a 2nd Example. 1 is a system diagram in which an imaging apparatus of the present invention is applied to a camera. It is drawing explaining the modification of a 1st Example.

  The imaging device of the present invention has a charge storage region for storing signal charges separately from the photodiode and the floating diffusion region, and performs photoelectric conversion by the photodiode and simultaneously transfers the signal charge to the charge storage region. It is. With such a configuration, it is possible to reduce the area of the photodiode, and it is possible to provide an imaging device in which the pixel area does not increase even if a charge accumulation region is separately provided and the dynamic range is expanded. Hereinafter, the features of the present invention will be described in detail with reference to examples.

(First embodiment)
A first embodiment will be described with reference to FIG. FIG. 3A shows an example of a pixel configuration according to this embodiment. Here, the conductivity type is not limited to this, and the P type and the N type may be reversed.

  Reference numeral 311 denotes a P-type semiconductor substrate or a P-type impurity region (second semiconductor region) provided on the semiconductor substrate. Reference numeral 310 denotes a P-type impurity region provided in 311. P-type impurity regions 310 and 311 are designed to have different impurity concentrations. For example, the P-type impurity region 311 is designed to have a lower impurity concentration than the P-type impurity region 310. Reference numeral 301 denotes an N-type impurity region (first semiconductor region), which forms a PN junction with the P-type impurity region 311 and functions as a photoelectric conversion element (photodiode PD). Reference numeral 302 denotes an optical waveguide for condensing light to 301. Reference numeral 303 denotes a microlens for guiding light to the optical waveguide.

  The signal charge is transferred from the PD to the charge storage unit 305 (ST) serving as a charge storage region via the first MOS transistor 304 (MOS1) functioning as a transfer unit. A control gate 306 having a MOS structure for controlling the channel potential is provided on the charge storage portion.

  Further, the signal charge is transferred from the charge storage unit 305 to the floating diffusion (FD) 308 via the second MOS transistor 307 functioning as a transfer unit. Here, after charge-voltage conversion in the FD, the amplified signal becomes the pixel output. Since they are the same principle as that of a normal CMOS sensor, description thereof is omitted here. Reference numeral 309 denotes a light shielding film that shields elements other than the photodiode.

  Reference numeral 312 denotes an N-type impurity region. An N-type impurity region 313 having a lower concentration than the N-type impurity region 312 is disposed between the 312 and the PD, and serves as an overflow drain (OFD) for discharging excess charges.

  Next, the operation of this pixel will be described with reference to FIGS. These figures are graphs showing the channel potential of each part in FIG.

  FIG. 3B shows the channel potential in the standard state where no accumulation is performed and the voltages of the respective parts are at the reset level.

  FIG. 3C shows the potential distribution of each part during accumulation. By applying a bias to the gate of MOS1, the potential is raised, and a potential magnitude relationship of PD <MOS1 <ST is created. By realizing such a potential distribution, the charge generated by the PD is promptly sent to the charge storage unit without being stored in the PD. Here, photoelectric conversion of incident light occurs at different positions and depths depending on the wavelength and incident angle. In this embodiment, at least the channel potential under the PD is configured to be the highest among the paths through which the generated charges can move. For this reason, even if charges are generated at a distance from the PD, they are efficiently collected in the PD and immediately transferred to the charge storage unit.

  FIG. 3D shows the channel potential in the signal charge holding period waiting until the accumulation is completed and the self-pixel is selected and read out. If the camera does not have a mechanical shutter, light is incident even during this period, and mixing of electrons caused by the light into signal electrons must be prevented. At this time, since the photocharge is discarded through the OFD having a relatively high channel potential, leakage into the signal electrons is prevented. That is, it can be said that the accumulation time is controlled by controlling the OFD.

  FIG. 3E shows a potential distribution when the potential of the channel portion of the second MOS transistor 307 is controlled and charges are transferred to the FD. All the electrons are sent to the FD. At that time, the control gate on the upper part of the storage unit is adjusted to form a potential distribution in which all electrons are sent to the FD.

  FIG. 3F shows a potential distribution after the transfer is completed. Here, the signal electrons are converted into a voltage by the FD, amplified as a signal voltage from the pixel, and read out.

  Here, by performing the accumulation start operation shown in FIG. 3C and the accumulation end operation shown in FIG. 3D at the MOS1 simultaneously, an electronic shutter in which all the pixels in the plane are synchronized can be realized. It becomes possible. Here, as shown in FIG. 3D, the ability to accumulate charges in the PD is inferior, so it is difficult to accumulate charges simultaneously with the retention of charges, but by providing a charge accumulation region separately. The saturation charge accumulation amount is set to a desired value.

  According to the present embodiment, since the conventional PD has the role of accumulating charges, the area cannot be reduced unnecessarily, but the area of the PD can be limited to the minimum size necessary for light reception. Become. Thereby, even if a function such as an electronic shutter is added, it is possible to design a pixel that minimizes an increase in area.

  Furthermore, since the light is guided to the PD by the optical waveguide, an in-plane synchronous electronic shutter can be realized with sufficient sensitivity even when the area of the PD is small.

  In addition, the potential distribution of the charge storage unit can be dynamically controlled by the gate, so the potential is high during storage and low during transfer to the FD. Can be realized.

  Further, a potential in the impurity region is formed so that charges are collected in the lower part of the PD. Therefore, even if charges are generated near the charge accumulation region or the FD, it is possible to increase the probability that charges are collected in the PD, and an in-plane synchronous electronic shutter can be realized while suppressing the effect of smear.

  Further, since the OFD is provided adjacent to the PD, the incident light in the signal charge holding period is immediately discharged as surplus electrons. Therefore, even when the amount of light after accumulation is relatively large, there is no problem such as smear, and an in-plane synchronous electronic shutter can be realized.

  Here, in this example, electrons have been described as carriers, but holes may be carriers. In that case, the potential relationship may be reversed as appropriate.

  In this example, the structure having an optical waveguide has been described. However, it is not essential to obtain the minimum effect of the present invention. Although the sensitivity is lowered due to inferior light collecting ability, it is possible to obtain an effect in terms of the saturation charge amount and the function of an in-plane synchronous electronic shutter.

  In this example, the structure including the first MOS transistor has been described. However, it is not essential to obtain the minimum effect of the present invention. If the first MOS transistor is not provided, the additional function of an in-plane synchronous electronic shutter is not realized, but it is possible to provide a storage unit that can control the potential separately from the photodiode. As a result, an effect of configuring a potential relationship suitable for reading and accumulation can be obtained.

  In this example, the structure including the OFD has been described. However, it is not essential to obtain the effect of this embodiment. If there is no OFD, smear may occur, but an in-plane synchronous electronic shutter can be realized while suppressing an increase in pixel area.

  In this example, a structure having two types of P-type impurity regions 310 and 311 has been described. However, it is not essential to obtain the effect of this embodiment. When there is only one type of P-type impurity region, smear or charge may leak from adjacent pixels, but an in-plane synchronous electronic shutter can be realized while suppressing an increase in pixel area. Further, the structure for preventing smear and leakage is not limited to this, and for example, a structure in which an N-type impurity region of PD is deeply formed in the semiconductor substrate may be used.

  In this example, the structure in which the control gate is provided above the charge storage portion has been described. However, it is not essential to obtain the effect of the present invention. By optimizing the saturation charge amount of signal electrons and the transfer from the charge storage portion to the FD, an in-plane synchronous electronic shutter can be realized while suppressing an increase in pixel area even without a control gate.

  Further, in this example, no explanation is given on how to configure the photodiode and the charge storage unit. For example, a configuration such as a buried photodiode or a buried channel is preferably employed because leakage current and fixed pattern noise can be reduced. Also, the saturation charge accumulation amount can be increased by setting the impurity concentration of the charge accumulation region higher than that of the semiconductor region of the same conductivity type as that of the charge accumulation region constituting the PD. Also, the saturation charge accumulation amount can be increased by making the depth of the charge accumulation region deeper than that of the semiconductor region of the same conductivity type as that of the charge accumulation region constituting the PD.

(Second embodiment)
A second embodiment will be described with reference to FIG. The same signal is added to the same part as in FIG. FIG. 4A is an example of a cross section of the pixel of the second embodiment.

    The difference from the example of FIG. 3 is that a set of a series of structures composed of charge storage regions and FDs is further arranged for one PD. The additional portion is configured around a third MOS transistor (MOS3) 401, a second charge storage unit (ST2) 402, and a fourth MOS transistor (MOS4) 403. The charge storage region is formed by a plurality of charge storage portions.

  Next, the operation of this pixel will be described with reference to FIGS. FIG. 4B shows a potential distribution when each part is set to a reset level when light is not irradiated. Accumulation starts in the state of FIG. At this time, β (current driving force, charge mobility) of the first MOS transistor is made different from β of the third MOS transistor. For example, here, β1 of the first MOS transistor is 10 times β3 of the third MOS transistor. By doing so, the charges generated by the PD are distributed to the first charge accumulation unit (ST) and the second charge accumulation unit (ST2) at a ratio of 10: 1. At this time, by setting the channel potential of the second MOS transistor higher than the channel potential of the PD, the second charge storage unit via the PD of surplus electrons when the first charge storage unit (ST) is saturated. Prevent re-inflow into

  FIG. 4C shows the accumulation end state. The channel potential of the first MOS transistor and the third MOS transistor is lowered to prevent the signal charge from flowing into the charge accumulation region. Since the description below is the same as in the first embodiment, the two types of signal charges accumulated here are sent to the FD, converted into a voltage, and read out to a signal processing circuit outside the pixel.

  According to the present embodiment, it is possible to obtain signal charges of two different sensitivities observed by the same PD by accumulating light in the two charge accumulating units immediately with different impedances without accumulating light in the PD. It becomes. In this example, since the signal is collected at a ratio of 10 to 1, the signal charge accumulated in the second charge accumulation unit is equivalent to the image measured with a sensitivity of 1/10, and the 20 dB dynamic range is expanded on the high luminance side. It becomes possible to do.

  Conventionally, in order to realize such a function, it is necessary to add a second charge storage unit in addition to PD and FD. In this embodiment, since the area of the PD can be greatly reduced, even if a second charge storage unit is newly provided, the increase in the area can be minimized.

  In addition, when a decrease in sensitivity due to a decrease in the amount of incident light becomes a problem, an optical waveguide may be provided together.

  Further, as shown in the first embodiment, an OFD may be provided separately. By doing so, it is possible to reduce the inflow of surplus charges into the first charge accumulation unit and the second charge accumulation unit when the photodiode is saturated after the accumulation is completed.

  In addition, in the case where leakage of charges generated in the substrate into the charge storage portion becomes a problem, by providing two types of P-type impurity regions having different impurity concentrations, charges are selectively collected in the PD and leaked. The dynamic range can be expanded while preventing this.

  In particular, by providing the first MOS transistor and the third MOS transistor, it is possible to control the end of the accumulation with an electric shutter instead of a mechanical shutter. As a result, an in-plane synchronous electronic shutter can be realized.

  The OFD of the charge storage unit has been described using the second MOS transistor. However, for example, the same structure as that separately added to the photodiode may be used. At that time, the channel potential of the OFD may be designed to be higher than the channel potential of the PD.

  Further, although the FD to which charges are transferred from the first charge accumulation unit and the second charge accumulation unit is the same here, it may be connected to another FD and read by another amplifier. The data of the first charge storage unit and the data of the second charge holding unit can be read at the same time, and the speed can be increased.

  Needless to say, a plurality of charge storage units may be provided.

  In addition, a buried photodiode structure, a buried MOS transistor structure, or the like may be employed in order to prevent the influence of a leak current, etc., which is omitted in detail for the structure of the PD and the charge storage unit in this embodiment.

(Modification of the first embodiment)
In the first embodiment, control is performed so that all electrons always flow from the photodiode to the charge storage portion from the start of storage. However, it suffices if all the electrons can be collected in the storage unit, and in this case, a method other than the above drive is also conceivable.

  When the above-described control is performed so that all electrons flow, the channel potential of the MOS 1 must be continuously raised over a long period of time during the accumulation period. At that time, since the interface of the MOS 1 is always depleted, dark current is generated due to generation and recombination of electrons via the interface state. The dark current causes random noise called shot noise and degrades the image quality in the dark part. Therefore, countermeasures against dark current are required according to the required specifications of the sensor or the operating temperature of use.

  On the other hand, the above problem can be solved by a device as shown in FIG. FIG. 6A differs from FIG. 3A in that 1101 MOS 1 is a MOS transistor having a buried channel structure. Another difference is that an overflow drain for sweeping excess electrons is explicitly provided like the MOS transistor 1102. FIG. 6B is a channel potential showing a state after reset. Here, the channel potential of MOS1 is different. According to the configuration of this example, even if a voltage that sufficiently turns off the MOS 1 is applied as shown in FIG. 3B, the channel potential is at a certain depth from the surface because of the buried channel structure. A high place appears.

  FIG. 6C shows the channel potential and the state of signal electrons during accumulation. Although the difference from FIG. 3C is slight, a certain amount of charge is blocked by the potential barrier created by the MOS 1 and accumulated in the photodiode, and the overflowed charge is sent as signal electrons to the accumulation unit. It is a point that.

  FIG. 6D shows the operation immediately before the end of accumulation. In the state of FIG. 6 (c), a part of the photocharge remains in the photodiode, and the remaining amount always has a variation, which affects the image quality. Immediately before the accumulation is completed, the MOS 1 is turned on, so that the channel potential is raised and all the signal electrons remaining in the photodiode are swept out to the accumulation unit, whereby all signal charges are sent to the accumulation unit. At this time, there is a concern that the surface of the MOS 1 becomes depleted and a dark current is generated. However, since the sweep operation is instantaneous, the value can be ignored.

  FIG. 6E, FIG. 6F, and FIG. 6G show the potential and electron state during reading standby, the pixel reading state, and the reading end state, respectively. The respective states are equivalent to those in FIGS. 3D, 3E, and 3F. Here, there is a difference that the OFD-MOS 1102 is controlled by the gate electrode to raise its channel potential, and surplus electrons are released, and the channel potential of the MOS1 is different. However, there is no difference in that charges are discarded so that surplus electrons are not mixed into the storage part.

(Example in which the imaging apparatus of the present invention is applied to a digital camera)
FIG. 8 shows an example of a circuit block when the imaging apparatus according to the present invention is applied to a camera. A shutter 1001 is provided in front of the taking lens 1002 and controls exposure. According to the imaging apparatus of the present invention, it is also possible to control the charge accumulation time by the electronic shutter without providing this mechanical shutter. The amount of light is controlled by the aperture 1003 as necessary, and an image is formed on the imaging device 1004. A signal output from the imaging device 1004 is processed by a signal processing circuit 1005 and converted from an analog signal to a digital signal by an A / D converter 1006. The output digital signal is further processed by a signal processing unit 1007. The processed digital signal is stored in the memory 1010 or sent to an external device through the external I / F 1013. The imaging apparatus 1004, the imaging signal processing circuit 1005, the A / D converter 1006, and the signal processing unit 1007 are controlled by a timing generation unit 1008, and the entire system is controlled by an overall control unit / calculation unit 1009. The timing generation unit can also control the transfer of charges from the photodiode of the present invention to the charge storage unit. In order to record an image on the recording medium 1012, the output digital signal is recorded through a recording medium control I / F unit 1011 controlled by the overall control unit / arithmetic unit.

301 Photodiode 305 Charge accumulation region 307 Transfer MOS transistor 308 Floating diffusion

Claims (8)

A photoelectric conversion unit that photoelectrically converts incident light, and a charge storage region that has a first conductivity type semiconductor region that stores at least a part of signal charges generated by the photoelectric conversion unit, separately from the photoelectric conversion unit, a first transfer unit for transferring the signal charges of the charge accumulation region to the floating diffusion region, a second transfer section for transferring signal charges from the photoelectric conversion unit to the charge storage region is transferred to the floating diffusion region An imaging unit having an imaging region including a plurality of pixels including an amplification unit that amplifies a signal based on the signal charge obtained,
The photoelectric conversion unit includes a first conductivity type first semiconductor region, and a second conductivity type second semiconductor region constituting a PN junction with the first semiconductor region ,
The imaging device includes a second conductivity type fourth semiconductor region disposed below the charge storage region and forming a PN junction with the first conductivity type semiconductor region,
The impurity concentration of the third semiconductor region is higher than the impurity concentration of the first semiconductor region,
The impurity concentration of the second semiconductor region is lower than the impurity concentration of the fourth semiconductor region,
An operation of a plurality of pixels included in the imaging region is controlled by an electronic shutter operation so that an exposure time is simultaneously within the imaging surface.   The imaging apparatus according to claim 1, wherein the second transfer unit is a buried channel type MOS transistor.   It has an overflow drain part for discharging a part of the electric charge generated by the photoelectric conversion part, and has a third transfer part for electrically controlling a potential barrier between the photoelectric conversion part and the overflow drain part. The image pickup apparatus according to claim 1, wherein the image pickup apparatus is an image pickup apparatus.   The charge generated after the transfer of the signal charge to the charge storage region is completed is transferred from the photoelectric conversion unit to the overflow drain unit by the third transfer unit. Imaging device.   5. The imaging apparatus according to claim 1, further comprising a unit that controls a potential distribution of the charge accumulation region on the charge accumulation region. The charge accumulation region has a plurality of charge accumulation units, and accumulates the signal charges separately in at least some of the charge accumulation units in the photoelectric conversion period. The imaging device according to any one of claims 1 to 5 , wherein The imaging apparatus according to claim 1, wherein the photoelectric conversion unit is an embedded photodiode. And wherein the imaging apparatus according to any one of claims 1 to 7, an optical system for focusing light to the imaging device, that a signal processing circuit for processing an output signal from the imaging device Imaging system.

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