KR100769563B1 - Image sensor for reducing current leakage - Google Patents

Abstract

The present invention relates to an image sensor, and more particularly to an image sensor for reducing the leakage current. An image sensor includes a plurality of unit pixels including a doped region for a photodiode and a transfer transistor, the unit pixel comprising: a semiconductor substrate of a first conductivity type; A transfer transistor formed on the semiconductor substrate; A photodiode formed on one side of the transfer transistor; And a floating diffusion region of a second conductivity type formed on the other side of the transfer transistor and spaced apart from the active region boundary by a predetermined interval. The floating diffusion region is spaced a predetermined distance from the boundary between the active region and the field region to reduce leakage current and improve image quality.

Image Sensor, Floating Diffusion Area, Active Area, Field Area, Leakage Current

Description

Image sensor for reducing current leakage

1 is an equivalent circuit diagram of a unit pixel having a four-transistor structure.

2 is a cross-sectional view of a photodiode, a floating diffusion region, and a transfer transistor in a unit pixel structure of an image sensor having such a structure.

3 is a configuration diagram of a CMOS image sensor of a horizontal scan method.

4 is a timing diagram showing an exposure time to the light and a readout time for each line (here, the row) of the pixel array according to the rolling shutter method.

5 is a layout diagram of a unit pixel of an image sensor of a rolling shutter method according to an exemplary embodiment of the present invention.

6 is a cross-sectional structure diagram illustrating a photodiode and a floating diffusion region of a unit pixel cut along the line A-A of FIG. 5.

FIG. 7 is a cross-sectional structure diagram illustrating a floating diffusion region of a unit pixel cut along a line B-B of FIG. 5. FIG.

FIG. 8 is a diagram showing an example of an image captured by an image sensor according to the timing diagram shown in FIG. 4.

9 is a timing diagram illustrating exposure time to light and readout time for each row of a pixel array of an image sensor according to a non-rolling shutter method according to another exemplary embodiment of the present invention.

<Description of the symbols for the main parts of the drawings>

510: n + ion implantation region

520: transfer transistor

530: reset transistor

PD: Photodiode

FD: Floating Diffusion Area

TECHNICAL FIELD The present invention relates to an image sensor, and more particularly, to an image sensor that reduces leakage current to improve image quality and prevents image lagging.

Image sensors are largely divided into CCD (charge coupled device) type and CMOS (Complementary Metal Oxide Semiconductor) type. CMOS image sensors are commonly referred to as CMOS image sensors (CIS).

The CCD-type image sensor moves electrons generated by light to the output unit by using a gate pulse. Therefore, there is external noise along the way, so the number of electrons does not change even if the voltage changes, so the noise does not affect the output signal. CMOS image sensors, on the other hand, convert electrons generated by light into voltage within each pixel and then output them through several CMOS switches. Therefore, the noise comes in the form of the original voltage, so the noise appears as it is in the output signal. In addition, the CCD image sensor has no difference between each pixel by passing the signal of all pixels through one output circuit. In the CMOS image sensor, since each pixel has an electronic-voltage conversion circuit, the unevenness of each pixel circuit It is reflected in the output signal as it is. Noise caused by such nonuniformity is called fixed pattern noise. Therefore, the CMOS image sensor is inferior to the CCD image sensor due to the noise of the fixed pattern and various noises.

On the other hand, the CMOS image sensor uses a standard process, but the CCD image sensor uses a special process, resulting in high wafer manufacturing costs. In addition, CCD type image sensor has various driving pulses such as 3.3V, 0V, -7V, 12V and so on, and the cost increases as the driving IC becomes special. CMOS image sensor has a single power supply such as 0 ~ 3.3V. Can be driven by In addition, the CMOS image sensor can be digitally converted in a chip and can process image signals, but the CCD image sensor is difficult to make one-chip of circuits other than the image sensor.

CMOS image sensor has advantages such as low manufacturing cost, low power consumption, and integration with peripheral circuits compared to CCD image sensor.

1 is an equivalent circuit diagram of a unit pixel having a four-transistor structure. Referring to FIG. 1, one photodiode PD and four transistors are included. The four transistors are transfer transistors (Tx) for transporting photocharges generated from the photodiode PD to a floating diffusion node (FD), which set the potential of the node to a desired value and discharge the charges to float. A reset transistor (Rx) for resetting the diffusion region (FD), a drive transistor (Dx) serving as a source follower buffer amplifier, and a select transistor for addressing by switching (Sx; Select Transistor). Outside the unit pixel 100, a load transistor LD is applied to which a bias voltage Vb is applied to read an output signal.

2 is a cross-sectional view of a photodiode, a floating diffusion region, and a transfer transistor in a unit pixel structure of an image sensor having such a structure.

An isolation layer 212 defining an active region and a field region is formed on the semiconductor substrate 211. In this case, the semiconductor substrate 211 may have a structure in which a substrate having a high concentration and an epitaxial layer having a low concentration are stacked.

Various gate electrodes, including the gate electrode 213 of the transfer transistor, are patterned. Subsequently, an n-type ion implantation region 214 for photodiode aligned on one side of the gate electrode 213 is formed in the semiconductor substrate 211 using an appropriate ion implantation mask.

The spacers 216 are formed on both sidewalls of the gate electrode 213 of the transfer transistor, and a p-type ion implantation process aligning the spacers 216 is performed to form a p-type ion implantation region 215 to form a photodiode. Complete

Next, the floating diffusion region 218 is formed on the other side of the gate electrode 213 of the transfer transistor. Generally, a p-type substrate is used in a CMOS image sensor, and a high concentration n-type ion implantation region is formed in a p-type substrate to form a pn junction structure as a floating diffusion region. The depletion layer capacitance formed by the impurity concentration difference of the pn junction is used as the floating diffusion region.

In this case, the floating diffusion region 218 is close to the isolation layer 212 defining the active region and the field region. As the isolation layer 212, a trench formed by a FOX or Shallow Trench Isolation (STI) process is used. Here, the STI process separates the active region and the field region by forming a trench and then filling an insulator. There is a high concentration of p-type region in the lower portion of the trench, and as the floating diffusion region 218, which is a high concentration of n-type ion implantation region, is adjacent, a lot of leakage current is generated. In addition, at the trench edges, a large amount of leakage current is generated due to material stress, which causes a problem in that image quality from an image sensor is not good.

Accordingly, the present invention provides an image sensor that separates the floating diffusion region by a predetermined distance from the boundary between the active region and the field region to reduce leakage current and improve image quality.

In addition, the present invention provides an image sensor that does not generate an image lagging phenomenon for a moving object by exposing the pixels of all rows of the pixel array to light at the same time.

In addition, the present invention provides an image sensor capable of preventing the occurrence of an image lagging phenomenon by storing the photocharge generated in the photodiode in the floating diffusion region.

In addition, the present invention provides an image sensor that allows the floating diffusion region to act as a storage region by reducing leakage current by providing a predetermined distance between the floating diffusion region and the field region in the manufacturing process of each unit pixel of the image sensor. .

Other objects of the present invention will be readily understood through the following description.

In order to achieve the above objects, according to an aspect of the present invention, an image sensor including a plurality of unit pixels having a doped region for a photodiode and a transfer transistor, the unit pixel comprises: a semiconductor substrate of a first conductivity type; A transfer transistor formed on the semiconductor substrate; A photodiode formed on one side of the transfer transistor; And a floating diffusion region of a second conductivity type formed on the other side of the transfer transistor and spaced apart from the active region boundary by a predetermined interval.

Preferably, the method further comprises a second implantation ion implantation region having a lower concentration than the floating diffusion region, wherein the floating diffusion region is formed in the ion implantation region.

In addition, the plurality of unit pixels may expose the photodiode to external light for the same time at the same time.

Here, the plurality of unit pixels may simultaneously turn on the transfer transistor.

Preferably, the first conductivity type and the second conductivity type may be complementary p-type and n-type.

The photodiode may further include an ion implantation region for a photoconductor of a second conductivity type formed inside the semiconductor substrate of the first conductivity type; And an ion implantation region for the photodiode of the second conductivity type and an ion implantation region for the photodiode of the first conductivity type formed under the surface of the semiconductor substrate.

Hereinafter, exemplary embodiments of an image sensor according to the present invention will be described in detail with reference to the accompanying drawings. In describing the present invention, if it is determined that the detailed description of the related known technology may unnecessarily obscure the subject matter of the present invention, the detailed description thereof will be omitted. Numbers (eg, first, second, etc.) used in the description of the present specification are merely identification symbols for sequentially distinguishing identical or similar entities.

3 is a configuration diagram of a CMOS image sensor of a horizontal scan method.

Referring to FIG. 3, the CMOS image sensor may include a pixel array 310, a column decoder 320, a row decoder 330, a signal readout circuit 340, an A / D converter 350, and a timing control circuit 360. It includes.

The pixel array 310 includes one or more unit pixels 310a. In this example, 6 ㅧ 6 unit pixels 310a constitute the pixel array 310. The unit pixel 310a includes six rows and six columns.

The pixel array 310 is connected to a row decoder 330 so that any one row in the horizontal direction is selected sequentially or according to a predetermined order. There are six unit pixels for one selected row, and each unit pixel is selected by the column decoder 320 sequentially or in a predetermined order. Then, the signal reading circuit 340 reads the electric signal converted from the optical signal in the selected unit pixel, and analog-to-digital conversion by the A / D converter 350 to output the digitized output signal to the outside of the chip.

The selection of unit pixels by the row decoder 330 and the column decoder 320 is controlled by a control signal generated in the timing control circuit 360.

The ability to randomly start and stop exposure in the image sensor is called shuttering. In order to realize uniform electronic shuttering in a CMOS image sensor, a large number of transistors are required for each unit pixel. In the line scan CMOS image sensor, electronic shuttering does not compromise the fill factor since the transistors acting as shutters can be located near the active region of each unit pixel. For uniform electronic shuttering, opaque shutter transistors must be located in areas other than the optically sensitive area of each pixel, thereby sacrificing the fill factor.

One way to solve this is a nonuniform shutter, called a rolling shutter, to expose different lines of the pixel array 110 at different times. Another method is a uniform synchronous shutter, called a nonrolling shutter, which exposes all the pixels of the pixel array 110 at one time. The movement of the object is detected by the image sensor without any distortion.

Hereinafter, the separation of the floating diffusion region in the image sensor by the rolling shutter method and the non-rolling shutter method will be described.

<Example 1>

FIG. 4 is a timing diagram illustrating an exposure time and a readout time for light for each line (here, a row) of the pixel array 310 according to the rolling shutter method.

Each unit pixel 310a of the image sensor 300 exposes light to each row in order to continuously read an image, and immediately reads an electric signal converted from the light value (optical signal).

Referring to FIG. 4, the unit pixels 310a of each row are sequentially exposed to the Nth frame from the first row R1 to the sixth row R6 for a predetermined time, and then immediately read out. Here, the time and timing of exposing the photodiode PD to light in the unit pixel 310a are read from the time when the reset transistor Rx of the unit pixel 310a removes all the charges in the photodiode PD. It is determined by the time point.

5 is a layout view of a unit pixel of a rolling shutter type image sensor according to an exemplary embodiment of the present invention, and FIG. 6 is a cross-sectional view illustrating a photodiode and a floating diffusion region of a unit pixel cut along line AA of FIG. 5. 7 is a cross-sectional view illustrating a floating diffusion region of a unit pixel cut along a line BB of FIG. 5.

Referring to FIG. 5, an active region in a unit pixel is a region defined by a thick solid line. The field region is an outer region of the active region, which is separated from the active region by the device isolation film.

The gate 523 of the transfer transistor 520, the gate 533 of the reset transistor 530, the gate 543 of the drive transistor 540, and the gate 553 of the select transistor 550 respectively form an upper portion of the active region. It is arranged in a transverse form. PD is the photodiode portion and FD is the floating diffusion region.

In the pixel array 310 of the image sensor 300, when each unit pixel 310a transmits a light charge according to the timing diagram shown in FIG. 4, a photoelectric diffusion floating region FD, that is, an n + ion implantation region ( Pass 510. The n + ion implantation region 510 is formed spaced apart from the lines L1 and L2 representing the boundary between the active region and the field region by predetermined intervals OS1 and OS2.

In the case where photocharges pass through the n + ion implantation region 510 or photocharges are stored in the n + ion implantation region 510, charge or hole carriers are generated between the field regions and the recombination sites of the charges or holes are generated. To increase leakage current. When the leakage current is large, a change in the amount of photocharge passing through or stored in the n + ion implantation region 510 occurs, and distortion occurs in an image, thereby causing a problem of deterioration in image quality. Accordingly, the n + ion implantation region 510 is generated at regular intervals to minimize the leakage current between the field region.

Since the n + ion implantation region 510 of the floating diffusion region FD functions to connect the transfer transistor 520 and the reset transistor 530, the gate 523 and the reset transistor 530 of the transfer transistor 520 may be formed. It is preferable to allow the gate 533 to overlap with a predetermined portion.

In addition, the floating diffusion region FD may be formed by a low concentration of n− ion implantation region (not shown) and a high concentration of n + ion implantation region 510. That is, the n + ion implantation region 510 is formed to be spaced apart from the lines L1 and L2 representing the boundary between the active region and the field region by a predetermined interval OS1 and OS2, and surrounds the n + ion implantation region 510. n-regions may be formed. In this case, the n- region may overlap a portion of the gate 623 of the transfer transistor 620 and the gate 633 of the reset transistor 630.

Referring to FIG. 6, a general formation process of the photodiode PD is as follows. On the high concentration p-type substrate, the low concentration p-type epitaxial layer 600 is grown by an epitaxial process. This is to increase the ability of the low voltage photodiode to collect photocharges and further improve the photosensitivity by forming a large and deep depletion region in the photodiode PD.

 A gate insulating film 610 and a gate 523 are formed on a portion of the p-type epi layer 600 for the transfer transistor 520 of FIG. 5. The gate insulating layer 610 may be formed of a thermal oxide film grown by a thermal oxidation process. The gate 523 may be formed by depositing a conductive layer, for example, a high concentration polycrystalline silicon layer, on the gate insulating layer 610 to a desired thickness. Alternatively, it is also possible to form a high concentration polycrystalline silicon layer and a silicide layer thereon. Although not shown in FIG. 6, the same applies to the gate insulating layer and the gate formation for the reset transistor 530, the drive transistor 540, and the select transistor 550 in addition to the transfer transistor 520.

The spacers 615 of the insulating layer are formed on both sidewalls of the gate 523. An n-type region 620 for a photodiode and a p-type region 625 for a photodiode are formed in a portion of the p-type epi layer 600 for the photodiode region PD. The p-type region 625 for the photodiode is formed on the n-type region 620 for the photodiode.

In addition, the floating diffusion region FD is formed on the p-type epi layer 600 and spaced apart from the n-type / p-type region 620/625 for the photodiode with the gate 523 of the transfer transistor 520 interposed therebetween. do. The floating diffusion region FD may be formed of only the n + ion implantation region 510 or may further include the n− ion implantation region 650. When the n-ion implantation region 650 is further included, the n + ion implantation region 510 is formed on the n− ion implantation region 650.

The n + ion implantation region 510 is formed spaced apart by OS1 from L2 (that is, the boundary between the active region and the field region), which is one of the lines representing the active region of the floating diffusion region FD. The L2 line is formed of an isolation layer (a trench formed by a FOX or Shallow Trench Isolation (STI) process). Here, the STI process separates the active region and the field region by forming a trench and then filling an insulator.

When a reverse bias is applied between the n-type region 620 for the photodiode and the p-type region 625 for the photodiode, the n-type region 620 for the photodiode is completely depletioned. The depletion region extends to the p-type region 625 for the photodiode. For use in image reproduction, such depletion regions accumulate and store photocharges generated by incident light. When the transfer transistor 520 is turned on, the stored photocharges are moved to the n + ion implantation region 510 of the floating diffusion region FD.

In this case, the n + ion implantation regions 510 are spaced apart by a predetermined interval (“OS1” in FIG. 6) to pass or store the photocharges and reduce leakage current with the field region.

Referring to FIG. 7, in the floating diffusion region FD, the n + ion implantation region 510 is spaced apart from the L1 line and the L2 line by OS1 and OS2, respectively, indicating a boundary between the active region and the field region of the floating diffusion region FD. It is formed.

It is preferable that OS1 or OS2, which are spaced apart from each other shown in FIGS. 6 and 7, is 0.05 to 0.2 μm. When the n + ion implantation region 510 is adjacent to the device isolation layer (FOX or trench), the leakage current increases. In general, since there is a p + layer under the device isolation layer, as the n + ion implantation region 510 is adjacent to each other, an n + / p + junction is formed to increase leakage current. In addition, in the trench by the STI process, there is a problem in that leakage current due to material stress increases at the trench edge portion. Therefore, by separating the device isolation layer from the same or similar to about 0.1 μm, the depth at which the n + ion implantation region 510 is formed, the leakage current is significantly reduced, and the image quality of the image is improved.

In the rolling shutter method described above, since the readout operation is sequentially performed for each row, the time A is the timing of exposure to light even though the first row R1 and the sixth row R6 are in the same frame. There is a difference (see FIG. 4). In this case, there is no big problem when the subject is stationary, but when the subject is moving, image lagging occurs and image distortion occurs.

FIG. 8 is a diagram illustrating an example of an image photographed by the image sensor 300 according to the timing diagram illustrated in FIG. 4. 8A is an image photographed when the subject is stationary, and FIG. 8B is an image photographed when the subject is rotated in a clockwise direction.

It can be seen that 'G' near the center of the screen has a rectangular shape (see 810 of FIG. 8A). However, when the subject is rotated, the 'G' in the captured image has a parallelogram shape in which the lower side is biased to the right than the upper side (see 820 of FIG. 8B). This is an image lagging phenomenon that occurs because the image sensor scans row by row. That is, as the lower row is scanned after all the upper rows are scanned, distortion of an image of a moving subject occurs. Therefore, the image sensor of the present invention by the non-rolling shutter method for preventing image lagging when the subject is moving will be described below.

<Example 2>

FIG. 9 is a timing diagram illustrating an exposure time and a readout time for light for each row of the pixel array 310 of the image sensor 300 according to a non-rolling shutter method according to another exemplary embodiment of the present invention. In this embodiment, the image sensor follows the structure shown in FIG. 3, and each unit pixel constituting the pixel array of the image sensor follows the equivalent circuit diagram of the 4-transistor structure shown in FIG. 1. Where R1, R2,... , R6 denotes the first row, second row,... Which constitute the pixel array 310. , Means a sixth row (see FIG. 3).

9, the first row R1, the second row R2,... The unit pixels included in the sixth row R6 expose the photodiode PD to light for all rows at the same time with respect to the image of the same frame (n-th). That is, since the exposure to light is performed at the same time for each row, the image lagging phenomenon according to the exposure time for each row does not occur as shown in FIG.

In order to make the unit pixel 310a operated by the timing diagram illustrated in FIG. 9, a storage area for storing the photocharges generated by the photodiode PD is required, and the floating diffusion area FD is used as the storage area. .

Each unit pixel generates photocharges corresponding to pixel values of the Nth frame image in the photodiode PD. When the transfer transistor Tx is turned on, the photocharge is moved to the floating diffusion region FD. Here, the timing of movement of the photocharges to the floating diffusion region FD according to the photocharge generation and transfer transistor Tx turn-on of each unit pixel PD is the same regardless of the row order. In other words, the photocharges are moved from the photodiode PD to the floating diffusion region FD on a frame-by-frame basis instead of moving the photocharges row by row.

The timing of the readout for signal processing in the floating diffusion region FD differs for each row. Scanning for each row, the photocharge corresponding to the corresponding frame image of the entire pixel array 310 is received.

Therefore, the first row R1 is at the first readout time RO1 and the second row R2 is at the second readout time RO2. The sixth row R6 is read out at the sixth readout time RO6. The first to sixth read-out times R01 to RO6 are sequentially consecutive in the order of each row, and do not overlap each other.

Further, after the readout time in the last row of the pixel array 310 (in this embodiment, the sixth row R1), the photocharge corresponding to the image of the next frame (N + 1 th) becomes the floating diffusion region FD. Must be delivered). That is, signal charges are generated in the photodiode PD for the N + 1th frame image in the sixth row R6, and photocharge transfer from the photodiode PD to the floating diffusion region FD is performed. This means that the photocharges stored in the floating diffusion region FD with respect to the Nth frame image before (end of N + 1 shown in FIG. 6) should be read out RO.

Layout diagrams and cross-sectional views of the image sensor according to the present embodiment are the same as those shown in FIGS. 5 to 7. However, in the present exemplary embodiment, the floating diffusion region FD of the image sensor serves as a storage region that stores photocharges generated by the photodiode PD for a predetermined time. Therefore, the non-rolling shutter type image sensor is made possible by reading out the photocharges stored in the floating diffusion region FD when the readout time for each row is reached.

The separation of the n + ion implantation region 510 and the formation method thereof among the floating diffusion regions FD of the image sensor are the same as described above with reference to FIGS.

As described above, the image sensor according to the present invention separates the floating diffusion region by a predetermined distance from the boundary between the active region and the field region to reduce the leakage current and improve the image quality of the image.

In addition, the image lagging phenomenon does not occur for a moving object by exposing the pixels of all rows of the pixel array to light at the same time.

In addition, by storing the photocharge generated in the photodiode in the floating diffusion region, it is possible to prevent the occurrence of the image lagging phenomenon.

In addition, in the manufacturing process of each unit pixel of the image sensor, a predetermined gap is provided between the floating diffusion region and the field region to reduce the leakage current so that the floating diffusion region can serve as a storage region.

Although the above has been described with reference to a preferred embodiment of the present invention, those skilled in the art to which the present invention pertains without departing from the spirit and scope of the present invention as set forth in the claims below It will be appreciated that modifications and variations can be made.

Claims (6)

An image sensor comprising a plurality of unit pixels including a doped region for a photodiode and a transfer transistor, The unit pixel is A semiconductor substrate of a first conductivity type; A transfer transistor formed on the semiconductor substrate; A photodiode formed on one side of the transfer transistor; A floating diffusion region of a second conductivity type formed on the other side of the transfer transistor and spaced apart from an active region boundary by a predetermined interval; And A second conductivity type ion implantation region having a lower concentration than the floating diffusion region, And the floating diffusion region is formed in the ion implantation region. delete The method of claim 1, The plurality of unit pixels are image sensors that the photodiode is exposed to external light for the same time at the same time. The method of claim 3, The plurality of unit pixels are image sensors that the transfer transistor is turned on at the same time. The method of claim 1, The first conductivity type and the second conductivity type are complementary p-type and n-type image sensors. The method of claim 1, The photodiode is An ion implantation region for a second conductive photodiode formed in the first conductive semiconductor substrate; And And an ion implantation region for photodiodes of the second conductivity type and an ion implantation region for photodiodes of the first conductivity type formed under the surface of the semiconductor substrate.

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