JP5566899B2 - メモリにアクセスするシステム及び方法 - Google Patents

メモリにアクセスするシステム及び方法 Download PDF

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Publication number
JP5566899B2
JP5566899B2 JP2010534982A JP2010534982A JP5566899B2 JP 5566899 B2 JP5566899 B2 JP 5566899B2 JP 2010534982 A JP2010534982 A JP 2010534982A JP 2010534982 A JP2010534982 A JP 2010534982A JP 5566899 B2 JP5566899 B2 JP 5566899B2
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Japan
Prior art keywords
storage
master controller
storage node
memory
request
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English (en)
Japanese (ja)
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JP2011505039A (ja
Inventor
ロジャー， ドゥエイン アイザック，
誓士 三浦
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Hitachi Ltd
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Hitachi Ltd
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    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/16—Handling requests for interconnection or transfer for access to memory bus
    • G06F13/1668—Details of memory controller
    • G06F13/1673—Details of memory controller using buffers
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/16—Handling requests for interconnection or transfer for access to memory bus
    • G06F13/1668—Details of memory controller
    • G06F13/1684—Details of memory controller using multiple buses

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)
  • Information Transfer Systems (AREA)
  • Small-Scale Networks (AREA)
  • Multi Processors (AREA)
  • Information Retrieval, Db Structures And Fs Structures Therefor (AREA)
  • Memory System (AREA)
JP2010534982A 2007-11-26 2008-11-25 メモリにアクセスするシステム及び方法 Active JP5566899B2 (ja)

Applications Claiming Priority (17)

Application Number Priority Date Filing Date Title
US436207P 2007-11-26 2007-11-26
US436107P 2007-11-26 2007-11-26
US441207P 2007-11-26 2007-11-26
US443407P 2007-11-26 2007-11-26
US61/004,361 2007-11-26
US61/004,362 2007-11-26
US61/004,434 2007-11-26
US61/004,412 2007-11-26
US12/276,010 2008-11-21
US12/276,010 US8732360B2 (en) 2007-11-26 2008-11-21 System and method for accessing memory
US12/276,143 2008-11-21
US12/276,143 US8874810B2 (en) 2007-11-26 2008-11-21 System and method for read data buffering wherein analyzing policy determines whether to decrement or increment the count of internal or external buffers
US12/276,116 US8601181B2 (en) 2007-11-26 2008-11-21 System and method for read data buffering wherein an arbitration policy determines whether internal or external buffers are given preference
US12/276,116 2008-11-21
US12/276,061 2008-11-21
US12/276,061 US8930593B2 (en) 2007-11-26 2008-11-21 Method for setting parameters and determining latency in a chained device system
PCT/US2008/013194 WO2009070326A1 (en) 2007-11-26 2008-11-25 A system and method for accessing memory

Publications (2)

Publication Number Publication Date
JP2011505039A JP2011505039A (ja) 2011-02-17
JP5566899B2 true JP5566899B2 (ja) 2014-08-06

Family

ID=40670682

Family Applications (5)

Application Number Title Priority Date Filing Date
JP2010534982A Active JP5566899B2 (ja) 2007-11-26 2008-11-25 メモリにアクセスするシステム及び方法
JP2010534981A Active JP5429572B2 (ja) 2007-11-26 2008-11-25 チェーン化デバイスシステムにおいてパラメータを設定し待ち時間を決定する方法
JP2010534980A Pending JP2011505037A (ja) 2007-11-26 2008-11-25 読出しデータバッファリングのシステム及び方法
JP2010534979A Active JP5948628B2 (ja) 2007-11-26 2008-11-25 記憶システム及び方法
JP2016025072A Pending JP2016095881A (ja) 2007-11-26 2016-02-12 記憶システム及び方法

Family Applications After (4)

Application Number Title Priority Date Filing Date
JP2010534981A Active JP5429572B2 (ja) 2007-11-26 2008-11-25 チェーン化デバイスシステムにおいてパラメータを設定し待ち時間を決定する方法
JP2010534980A Pending JP2011505037A (ja) 2007-11-26 2008-11-25 読出しデータバッファリングのシステム及び方法
JP2010534979A Active JP5948628B2 (ja) 2007-11-26 2008-11-25 記憶システム及び方法
JP2016025072A Pending JP2016095881A (ja) 2007-11-26 2016-02-12 記憶システム及び方法

Country Status (3)

Country Link
US (4) US8601181B2 (enExample)
JP (5) JP5566899B2 (enExample)
WO (4) WO2009070324A1 (enExample)

Families Citing this family (28)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8013073B2 (en) * 2005-12-30 2011-09-06 Chevron Oronite Company Llc Method for preparing polyolefins containing vinylidine end groups using nonaromatic heterocyclic compounds
US7816459B2 (en) 2005-12-30 2010-10-19 Chevron Oronite Company Llc Method for preparing polyolefins containing vinylidine end groups using polymeric nitrogen compounds
EP1999883A4 (en) 2006-03-14 2013-03-06 Divx Llc SCHEME FOR THE MANAGEMENT OF UNITED DIGITAL RIGHTS, INCLUDING TRUSTWORTHY SYSTEMS
US8601181B2 (en) * 2007-11-26 2013-12-03 Spansion Llc System and method for read data buffering wherein an arbitration policy determines whether internal or external buffers are given preference
US8394897B2 (en) * 2008-03-25 2013-03-12 Chevron Oronite Company Llc Production of vinylidene-terminated polyolefins via quenching with monosulfides
JP5407633B2 (ja) * 2008-07-28 2014-02-05 株式会社リコー 通信装置及びそれを有する通信システム並びに通信方法
US8279231B1 (en) * 2008-10-29 2012-10-02 Nvidia Corporation Bandwidth impedance matching and starvation avoidance by read completion buffer allocation
US9083762B2 (en) * 2010-05-28 2015-07-14 Greg Saunders System and method for providing hybrid on demand services to a work unit
KR101796116B1 (ko) 2010-10-20 2017-11-10 삼성전자 주식회사 반도체 장치, 이를 포함하는 메모리 모듈, 메모리 시스템 및 그 동작방법
US9247312B2 (en) 2011-01-05 2016-01-26 Sonic Ip, Inc. Systems and methods for encoding source media in matroska container files for adaptive bitrate streaming using hypertext transfer protocol
US8520534B2 (en) * 2011-03-03 2013-08-27 Alcatel Lucent In-service throughput testing in distributed router/switch architectures
US9467708B2 (en) 2011-08-30 2016-10-11 Sonic Ip, Inc. Selection of resolutions for seamless resolution switching of multimedia content
US8909922B2 (en) 2011-09-01 2014-12-09 Sonic Ip, Inc. Systems and methods for playing back alternative streams of protected content protected using common cryptographic information
US9106663B2 (en) 2012-02-01 2015-08-11 Comcast Cable Communications, Llc Latency-based routing and load balancing in a network
US9021219B2 (en) 2012-12-14 2015-04-28 International Business Machines Corporation Enhancing analytics performance using distributed multi-tiering
US9313510B2 (en) 2012-12-31 2016-04-12 Sonic Ip, Inc. Use of objective quality measures of streamed content to reduce streaming bandwidth
US9191457B2 (en) 2012-12-31 2015-11-17 Sonic Ip, Inc. Systems, methods, and media for controlling delivery of content
US9065810B2 (en) * 2013-01-30 2015-06-23 Ebay Inc. Daisy chain distribution in data centers
US9094737B2 (en) 2013-05-30 2015-07-28 Sonic Ip, Inc. Network video streaming with trick play based on separate trick play files
US9866878B2 (en) 2014-04-05 2018-01-09 Sonic Ip, Inc. Systems and methods for encoding and playing back video at different frame rates using enhancement layers
US9641616B2 (en) * 2014-07-10 2017-05-02 Kabushiki Kaisha Toshiba Self-steering point-to-point storage protocol
US10659532B2 (en) * 2015-09-26 2020-05-19 Intel Corporation Technologies for reducing latency variation of stored data object requests
JP2018041153A (ja) * 2016-09-05 2018-03-15 東芝メモリ株式会社 ストレージシステムおよび入出力処理方法
US10635617B2 (en) * 2017-05-19 2020-04-28 Western Digital Technologies, Inc. Context-aware dynamic command scheduling for a data storage system
JP6978670B2 (ja) * 2017-12-07 2021-12-08 富士通株式会社 演算処理装置および演算処理装置の制御方法
JP7031349B2 (ja) * 2018-02-15 2022-03-08 日本電気株式会社 ノード
US11146626B2 (en) * 2018-11-01 2021-10-12 EMC IP Holding Company LLC Cloud computing environment with replication system configured to reduce latency of data read access
US11941155B2 (en) 2021-03-15 2024-03-26 EMC IP Holding Company LLC Secure data management in a network computing environment

Family Cites Families (27)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6658509B1 (en) * 2000-10-03 2003-12-02 Intel Corporation Multi-tier point-to-point ring memory interface
US6564291B1 (en) * 2000-11-17 2003-05-13 Texas Instruments Incorporated Multi-function peripheral storage device buffer system
US6678749B2 (en) * 2001-06-28 2004-01-13 Sony Corporation System and method for efficiently performing data transfer operations
US7200137B2 (en) * 2002-07-29 2007-04-03 Freescale Semiconductor, Inc. On chip network that maximizes interconnect utilization between processing elements
DE10234934A1 (de) * 2002-07-31 2004-03-18 Advanced Micro Devices, Inc., Sunnyvale Antwortreihenwiederherstellungsmechanismus
US6820181B2 (en) * 2002-08-29 2004-11-16 Micron Technology, Inc. Method and system for controlling memory accesses to memory modules having a memory hub architecture
US6928528B1 (en) * 2002-10-07 2005-08-09 Advanced Micro Devices, Inc. Guaranteed data synchronization
US7308524B2 (en) * 2003-01-13 2007-12-11 Silicon Pipe, Inc Memory chain
US7069399B2 (en) 2003-01-15 2006-06-27 Via Technologies Inc. Method and related apparatus for reordering access requests used to access main memory of a data processing system
US20040243769A1 (en) * 2003-05-30 2004-12-02 Frame David W. Tree based memory structure
JP4291664B2 (ja) * 2003-10-14 2009-07-08 株式会社日立製作所 通信バッファ予約機能を備えるストレージ装置およびシステム
US7779212B2 (en) * 2003-10-17 2010-08-17 Micron Technology, Inc. Method and apparatus for sending data from multiple sources over a communications bus
US7120743B2 (en) 2003-10-20 2006-10-10 Micron Technology, Inc. Arbitration system and method for memory responses in a hub-based memory system
US7533218B2 (en) * 2003-11-17 2009-05-12 Sun Microsystems, Inc. Memory system topology
US7330992B2 (en) * 2003-12-29 2008-02-12 Micron Technology, Inc. System and method for read synchronization of memory modules
US7188219B2 (en) * 2004-01-30 2007-03-06 Micron Technology, Inc. Buffer control system and method for a memory system having outstanding read and write request buffers
US7412574B2 (en) 2004-02-05 2008-08-12 Micron Technology, Inc. System and method for arbitration of memory responses in a hub-based memory system
US7257683B2 (en) * 2004-03-24 2007-08-14 Micron Technology, Inc. Memory arbitration system and method having an arbitration packet protocol
US7512762B2 (en) * 2004-10-29 2009-03-31 International Business Machines Corporation System, method and storage medium for a memory subsystem with positional read data latency
US7337293B2 (en) 2005-02-09 2008-02-26 International Business Machines Corporation Streaming reads for early processing in a cascaded memory subsystem with buffered memory devices
US7181659B2 (en) * 2005-02-10 2007-02-20 International Business Machines Corporation Memory built-in self test engine apparatus and method with trigger on failure and multiple patterns per load capability
WO2006089560A1 (en) * 2005-02-28 2006-08-31 Teklatech A/S A method of and a system for controlling access to a shared resource
US20070016698A1 (en) 2005-06-22 2007-01-18 Vogt Pete D Memory channel response scheduling
US20070005922A1 (en) * 2005-06-30 2007-01-04 Swaminathan Muthukumar P Fully buffered DIMM variable read latency
US7496777B2 (en) * 2005-10-12 2009-02-24 Sun Microsystems, Inc. Power throttling in a memory system
US7685392B2 (en) 2005-11-28 2010-03-23 International Business Machines Corporation Providing indeterminate read data latency in a memory system
US8601181B2 (en) * 2007-11-26 2013-12-03 Spansion Llc System and method for read data buffering wherein an arbitration policy determines whether internal or external buffers are given preference

Also Published As

Publication number Publication date
JP2011505037A (ja) 2011-02-17
JP2011505038A (ja) 2011-02-17
WO2009070324A1 (en) 2009-06-04
US8601181B2 (en) 2013-12-03
US8930593B2 (en) 2015-01-06
JP5948628B2 (ja) 2016-07-06
JP2011505039A (ja) 2011-02-17
US8732360B2 (en) 2014-05-20
US20090138632A1 (en) 2009-05-28
WO2009070321A1 (en) 2009-06-04
US20090138624A1 (en) 2009-05-28
US20090138597A1 (en) 2009-05-28
JP2011505036A (ja) 2011-02-17
WO2009070326A1 (en) 2009-06-04
WO2009070322A1 (en) 2009-06-04
JP5429572B2 (ja) 2014-02-26
US20090138570A1 (en) 2009-05-28
JP2016095881A (ja) 2016-05-26
US8874810B2 (en) 2014-10-28

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