JP5562696B2 - 半導体装置の作製方法 - Google Patents

半導体装置の作製方法 Download PDF

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Publication number
JP5562696B2
JP5562696B2 JP2010067633A JP2010067633A JP5562696B2 JP 5562696 B2 JP5562696 B2 JP 5562696B2 JP 2010067633 A JP2010067633 A JP 2010067633A JP 2010067633 A JP2010067633 A JP 2010067633A JP 5562696 B2 JP5562696 B2 JP 5562696B2
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Japan
Prior art keywords
layer
substrate
silicon
silicon carbide
insulating layer
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Expired - Fee Related
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JP2010067633A
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English (en)
Japanese (ja)
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JP2010251729A (ja
JP2010251729A5 (enExample
Inventor
英人 大沼
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Semiconductor Energy Laboratory Co Ltd
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Semiconductor Energy Laboratory Co Ltd
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Priority to JP2010067633A priority Critical patent/JP5562696B2/ja
Publication of JP2010251729A publication Critical patent/JP2010251729A/ja
Publication of JP2010251729A5 publication Critical patent/JP2010251729A5/ja
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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D12/00Bipolar devices controlled by the field effect, e.g. insulated-gate bipolar transistors [IGBT]
    • H10D12/01Manufacture or treatment
    • H10D12/031Manufacture or treatment of IGBTs
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76251Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
    • H01L21/76254Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques with separation/delamination along an ion implanted layer, e.g. Smart-cut, Unibond
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/01Manufacture or treatment
    • H10D30/021Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/027Manufacture or treatment of FETs having insulated gates [IGFET] of lateral single-gate IGFETs
    • H10D30/0278Manufacture or treatment of FETs having insulated gates [IGFET] of lateral single-gate IGFETs forming single crystalline channels on wafers after forming insulating device isolations
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/67Thin-film transistors [TFT]
    • H10D30/674Thin-film transistors [TFT] characterised by the active materials
    • H10D30/6741Group IV materials, e.g. germanium or silicon carbide
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/80Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
    • H10D62/83Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge
    • H10D62/832Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge being Group IV materials comprising two or more elements, e.g. SiGe
    • H10D62/8325Silicon carbide
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/02Manufacture or treatment characterised by using material-based technologies
    • H10D84/03Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/035Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon carbide [SiC] technology
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/01Manufacture or treatment
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/01Manufacture or treatment
    • H10D30/021Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/031Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT]
    • H10D30/0321Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT] comprising silicon, e.g. amorphous silicon or polysilicon
    • H10D30/0323Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT] comprising silicon, e.g. amorphous silicon or polysilicon comprising monocrystalline silicon

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Thin Film Transistor (AREA)
JP2010067633A 2009-03-27 2010-03-24 半導体装置の作製方法 Expired - Fee Related JP5562696B2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2010067633A JP5562696B2 (ja) 2009-03-27 2010-03-24 半導体装置の作製方法

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2009078577 2009-03-27
JP2009078577 2009-03-27
JP2010067633A JP5562696B2 (ja) 2009-03-27 2010-03-24 半導体装置の作製方法

Publications (3)

Publication Number Publication Date
JP2010251729A JP2010251729A (ja) 2010-11-04
JP2010251729A5 JP2010251729A5 (enExample) 2013-04-18
JP5562696B2 true JP5562696B2 (ja) 2014-07-30

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JP2010067633A Expired - Fee Related JP5562696B2 (ja) 2009-03-27 2010-03-24 半導体装置の作製方法

Country Status (2)

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US (1) US8198146B2 (enExample)
JP (1) JP5562696B2 (enExample)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP2560194A4 (en) * 2010-04-14 2013-11-20 Sumitomo Electric Industries SILICON CARBIDE SEMICONDUCTOR ELEMENT AND MANUFACTURING METHOD THEREFOR
CN106783869B (zh) * 2016-09-07 2019-11-22 武汉华星光电技术有限公司 薄膜晶体管阵列基板及其制造方法

Family Cites Families (24)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6709907B1 (en) * 1992-02-25 2004-03-23 Semiconductor Energy Laboratory Co., Ltd. Method of fabricating a thin film transistor
US6573195B1 (en) * 1999-01-26 2003-06-03 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing a semiconductor device by performing a heat-treatment in a hydrogen atmosphere
JP2001267573A (ja) * 2000-03-22 2001-09-28 Toshiba Corp SiCを含む半導体素子
US6855584B2 (en) * 2001-03-29 2005-02-15 Semiconductor Energy Laboratory Co., Ltd. Method of manufacturing a semiconductor device
JP3826828B2 (ja) 2001-11-27 2006-09-27 日産自動車株式会社 炭化珪素半導体を用いた電界効果トランジスタ
US7232714B2 (en) * 2001-11-30 2007-06-19 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device
JP2003282845A (ja) 2002-03-20 2003-10-03 Mitsubishi Electric Corp 炭化ケイ素基板の製造方法およびその製造方法により製造された炭化ケイ素基板、ならびに、ショットキーバリアダイオードおよび炭化ケイ素薄膜の製造方法
WO2004004013A1 (en) * 2002-06-26 2004-01-08 Cambridge Semiconductor Limited Lateral semiconductor device
US7081704B2 (en) * 2002-08-09 2006-07-25 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and manufacturing method thereof
US6818529B2 (en) * 2002-09-12 2004-11-16 Applied Materials, Inc. Apparatus and method for forming a silicon film across the surface of a glass substrate
AU2003288999A1 (en) * 2002-12-19 2004-07-14 Semiconductor Energy Laboratory Co., Ltd. Display unit and method of fabricating display unit
US7329923B2 (en) * 2003-06-17 2008-02-12 International Business Machines Corporation High-performance CMOS devices on hybrid crystal oriented substrates
US7384829B2 (en) * 2004-07-23 2008-06-10 International Business Machines Corporation Patterned strained semiconductor substrate and device
US7393733B2 (en) * 2004-12-01 2008-07-01 Amberwave Systems Corporation Methods of forming hybrid fin field-effect transistor structures
WO2006114999A1 (ja) * 2005-04-18 2006-11-02 Kyoto University 化合物半導体装置及び化合物半導体製造方法
JP2007027646A (ja) 2005-07-21 2007-02-01 Mitsubishi Pencil Co Ltd 単結晶炭化シリコン基板の製造方法およびその製造装置
JP4563918B2 (ja) 2005-10-31 2010-10-20 エア・ウォーター株式会社 単結晶SiC基板の製造方法
US7691730B2 (en) * 2005-11-22 2010-04-06 Corning Incorporated Large area semiconductor on glass insulator
US7446026B2 (en) * 2006-02-08 2008-11-04 Freescale Semiconductor, Inc. Method of forming a CMOS device with stressor source/drain regions
US8008205B2 (en) * 2006-03-08 2011-08-30 Sharp Kabushiki Kaisha Methods for producing a semiconductor device having planarization films
TWI328877B (en) * 2006-07-20 2010-08-11 Au Optronics Corp Array substrate
US7846817B2 (en) * 2007-03-26 2010-12-07 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing semiconductor device
US7932164B2 (en) * 2008-03-17 2011-04-26 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing semiconductor substrate by using monitor substrate to obtain optimal energy density for laser irradiation of single crystal semiconductor layers
US7935589B2 (en) * 2008-04-29 2011-05-03 Chartered Semiconductor Manufacturing, Ltd. Enhanced stress for transistors

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JP2010251729A (ja) 2010-11-04
US8198146B2 (en) 2012-06-12
US20100244051A1 (en) 2010-09-30

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