CN106783869B - 薄膜晶体管阵列基板及其制造方法 - Google Patents

薄膜晶体管阵列基板及其制造方法 Download PDF

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CN106783869B
CN106783869B CN201610807781.4A CN201610807781A CN106783869B CN 106783869 B CN106783869 B CN 106783869B CN 201610807781 A CN201610807781 A CN 201610807781A CN 106783869 B CN106783869 B CN 106783869B
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film transistor
gate electrode
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CN106783869A (zh
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谢露露
熊彬
韩云
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Wuhan China Star Optoelectronics Technology Co Ltd
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Abstract

本发明提供一种薄膜晶体管阵列基板及其制造方法。薄膜晶体管阵列基板包括：基底，包括显示区域和非显示区域，非显示区域围绕显示区域并且包括肖特基二极管，其中，所述肖特基二极管包括：阳极层和阴极层，形成基底上；栅极绝缘层，形成在基底上并且覆盖阳极层和阴极层；第一栅电极，形成在栅极绝缘层上并且与阳极层和阴极层叠置；层间绝缘层，形成在栅极绝缘层上并且覆盖第一栅电极，并且包括用于暴露阳极层和阴极层的接触孔；第一外接电压和第二外接电压，形成在层间绝缘层上，并且分别通过接触孔连接到阳极层和阴极层。本发明的肖特基二极管与薄膜晶体管一同形成在基底上，因此，不需要额外增加工序，从而简化了制造工艺。

Description

薄膜晶体管阵列基板及其制造方法
技术领域
本发明属于晶圆制造和平板显示技术领域。具体地讲，涉及一种薄膜晶体管阵列基板及其制造方法。
背景技术
现有的面板制造业在面板出货的时候产品都是以模组的形式出货，如图1所示，液晶面板模组包括液晶面板、驱动集成电路(DIC,Driver Integrated Circuit)和柔性印刷电路板。其中，FPCA起到连接手机主板与液晶面板模组的作用，将手机主板上AP(Application Processor)的驱动信号、图像显示资料和电源电压传递到DIC，然后DIC将这些输入的信号和图像显示资料通过复杂运算和数位转换，最终输出各种模拟电压到液晶面板，从而使得液晶面板能够呈现给用户不同的视觉图像。FPCA作为桥梁起到连接传递的同时，还会根据DIC的需求放置一些被动电子元器件，例如电阻、电容、肖特基二极管等。
目前在制造FPCA时通常需要放置肖特基二极管，其目的是防止AVEE(VSN,系统板提供给IC的工作电压)与VGL(IC产生的，控制TFT关闭的电压)之间闩锁效应(Latch Up)。但是随着技术的发展和产品性能需求的提高，手机越来越倾向于纤薄化，从而在FPC上放置Diode时，不仅占用了FPC上的空间使FPC的外形足够大，Diode的自身高度也影响了FPCA在手机模组里面安装时需求的空间，使得手机无法做到纤薄化。
发明内容
为了解决上述现有技术的不足，本发明提供一种新的液晶驱动走线架构，取代FPCA上的Diode使FPCA更加纤薄化，并且降低FPCA的制造成本的薄膜晶体管阵列基板及其制造方法。
根据本发明的一方面，提供一种薄膜晶体管阵列基板，包括基底，基底包括显示区域和非显示区域，非显示区域围绕显示区域并且包括肖特基二极管，其中，所述肖特基二极管包括：阳极层和阴极层，形成基底上；栅极绝缘层，形成在基底上并且覆盖阳极层和阴极层；第一栅电极，形成在栅极绝缘层上并且与阳极层和阴极层叠置；层间绝缘层，形成在栅极绝缘层上并且覆盖第一栅电极，并且包括用于暴露阳极层和阴极层的接触孔；第一外接电压和第二外接电压，形成在层间绝缘层上，并且分别通过接触孔连接到阳极层和阴极层。
根据本发明的示例性实施例，显示区域包括薄膜晶体管，其中，所述薄膜晶体管包括：有源层，形成在基底上；第二栅电极，与有源层绝缘；源电极和漏电极，电连接到有源层。
根据本发明的示例性实施例，阳极层和阴极层与有源层设置在同一层上。
根据本发明的示例性实施例，第一栅电极与第二栅电极设置在同一层上。
根据本发明的示例性实施例，第一外接电压和第二外接电压与源电极和漏电极设置在同一层上。
根据本发明的示例性实施例，有源层包括源区、漏区和位于源区和漏区之间的沟道区，其中，阳极层包括与源区和漏区相同的材料，阴极层包括与沟道区相同的材料。
根据本发明的示例性实施例，所述薄膜晶体管阵列基板还包括焊盘，所述焊盘位于非显示区域中。
根据本发明的另一方面，提供一种制造薄膜晶体管阵列基板的方法，所述方法包括：在基底的显示区域中形成薄膜晶体管的有源层，并且在基底的非显示区域中形成肖特基二极管的阳极层和阴极层；在基底上形成栅极绝缘层以覆盖薄膜晶体管的有源层和肖特基二极管的阳极层和阴极层；
在栅极绝缘层上形成薄膜晶体管的第二栅电极和肖特基二极管的第一栅电极，第二栅电极与有源层叠置，第一栅电极与阳极层和阴极层叠置；在栅极绝缘层上形成层间绝缘层以覆盖第一栅电极和第二栅电极；在层间绝缘层和栅极绝缘层中形成用于暴露薄膜晶体管的有源层以及肖特基二极管的阳极层和阴极层的接触孔；在层间绝缘层上形成薄膜晶体管的源电极和漏电极以及肖特基二极管的第一外接电压和第二外接电压，源电极、漏电极、第一外接电压和第二外接电压分别通过接触孔连接到有源层、阳极层和阴极层。
根据本发明的示例性实施例，有源层包括源区、漏区和位于源区和漏区之间的沟道区，其中，阳极层包括与源区和漏区相同的材料，阴极层包括与沟道区相同的材料。
根据本发明的示例性实施例，形成第一栅电极和第二栅电极的步骤包括：使用同一工艺同时形成第一栅电极和第二栅电极。
根据本发明的薄膜晶体管阵列基板及其制造方法，能够节约购买二极管的物料成本和打件费用，而且还节约了FPCA的面积，大大降低了FPCA的厚度，能够实现液晶模组纤薄化，从而促进手机整机的纤薄化。此外，本发明的肖特基二极管与薄膜晶体管一同形成在基底上，因此，不需要额外增加工序，从而简化了制造工艺。
附图说明
图1示出了现有技术的肖特基二极管打件所处区域的驱动架构示意图；
图2示出了根据本发明的示例性实施例的薄膜晶体管阵列基板的驱动架构示意图；
图3至图9示出了根据本发明的示例性实施例的制造薄膜晶体管阵列基板的流程示意图。
具体实施方式
下面将参照附图详细地描述本发明的示例性实施例。
以下将结合附图来详细描述本发明的示例性实施例，然而，附图只是示意性地示出了本发明的具体示例，且不具有限制作用。然而，本领域技术人员应理解的是，在不脱离本发明的权利要求所限定的保护范围的情况下，可以对其进行各种修改和变形。
在下文中，将通过参照附图解释本发明的示例性实施例来详细描述本发明。
图2示出了根据本发明的示例性实施例的薄膜晶体管阵列基板的驱动架构示意图。图3至图9示出了根据本发明的示例性实施例的制造薄膜晶体管阵列基板的流程示意图。
如图2和图3中所示，在基底100上形成第一半导体210和与第一半导体210分隔开的第二半导体220。第一半导体210可以形成在基底100的显示区域101中，第二半导体220可以形成在基底100的非显示区域102中。基底100可以由含有SiO2作为主要成分的透明玻璃材料形成，但是不限于此。
通常，通过物理气相沉积(PVD)法形成第一半导体210和第二半导体220。在本发明的非限制性实施例中，第一半导体210和第二半导体220的材料可以相同。
此外，还可以在第一半导体210和第二半导体220与基底之间形成缓冲层(未示出)，然而本发明不限于此。
接着，如图4中所示，对第一半导体210和第二半导体220进行掺杂，以形成薄膜晶体管的有源层的源区211、漏区212和位于源区211和漏区212之间的沟道区213以及肖特基二极管的阳极层221和阴极层222。可以采用相同的杂质来掺杂第一半导体210和第二半导体220，从而薄膜晶体管的有源层的源区211和漏区212与肖特基二极管的阳极层221相同，薄膜晶体管的沟道区213与肖特基二极管的阴极层222相同。此外，可以采用同一工艺执行掺杂第一半导体210和第二半导体220的步骤。在本发明中，由于在制造TFT时可以同时制造肖特基二极管，从而不需要额外增加工序，简化了制造工艺。
然后，如图5中所示，在基底100上形成栅极绝缘层300，以覆盖第一半导体210和第二半导体220。
接着，参照图6，在栅极绝缘层300上形成薄膜晶体管的第二栅电极310和肖特基二极管的第一栅电极320，并且第二栅电极310与沟道区213叠置，第一栅电极320与阳极层221和阴极层222的一部分叠置。在本发明的实施例中，可以通过同一工艺来形成第二栅电极310和第一栅电极320。
然后，参照图7，在栅极绝缘层300上形成层间绝缘层400，以覆盖第二栅电极310和第一栅电极320。接着，如图8所示，在栅极绝缘层300和层间绝缘层400中形成用于暴露薄膜晶体管的源区211和漏区212以及肖特基二极管的阳极层221和阴极层222的接触孔H。
最后，如图9所示，在层间绝缘层400上形成薄膜晶体管的源电极510和漏电极520以及肖特基二极管的第一外接电压(例如，VGL)530和第二外接电压(例如，AVEE)540，并且源电极510、漏电极520、第一外接电压530和第二外接电压540分别通过接触孔H连接到源区211、漏区212、阳极层221和阴极层222。
根据本发明，通过在形成薄膜晶体管(TFT)时同时形成肖特基二极管能够简化工艺以及制造成本。
此外，根据本发明提供的薄膜晶体管阵列基板及其制造方法，能够节约FPCA的面积，大大降低FPCA的厚度，能够实现液晶模组纤薄化，从而促进手机整机的纤薄化。
以上描述了根据本发明的示例性实施例的制造薄膜晶体管阵列基板的方法，但本发明的保护范围并不限制于上述特定实施例。

Claims (8)

1.一种薄膜晶体管阵列基板，其特征在于，所述薄膜晶体管阵列基板包括：
基底，包括显示区域和非显示区域，非显示区域围绕显示区域并且包括肖特基二极管，
其中，所述肖特基二极管包括：
阳极层和阴极层，形成基底上；
栅极绝缘层，形成在基底上并且覆盖阳极层和阴极层；
第一栅电极，形成在栅极绝缘层上并且与阳极层和阴极层叠置；
层间绝缘层，形成在栅极绝缘层上并且覆盖第一栅电极，并且包括用于暴露阳极层和阴极层的接触孔；
第一外接电压和第二外接电压，形成在层间绝缘层上，并且分别通过接触孔连接到阳极层和阴极层；
所述显示区域包括薄膜晶体管，
其中，所述薄膜晶体管包括：
有源层，形成在基底上；
第二栅电极，与有源层绝缘；
源电极和漏电极，电连接到有源层；
阳极层和阴极层与所述有源层设置在同一层上。
2.根据权利要求1所述的薄膜晶体管阵列基板，其特征在于，第一栅电极与第二栅电极设置在同一层上。
3.根据权利要求1所述的薄膜晶体管阵列基板，其特征在于，第一外接电压和第二外接电压与源电极和漏电极设置在同一层上。
4.根据权利要求1所述的薄膜晶体管阵列基板，其特征在于，有源层包括源区、漏区和位于源区和漏区之间的沟道区，
其中，阳极层包括与源区和漏区相同的材料，阴极层包括与沟道区相同的材料。
5.根据权利要求1所述的薄膜晶体管阵列基板，其特征在于，所述薄膜晶体管阵列基板还包括焊盘，所述焊盘位于非显示区域中。
6.一种制造薄膜晶体管阵列基板的方法，其特征在于，所述方法包括：
在基底的显示区域中形成薄膜晶体管的有源层，并且在基底的非显示区域中形成肖特基二极管的阳极层和阴极层；
在基底上形成栅极绝缘层以覆盖薄膜晶体管的有源层和肖特基二极管的阳极层和阴极层；
在栅极绝缘层上形成薄膜晶体管的第二栅电极和肖特基二极管的第一栅电极，第二栅电极与有源层叠置，第一栅电极与阳极层和阴极层叠置；
在栅极绝缘层上形成层间绝缘层以覆盖第一栅电极和第二栅电极；
在层间绝缘层和栅极绝缘层中形成用于暴露薄膜晶体管的有源层以及肖特基二极管的阳极层和阴极层的接触孔；
在层间绝缘层上形成薄膜晶体管的源电极和漏电极以及肖特基二极管的第一外接电压和第二外接电压，源电极、漏电极、第一外接电压和第二外接电压分别通过接触孔连接到有源层、阳极层和阴极层。
7.根据权利要求6所述的方法，其特征在于，有源层包括源区、漏区和位于源区和漏区之间的沟道区，
其中，阳极层包括与源区和漏区相同的材料，阴极层包括与沟道区相同的材料。
8.根据权利要求6所述的方法，其特征在于，形成第一栅电极和第二栅电极的步骤包括：使用同一工艺同时形成第一栅电极和第二栅电极。
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