JP5532247B2 - 信号取込みシステム - Google Patents
信号取込みシステム Download PDFInfo
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- JP5532247B2 JP5532247B2 JP2010222925A JP2010222925A JP5532247B2 JP 5532247 B2 JP5532247 B2 JP 5532247B2 JP 2010222925 A JP2010222925 A JP 2010222925A JP 2010222925 A JP2010222925 A JP 2010222925A JP 5532247 B2 JP5532247 B2 JP 5532247B2
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Classifications
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R23/00—Arrangements for measuring frequencies; Arrangements for analysing frequency spectra
- G01R23/16—Spectrum analysis; Fourier analysis
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R1/00—Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
- G01R1/02—General constructional details
- G01R1/06—Measuring leads; Measuring probes
- G01R1/067—Measuring probes
- G01R1/06766—Input circuits therefor
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R35/00—Testing or calibrating of apparatus covered by the other groups of this subclass
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R1/00—Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
- G01R1/02—General constructional details
- G01R1/06—Measuring leads; Measuring probes
- G01R1/067—Measuring probes
- G01R1/06772—High frequency probes
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- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Mathematical Physics (AREA)
- Measuring Leads Or Probes (AREA)
- Testing Of Individual Semiconductor Devices (AREA)
Description
上記信号取込みプローブ及び上記信号処理装置を用いて、広周波数コンテンツ信号のデジタル値を校正波形として取込むステップa)と、
信号処理装置に記憶された広周波数コンテンツ信号の基準校正波形と、上記校正波形との間で、少なくとも1つの時間位置及び周波数位置で設定される上記波形上の共通位置で第1測定エラー値を決定するステップb)と、
少なくとも上記第1測定エラー値及び上記波形の上記共通位置の関数として測定エラー係数を決定するステップc)と、
補償システムの入力増幅回路のフィードバック・ループ回路中の複数のレジスタ中の適切なレジスタに上記測定エラー係数を適用するステップd)と、
上記波形上の更なる共通位置にステップb)、c)及びd)を繰り返すステップe)と、
上記波形上の最後の上記共通位置において上記測定エラー値及び上記測定エラー係数を定めた後、上記信号取込みプローブ及び上記信号処理装置を用いて広周波数コンテンツ信号のデジタル値を校正波形として取込むステップf)と、
校正仕様とステップf)で取り込んだ校正波形とを比較し、上記校正波形が上記校正仕様内であるか確認するステップg)と、
上記校正仕様内の上記校正波形に関する入力増幅回路のフィードバック・ループ回路中の複数のレジスタにロードされたレジスタ値を記憶するステップh)と、
上記校正処理の成功した結果を表示するステップi)とを具えている。
上記信号処理装置に記憶された広周波数コンテンツ信号基準校正波形と上記校正波形の間の複数の第1測定エラー値を、少なくとも1つの時間位置及び周波数位置に設定された波形上の複数の共通位置において決定するステップa)と、
複数の第1測定エラー値及び上記波形上の共通位置の関数として測定エラー係数を決定するステップb)と
を更に有するようにしても良い。
上記校正処理が繰り返し時間制限値を超えたかどうか決定するステップa)と、
上記校正処理が上記繰り返し時間制限値を超えていないときは、上記波形上の上記共通位置を最初の位置に設定するステップb)と、
上記波形上の複数の上記共通位置について上記ステップe)を繰り返すステップc)と
を更に有するようにしても良い。
信号取込みプローブを信号処理装置に装着するステップa)と、
信号処理装置が信号取込みプローブ中のプローブ・メモリの有無の少なくとも一方を検出するステップb)と、
上記プローブ・メモリが有るときには、上記プローブ・メモリの記憶内容を信号処理装置にロードするステップc)と、
上記プローブ・メモリに記憶されたプローブ校正定数を検出するステップd)と、
入力増幅回路のフィードバック・ループ回路中複数の上記レジスタの適切なレジスタ値に上記プローブ校正定数を適用するステップe)と、
上記プローブ・メモリが無いときには、プローブ・メモリが無いとして上記信号取込みプローブを識別するステップf)と
を更に有するようにしても良い。
広周波数コンテンツ信号の校正波形のデジタル値をフーリエ変換を用いて周波数領域表現に変換するステップa)と、
信号処理装置に記憶された広周波数コンテンツ信号の基準校正波形の周波数領域表現と、上記校正波形の上記周波数領域表現との間の一定周波数インターバル毎に上記波形上に設定される共通位置における測定エラー値を決定するステップb)とを更に有するようにしても良い。
52 信号取込みプローブ
54 抵抗性中心導体信号ケーブル
56 入力ノード
58 信号処理装置
60 取込み回路
62 コントローラ
64 処理回路
66 表示デバイス
68 補償システム
100 オシロスコープ
105 信号取込みプローブ
110 信号取込みプローブ
115 CH1取込み回路
120 CH2取込み回路
122 サンプル・クロック発生器
124 トリガ回路
125 コントローラ
130 処理回路
135 表示デバイス
140 プロセッサ
145 サポート回路
150 I/O回路
155 メモリ
157 広周波数コンテンツ信号源
200 信号取込みシステム
202 抵抗性中心導体信号ケーブル
204 BNC入力ノード
206 プロービング・ヘッド
208 プロービング・チップ回路
213 接地コンデンサ
216 抵抗性要素
220 スイッチング回路
222 スイッチング要素
224 入力回路
234 入力増幅回路
240 抵抗−容量性減衰回路網
245 フィードバック・ループ回路
256 プローブ・メモリ
258 信号線兼電力供給線
260 SPIバス
400 ステージ減衰ラダー
500 高電圧プローブ
502 プローブ・チップ回路
506 プロービング・ヘッド
520 ケーブル終端回路
522 シャント減衰回路
Claims (1)
- 信号取込みシステムであって、
抵抗性中心導体信号ケーブルに結合され、時定数を有するプローブ・チップ回路を有する信号取込みプローブと、
入力ノードを有する信号処理装置であって、上記入力ノードが上記信号取込みプローブの上記抵抗性中心導体信号ケーブルに結合され、上記プローブ・チップ回路の上記時定数が上記信号処理装置の上記入力ノードを超えた側の時定数とミスマッチしつつ、上記抵抗性中心導体信号ケーブルが上記信号処理装置の上記入力ノードを超えた側の抵抗性及び容量性特性インピーダンスによって実質的に終端され、上記入力ノードが入力回路を介して上記信号処理装置中に配置された補償システムに結合され、上記補償システムが極−零点対となるフィードバック・ループ回路のある入力増幅回路と上記入力回路に結合されたシャント極−零点対とを有し、上記信号取込みシステムの周波数帯域幅に渡ってフラットを維持する極−零点対を提供する信号処理装置と
を具える信号取込みシステム。
Applications Claiming Priority (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US12/571,236 US20110074441A1 (en) | 2009-09-30 | 2009-09-30 | Low Capacitance Signal Acquisition System |
US12/571,236 | 2009-09-30 | ||
US12/846,745 | 2010-07-29 | ||
US12/846,745 US8564308B2 (en) | 2009-09-30 | 2010-07-29 | Signal acquisition system having reduced probe loading of a device under test |
Publications (2)
Publication Number | Publication Date |
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JP2011075566A JP2011075566A (ja) | 2011-04-14 |
JP5532247B2 true JP5532247B2 (ja) | 2014-06-25 |
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JP2010222925A Active JP5532247B2 (ja) | 2009-09-30 | 2010-09-30 | 信号取込みシステム |
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US (2) | US8564308B2 (ja) |
EP (1) | EP2306208B1 (ja) |
JP (1) | JP5532247B2 (ja) |
CN (2) | CN102081107B (ja) |
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2010
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- 2010-09-30 EP EP10251685.3A patent/EP2306208B1/en active Active
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EP2306208A3 (en) | 2017-05-03 |
CN102081107B (zh) | 2016-01-20 |
US20130134999A1 (en) | 2013-05-30 |
JP2011075566A (ja) | 2011-04-14 |
US20110074392A1 (en) | 2011-03-31 |
CN105319526B (zh) | 2018-06-22 |
EP2306208A2 (en) | 2011-04-06 |
US8564308B2 (en) | 2013-10-22 |
CN102081107A (zh) | 2011-06-01 |
CN105319526A (zh) | 2016-02-10 |
EP2306208B1 (en) | 2022-05-25 |
US8810258B2 (en) | 2014-08-19 |
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