JP5490525B2 - Component built-in type multilayer printed wiring board and method for manufacturing the same - Google Patents

Component built-in type multilayer printed wiring board and method for manufacturing the same Download PDF

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JP5490525B2
JP5490525B2 JP2009297005A JP2009297005A JP5490525B2 JP 5490525 B2 JP5490525 B2 JP 5490525B2 JP 2009297005 A JP2009297005 A JP 2009297005A JP 2009297005 A JP2009297005 A JP 2009297005A JP 5490525 B2 JP5490525 B2 JP 5490525B2
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laminate
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insulating resin
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JP2011138873A (en
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智恵美 岩藤
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日本シイエムケイ株式会社
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Description

  The present invention relates to a multilayer printed wiring board, and more particularly to a component built-in type multilayer printed wiring board in which an electronic component is embedded in an inner layer and a method for manufacturing the same.

With the recent trend toward slimming down electronic devices, there is also a demand for thinning the total thickness of a component-embedded board in which mounting type electronic components are embedded in the inner layer.
One way to reduce the total thickness of a mounting-type component-embedded board is to reduce the thickness of the built-in component, but this does not provide the necessary and sufficient characteristics, as well as component and manufacturing costs. Therefore, it is desired to reduce the total thickness of the substrate without changing the built-in components such as a commercially available inexpensive chip-type component.

As a method of reducing the total board thickness without changing the built-in components, conventionally, an insulating resin layer provided with an opening in advance is disposed in a portion corresponding to the component housing portion of the core substrate on which the components are mounted, and further A component-embedded substrate in which a core substrate is disposed in an upper layer is known (for example, Patent Document 1).
However, as in Patent Document 1, when a component is mounted on a core substrate and the component is incorporated, the total thickness of the component-embedded substrate itself cannot be reduced due to the thickness of the core substrate.

Therefore, for the purpose of further thinning, a component-embedded substrate in which a component is built in an insulating resin layer and the inner layer is a coreless structure has been proposed (for example, Patent Document 2).
However, when components are incorporated in the coreless part as in Patent Document 2, it is possible to reduce the total thickness of the component-embedded substrate, but the electrodes of the incorporated components and the upper layer wiring circuit It was difficult to ensure insulation reliability.
Further, if the thickness of the insulating resin layer is increased in order to ensure insulation reliability, it has been difficult to achieve a reduction in the thickness of the component-embedded substrate, which is the original purpose.

Here, an example of the conventional method will be described with reference to FIGS.
First, as shown in FIG. 10A, a mask for forming a mounting pad 1003 with a plating film resistant dry film photoresist is formed on the other surface of the copper foil 1001 having a carrier 1002 on one side. After plating with nickel and gold, the mask is removed to obtain a base material P101 provided with the mounting pads 1003.
Next, as shown in FIG. 10B, the component 1004 is mounted via an adhesive (not shown) so that the electrode of the component 1004 is in contact with the desired mounting pad 1003 to obtain a component mounting substrate P102.

Next, as shown in FIG. 10 (c), a component mounting substrate P102, and a plurality of insulating layers (glass cloth-containing prepreg materials) 1005 provided with desired openings at positions corresponding to the positions of the components, By laying up and laminating with the configuration of the copper foil 1006, a laminate P103 as shown in FIG. 10 (d) is obtained.
Next, as shown in FIG. 11A, the carrier 1002 is peeled off to obtain a stacked body P111.
Next, as shown in FIG.11 (b), after providing the through-hole 1101 in the laminated body P111, the copper foil 1001 and the copper foil 1006 of both surfaces are removed by an etching, and the laminated body P112 is obtained.
Next, as shown in FIG. 11C, electroless plating and electrolytic plating are performed on the multilayer body P112 to obtain a multilayer body P113 in which the through holes 1101 are filled and the conductor layer 1102 is formed on the surface layer.
Next, as shown in FIG. 11D, the multilayer body P113 is formed into a circuit to obtain the multilayer body P114.

Next, as shown in FIG. 12 (a), the build-up resin 1201 and the copper foil 1202 are laid up and laminated on the upper and lower sides of the laminate P114, thereby stacking the laminate P122 shown in FIG. 12 (b). obtain.
Next, as shown in FIG.12 (c), the non-through-hole 1203 is provided in the laminated body P122, and the laminated body P123 is obtained.

Next, as illustrated in FIG. 13A, the multilayer body P <b> 123 is subjected to electroless plating and electrolytic plating to obtain a multilayer body P <b> 131 in which the conductor layer 1301 is formed.
Next, as shown in FIG. 13B, a circuit is formed on the multilayer body P131 to obtain a component built-in multilayer printed wiring board P132.

Here, in order to obtain necessary insulation reliability between the built-in component and its upper layer circuit, the number of stacked insulating layers provided with openings is increased at the time of layup before stacking shown in FIG. It is possible to secure insulation reliability by increasing the total thickness of the insulating layer, such as by adding an insulating layer that does not provide an opening over the insulating layer provided with an opening, There is a problem that it is difficult to obtain a component-embedded substrate having a thin total thickness.
Further, at the time of laying up before stacking shown in FIG. 10C, reducing the total number of insulating layers 1405 provided with openings as shown in FIG. 14A to reduce the total thickness of the insulating layers. Although the opening of the insulating layer is opened larger than the size of the built-in component, the resin that has flowed through the clearance between the built-in component and the insulating layer is filled, and FIG. As shown in FIG. 14, it becomes difficult to keep the thickness of the insulating layer on the built-in component uniform and appropriate. As a result, as shown in FIG. 14C, the clearance between the component 1404 and its upper layer circuit 1436 varies. Anxiety arises in the insulation reliability and brings about a state.

In particular, the variation in clearance due to the resin flowing into the opening described above is that a plurality of components are more concentrated in one place than the region where the components are scattered separately (region 1431 in FIG. 14C). In the region mounted in this manner (region 1432 in FIG. 14C), the resin thickness at the upper part of the component tends to be thinner, and the insulation reliability deterioration is more a concern.
In addition, since the amount of resin flowing out of the insulating resin layer and the amount of resin flowing into the clearance also change depending on the shape and quantity of the built-in components, the clearance value set for each component and opening, etc., the upper part of all the built-in components Insulating layer thickness cannot be ensured stably and sufficiently, and the difficulty of design and manufacturing increases, and the yield and product quality deteriorate.

JP 2008-078573 A JP 2005-217372 A

  The present invention has been made in view of the above-mentioned problems and actual circumstances. With regard to a component built-in type multilayer printed wiring board that incorporates a chip-type component that is a general-purpose component, the component is attached to the coreless substrate in order to reduce the total thickness. It is an object of the present invention to provide a component built-in type multilayer printed wiring board that can maintain the insulation between the electrode of the incorporated component and the upper wiring layer even if it is built in, and a method for manufacturing the same.

The present invention according to claim 1 provides a step of providing a cured insulator on the first conductor layer of the first support having the first conductor layer, and the second support of the second support having the second conductor layer. Mounting the component on the two-conductor layer, opening the semi-cured insulating resin layer in accordance with the region of the component mounted on the second conductor layer, and on the second support A first layup process in which the insulating resin layer that has undergone the opening process is overlapped at least to a height at which the component is buried after the laminating process, and the insulating material is insulated on the insulating resin layer superimposed on the second support. A second layup step of superimposing the first support so as to face the resin layer side, a step of obtaining a first laminate by laminating the second support through the first and second layup steps, and Remove the first and second supports from the first laminate to obtain the second laminate A step of providing a third laminate by providing a through-hole in the second laminate, a step of obtaining a fourth laminate by plating the third laminate, and forming a circuit on the fourth laminate by fifth. The above-mentioned problems are solved by a method for manufacturing a component-embedded multilayer printed wiring board, comprising a step of obtaining a laminate.
Thereby, a component built-in type multilayer printed wiring board having a reduced total board thickness can be obtained without deteriorating the insulation reliability.

According to a second aspect of the present invention, in the method for producing a component built-in multilayer printed wiring board according to the first aspect, the plating in the step of obtaining the fourth laminate is hole filling plating. Is a solution.
As a result, a component-embedded multilayer printed wiring board having a reduced total board thickness can be obtained without lowering the insulation reliability even if the number of layers is further increased.

The present invention according to claim 3, wherein the insulator is manufactured according to claim 1 or 2 wherein the component built-in multilayer printed wiring board, characterized in that it has a lower modulus of elasticity than that of the insulating resin layer after curing The method solves the above problems.
Thus, by preventing the growth of microcracks, a component built-in type multilayer printed wiring board having a reduced total board thickness can be obtained without lowering the insulation reliability.

  The component built-in type multilayer printed wiring board obtained by the present invention maintains insulation reliability between the built-in component and the upper layer wiring circuit by disposing an insulator immediately above the built-in component. In addition, since the total thickness of the component built-in type multilayer printed wiring board can be reduced, it can be easily mounted on portable devices and the like that are required to be lighter and thinner.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a schematic cross-sectional configuration explanatory view showing an example of a component built-in multilayer printed wiring board according to the present invention. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a schematic cross-sectional process explanatory diagram illustrating an example of a method for producing a component built-in multilayer printed wiring board according to the present invention. FIG. 3 is a schematic cross-sectional process explanatory diagram following FIG. 2. FIG. 4 is a schematic cross-sectional process explanatory diagram following FIG. 3. FIG. 5 is a schematic cross-sectional process explanatory diagram subsequent to FIG. 4. FIG. 6 is a schematic cross-sectional process explanatory diagram following FIG. 5. FIG. 7 is a schematic cross-sectional process explanatory diagram following FIG. 6. FIG. 8 is a schematic cross-sectional process explanatory diagram following FIG. 7. FIG. 9 is a schematic cross-sectional process explanatory diagram following FIG. 8. Schematic cross-sectional process explanatory drawing which shows an example of the manufacturing method of the conventional component built-in type multilayer printed wiring board. FIG. 11 is a schematic cross-sectional process explanatory diagram following FIG. 10. FIG. 12 is a schematic cross-sectional process explanatory diagram following FIG. 11. FIG. 13 is a schematic cross-sectional process explanatory diagram following FIG. 12. The schematic cross-sectional process explanatory drawing which shows an example of the manufacturing method of another conventional component built-in type multilayer printed wiring board.

An embodiment of the present invention will be described with reference to FIG.
1A is a component-embedded multilayer printed wiring board having a double-sided board structure showing the simplest structure of the present invention, and FIG. 1B is a component-embedded multilayer printed wiring board further multilayered. .

  In FIG. 1 (a), P1 (a) is a component built-in type multilayer printed wiring board, which includes a component 102 and an insulating resin layer 101 provided with an insulator 103 disposed above the component 102, The wiring circuit 104 is disposed on the insulating resin layer 101 and the wiring circuit 105 is disposed on the lower layer of the insulating resin layer 101 and includes a region for mounting components. In addition, the insulator 103 is cured in advance before the curing process of the insulating resin layer 101, and no wiring circuit exists in the insulating resin layer 101.

  In FIG. 1 (b), P1 (b) requires a build-up resin 106 and a wiring circuit 107 on both sides of P1 (a) in addition to the above-described P1 (a). An interlayer connection via 108 for electrically connecting the wiring circuit 104 and the wiring circuit 107 at any arbitrary position is provided.

Here, in FIGS. 1A and 1B, a general-purpose type chip-type component is described as an example of the component 102. However, in the present invention, the component is not limited to the chip-type component. Rather, it shows all mounting-type electronic components.
In addition, as a means for joining the component to the copper foil, it is possible to use all means for bringing the joint together, for example, soldering method such as solder, solid phase diffusion bonding method such as wire bonding or room temperature bonding, conductivity, etc. Examples include adhesion methods using adhesive members using pastes, conductive adhesives, conductive films, anisotropic conductive adhesives, anisotropic conductive films, etc., regardless of the fixing method, members, materials, and conditions. However, in this case, considering that there is a reflow process for mounting the outermost component after the inner component mounting process, the bonding material of the inner component mounting part is remelted and the inner layer mounting pad short circuit It is desirable to use a conductive paste that does not easily cause problems due to the above.

In addition, general solder has a self-alignment function for centering a minute misalignment of a mounted component at the time of melting, but since an electrically conductive paste does not have a self-alignment function, an insulating resin layer ( For example, it is necessary for the opening (piercing through) of the prepreg to have a larger clearance from the component as compared with the case where general solder is used.
If the clearance is increased, the amount of resin in the insulating resin layer drawn into the clearance increases, so that it is more difficult to ensure the thickness of the insulating layer on the upper part than when using a general solder.

However, according to the present invention, since the insulator 103 cured in advance before the lamination process is provided between the component 102 and the upper wiring circuit 104, the insulation reliability between the component 102 and the upper wiring circuit 104 is provided. Deterioration can be avoided.
Therefore, according to the present invention, the component-embedded multilayer printed wiring with a small total board thickness that can ensure the thickness necessary for maintaining the insulation reliability of the insulator 103 and the insulating resin layer 101 on the built-in component 102. A board is obtained.

Further, the component built-in type multilayer printed wiring board according to this embodiment has a coreless substrate structure, and the component built-in insulating resin layer has no wiring circuit.
Accordingly, since there is no wiring circuit irregularity inside the component-embedded insulating resin layer, the resin that flows out of the insulating resin layer (for example, prepreg) that is an interlayer insulating material and an embedding material during the lamination process embeds the wiring circuit irregularities. In comparison with the case where there is a wiring circuit inside the component-embedded insulating resin layer, it is difficult for defects such as resin shortage to occur when the clearance around the component is embedded.

In the past, even with this coreless substrate structure, since the insulator 103 in the present invention did not exist, the flow of resin changed due to variations in the amount of resin impregnated by the prepreg, or shape processing of the prepreg It is difficult to precisely control the change in the amount and the like, and it is therefore difficult to secure the necessary and sufficient insulation thickness above the built-in component.
Furthermore, if the insulation thickness of the upper part of the built-in component is not sufficient, insulation reliability with the upper-layer wiring circuit cannot be secured, and as a result, it is difficult to provide the wiring circuit on the upper layer of the built-in component. .
Therefore, according to the present invention, it is possible to ensure insulation between the built-in component 102 and the wiring circuit 104 on the upper layer of the component. Therefore, the wiring circuit is also routed to the region directly above the built-in component that could not be routed conventionally. Thus, the degree of freedom in design is improved and the total number of build-up layers can be reduced as compared with the prior art, and the total thickness of the component built-in multilayer printed wiring board can be reduced.

In addition, since the insulator 103 that has been hardened in advance is provided between the component 102 and the wiring circuit 104 on the upper side before the stacking step, the present invention absorbs height variations and the like that occur during mounting. Insulation reliability deterioration between the component 102 and the upper wiring circuit 104 can be avoided.
Therefore, according to the present invention, since the insulator 103 is disposed immediately above the built-in component 102, insulation reliability between the built-in component 102 and the wiring circuit 104 in the upper layer can be maintained. In addition, the thickness required to maintain the insulation reliability by the insulator 103 is secured in advance, so the components can be built in without worrying about manufacturing margins such as the amount of resin flowing out of the insulating resin layer and the excess or insufficient amount of resin flowing in. The total thickness of the multilayer printed wiring board can be reduced.

Further, as the insulator 103, by selecting an insulator having an elastic modulus lower than that of the insulating resin layer 101, it is possible to prevent the growth of microcracks generated at the interface between the component 102 and the insulating resin layer 101.
This is because the insulator 103 having a lower elastic modulus than the insulating resin layer 101 is disposed at the lower part of the circuit, so that when the insulating resin layer 101 is cured after being laminated, the built-in component 102 and the resin of the insulating resin layer 101 Due to the difference in the coefficient of linear expansion, microcracks that occur near the lower part of the circuit are measures against making it difficult to ensure insulation reliability.
Therefore, in the present invention, the first insulating material having a lower elastic modulus than that of the insulating resin layer 101 is provided between the built-in component 102 and the wiring circuit 104 thereabove to prevent the growth of the microcracks. As a result, the total board thickness of the component built-in multilayer printed wiring board can be reduced without lowering the insulation reliability.

  The linear expansion coefficient of the resin impregnated in the prepreg is usually 10 to 50 ppm / ° C., and the linear expansion coefficient of the general-purpose type chip part is about 6 to 8 ppm / ° C. In the case of a structure in which cracks are likely to occur and the circuit is inside the insulating resin layer 101, the circuit can be supported by the elastic modulus of the circuit upper support that is outside the insulating resin layer 101, but the circuit is outside the insulating resin layer 101. In the case of the structure, all the stress is applied to the insulating resin layer 101, and cracks are more likely to occur.

Further, by providing an insulator having an elastic modulus lower than that of the insulating resin layer 101 as the insulator 103 in the lower part of the circuit, the stress applied to the upper circuit is relieved and the occurrence of cracks can be reduced.
In order for the insulator 103 to exert the above-described effects, it is desirable that its elastic modulus is less than or equal to half of the elastic modulus of the insulating resin layer 101 after curing, particularly about 1/10.
This is because if the difference between the elastic modulus of the insulating resin layer 101 after curing and the elastic modulus of the insulator 103 is more than half, microcracks are generated in the insulator 103 itself without preventing the growth of microcracks. It is because it ends up.
Incidentally, since the insulator 103 is naturally a part of the substrate structure, an elastic modulus that is at least established as a substrate is required.
Therefore, it is effective to set the elastic modulus of the insulator 103 to about 2 to 10 Gpa with respect to the insulating resin layer 101 having an elastic modulus of about 23 to 25 Gpa.

  According to the experiments of the present inventors, when a general-purpose chip type component having a linear expansion coefficient of 6 to 8 ppm / ° C. is embedded and laminated in a prepreg whose impregnated resin has a linear expansion coefficient of 10 to 50 ppm / ° C. In general, the insulating resin layer 101 having an elastic modulus of about 23 to 25 GPa has been confirmed to have an effect of preventing the growth of microcracks with the insulator 103 in the range of 2 to 4 GPa, particularly 2.4 to 3.4 GPa. In this range, a further excellent effect of preventing the growth of microcracks was confirmed.

Further, by selecting an insulator having a lower elastic modulus than that of the insulating resin layer 101, the insulator 103 intervenes between the insulator 103 and the component 102 in which the resin that has flowed out of the insulating resin layer at the time of stacking is formed. It is easy to do, and insulation reliability can be made more reliable.
Therefore, in the present invention, the insulator 103 is not arranged directly on the component 102 but is arranged between the component 102 and the upper wiring circuit 104 of the component, so that the wiring circuit of the component 102 and the upper layer of the component is used. The insulation reliability with 104 can be made more reliable.

The insulator 103 can be made of any material or material as long as it can maintain insulation with the built-in component 102 with a thickness after curing and satisfies the elastic modulus for stress relaxation. When laminate molding, the melt viscosity of the insulating resin decreases, and if reinforcing materials such as cloth or nonwoven fabric come into contact with the built-in component, the pressure during lamination molding may be applied to the component, causing damage to the component or cracking of the component. Therefore, it is more preferable that the insulator 103 does not include a reinforcing material such as cloth or nonwoven fabric.
Further, according to the present invention, since the insulator 103 that has been hardened before the laminating process is disposed between the component 102 and the wiring circuit 104 in the upper layer of the component, the variation in the resin content of the prepreg itself before opening, and the prepreg that has opened It is not necessary to consider both the amount of resin impregnated in the resin, and only the thickness of the prepreg needs to be considered.

In addition, due to the density of the arrangement of the built-in component 102, the resin for forming the component built-in insulating resin layer is insufficient, and even if the resin on the component is thin enough that the insulation between the component and the upper circuit cannot be maintained, wiring Since the film thickness sufficient to ensure the insulation reliability with the circuit is secured, deterioration of the insulation reliability can be prevented.
Therefore, according to the present invention, it is possible to improve the design ease of the substrate.
The insulator 103 is preferably in the range of 2 to 50 μm because the thinner the insulator 103 can contribute to the reduction of the total plate thickness as long as the necessary insulating properties can be maintained.

Next, the manufacturing method of embodiment of this invention is demonstrated using FIGS.
First, as shown to Fig.2 (a), the 1st support body P2 provided with the copper foil 202 which is the 1st conductor layer which can peel from the 1st carrier 201 after the lamination process on the one side of the 1st carrier 201 is shown. prepare.
The first carrier 201 has a cured resin plate, a single-sided copper foil substrate, a double-sided copper foil substrate, and a multilayer substrate, as long as there are no problems in the subsequent step of disposing the insulator and the first conductor layer peeling step. In addition, a metal plate may be used instead of the resin substrate.

Next, as shown in FIG. 2B, an uncured insulator 203 is applied on the copper foil 202 and cured.
Note that the insulator 203 can be made of any material or method as long as it can maintain insulation with the built-in component at the thickness after curing and satisfies the elastic modulus for stress relaxation.
For example, a thermosetting resin may be applied on the entire surface, or unnecessary portions may be removed by sandblasting, laser processing, or the like.
Alternatively, only a necessary portion may be formed selectively using a photosensitive insulating material.
The insulator may be applied to the entire surface of the copper foil 202 when the number of mounted components is large. However, when the number of components is small, the insulator is mounted at the position of each mounted component. If it is arranged only in the same size as the top view, the material can be reduced and the production cost can be reduced.
As another method of arranging the insulator 203 on the copper foil 202, the already cured insulator 203 is arranged on each region of the first support corresponding to each mounted component via an adhesive layer. Also good.

Next, as shown to Fig.3 (a), the 2nd support body P3 provided with the copper foil 302 which is the 2nd conductor layer which can peel from the 2nd carrier 301 after the lamination process on the one side of the 2nd carrier 301. As shown in FIG. Prepare.
In addition, the second carrier 301 is a cured resin plate, a single-sided copper foil substrate, a double-sided copper foil substrate, if there are no problems in the subsequent step of arranging the second insulator and the peeling step of the second conductor layer, Any of the multilayer substrates may be used, and a metal plate may be used instead of the resin substrate.
Further, the second carrier may not be used as long as components can be mounted.

Next, as shown in FIG. 3B, the component 303 is mounted on the copper foil 302 of the second support P3.
As a means for joining the component to the copper foil, any material and shape such as solder, conductive paste, conductive adhesive, conductive film, anisotropic conductive adhesive, anisotropic conductive film, etc. may be used. First, it is possible to use all means for fixing the mounted component to the copper foil and providing conductive bonding, but here, the reflow for mounting the outermost layer component after mounting the built-in component on the inner layer Considering that there is a process, it is desirable to use a conductive paste that is less likely to cause problems due to remelting after mounting.

Next, as shown in FIG. 4, an opening 402 is provided in the insulating resin layer 401, which is a semi-cured prepreg, in accordance with the mounting region of the component 303 mounted on the second support P3.
The above-mentioned “providing the opening 402” means that the component mounted on the second support is fixed from the periphery of the component in a state where the component is mounted so that the prepreg can be laid up without contacting the component. This means opening to a size having a clearance. Specifically, a clearance of 0.01 to 0.1 mm is provided from a placed component in consideration of a manufacturing margin such as variations in component mounting position accuracy. It is desirable.
Also, if necessary, the prepreg lays up the prepreg with the same shape opening so that the thickness of the component is embedded after lamination, thereby suppressing problems in insulation reliability due to lack of insulating resin. I can do it.
For example, when the height of a built-in component (the size in the Z-axis direction from the board mounting surface to the top surface of the component when mounted) is 330 mm in the maximum dimension, it is desirable to design a prepreg of about 350 mm.

Next, as shown in FIG. 5A, an insulating resin layer 401 opened is laid up on the second support P3 on which the component 303 is mounted, and the prepreg is placed on the uppermost layer in the laid-up state. The first support P2 is laid up and laminated so that the insulator 203 faces down, that is, the component 303 mounted on the second support, so that the component 303 as shown in FIG. And the laminated body P5 which has the insulating resin layer 501 in which the insulator 203 was incorporated is obtained.
Next, as shown to Fig.6 (a), the 1st carrier 201 and the 2nd carrier 301 are peeled from the laminated body P5, and the laminated body P6 is obtained.

Next, as shown in FIG. 6B, after providing the through hole 601 in the laminate P6, as shown in FIG. 6C, electroless plating and electrolytic plating are performed to fill the through hole. At the same time, a conductor layer 602 is formed on the entire surface and a circuit is formed to obtain a laminate P7 as shown in FIG.
In addition, when the circuit is formed, if an etching solution that can etch only the conductor without dissolving the bonding member is used, the liquid does not attack the bonding member. It is possible to prevent the exposed mounting pads and component electrodes from being eroded and to avoid connection failures and component failures due to unintentional etching.
The laminated body P7 is subjected to a post-process in a general printed wiring board manufacturing process, if necessary, to become a component-embedded multilayer printed wiring board having a double-sided board structure.

When the above double-sided substrate structure requires further multilayering, the following steps are performed.
That is, as shown in FIG. 7B, the laminate P8 shown in FIG. 7C is obtained by laying up and laminating the buildup resin 701 and the copper foil 702 on the upper and lower sides of the laminate P7. .
Next, as shown in FIG. 8A, after the non-through hole 801 is provided in the laminate P8, electroless plating and electrolytic plating are performed as shown in FIG. Then, this is formed into a circuit to obtain a component built-in type multilayer printed wiring board P9 as shown in FIG.

  In the description of the present invention, the above-described embodiment has been described as an example. However, the configuration of the present invention is not limited to these, and is not limited to these examples, and is within the scope of the present invention. Various changes are possible.

101, 501: insulating resin layers 102, 303, 1004, 1404: parts 103, 203: insulators 104, 105, 107: wiring circuits 106, 701, 1201: build-up resin 108: interlayer connection vias 201, 301, 1002, 1402: Carriers 202, 302, 702, 1001, 1006, 1202, 1401, 1406: Copper foil 401, 1005, 1405: Insulating resin layer 402: Openings 601, 1101: Through holes 602, 802, 1102: Conductor layer 801 1203: Non-through holes 1003, 1403: Mounting pads 1411, 1412, 1421, 1422, 1431, 1432: Regions P1 (a), P1 (b), P9, P132, P143: Built-in component type multilayer printed wiring boards P2, P3 : Supports P5 to P8, P103, P111 to P11 , P122, P123, P131, P142: laminate P101, P102, P141: substrate

Claims (3)

  1.   A step of providing a hardened insulator on the first conductor layer of the first support having the first conductor layer, and mounting a component on the second conductor layer of the second support having the second conductor layer A step of opening a semi-cured insulating resin layer in accordance with a region of a component mounted on the second conductor layer, and an insulating resin layer having undergone the opening step on the second support. A first lay-up step of superimposing at least a height at which the component is buried after the lamination step, and an insulating resin layer superimposed on the second support so that the insulator faces the insulating resin layer side. A second layup step of superimposing one support, a step of obtaining a first laminate by laminating the second support through the first and second layup steps, and a first and a second from the first laminate. Removing the two supports to obtain a second laminate, and the second laminate Including a step of providing a through-hole to obtain a third laminate, a step of plating the third laminate to obtain a fourth laminate, and a step of forming a circuit on the fourth laminate to obtain a fifth laminate. A method of manufacturing a component-embedded multilayer printed wiring board characterized by the above.
  2. Wherein in the plating Fourth obtain a laminate process, a manufacturing method of claim 1, wherein the component built-in multilayer printed wiring board, which is a hole filling plating.
  3. It said insulating material The method according to claim 1 or 2 wherein the component built-in multilayer printed wiring board, characterized in that it has a lower modulus of elasticity than that of the insulating resin layer after curing.
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