JP5490525B2 - Component built-in type multilayer printed wiring board and method for manufacturing the same - Google Patents

Component built-in type multilayer printed wiring board and method for manufacturing the same Download PDF

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JP5490525B2
JP5490525B2 JP2009297005A JP2009297005A JP5490525B2 JP 5490525 B2 JP5490525 B2 JP 5490525B2 JP 2009297005 A JP2009297005 A JP 2009297005A JP 2009297005 A JP2009297005 A JP 2009297005A JP 5490525 B2 JP5490525 B2 JP 5490525B2
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JP2011138873A (en
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智恵美 岩藤
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日本シイエムケイ株式会社
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Description

本発明は多層プリント配線板、特に内層に電子部品を埋め込んだ部品内蔵型多層プリント配線板及びその製造方法に関する。   The present invention relates to a multilayer printed wiring board, and more particularly to a component built-in type multilayer printed wiring board in which an electronic component is embedded in an inner layer and a method for manufacturing the same.

近年の電子機器のスリム化志向に伴い、内層に実装タイプの電子部品を埋め込んだ部品内蔵基板に対しても総板厚の薄型化の要求がある。
実装タイプの部品内蔵基板の総板厚を薄くする手法の1つとしては、内蔵する部品を薄型化するやり方があるが、これは、必要十分な特性が得られなかったり、部品コストや製造コストの上昇といった問題がある為、一般市販の安価なチップ型部品等、内蔵する部品を変更せずに基板総板厚を薄くすることが望まれる。
With the recent trend toward slimming down electronic devices, there is also a demand for thinning the total thickness of a component-embedded board in which mounting type electronic components are embedded in the inner layer.
One way to reduce the total thickness of a mounting-type component-embedded board is to reduce the thickness of the built-in component, but this does not provide the necessary and sufficient characteristics, as well as component and manufacturing costs. Therefore, it is desired to reduce the total thickness of the substrate without changing the built-in components such as a commercially available inexpensive chip-type component.

内蔵する部品を変更せずに基板総板厚を薄くする手法として、従来より、部品を実装したコア基板の部品収容部に当たる部分に、予め開口部が設けられた絶縁樹脂層を配置し、更に、上層にコア基板を配置した部品内蔵基板が知られている(例えば特許文献1)。
しかしながら、特許文献1のように、コア基板に部品を実装し当該部品を内蔵した場合、コア基板の厚みにより部品内蔵基板自体の総板厚を薄くすることが出来なかった。
As a method of reducing the total board thickness without changing the built-in components, conventionally, an insulating resin layer provided with an opening in advance is disposed in a portion corresponding to the component housing portion of the core substrate on which the components are mounted, and further A component-embedded substrate in which a core substrate is disposed in an upper layer is known (for example, Patent Document 1).
However, as in Patent Document 1, when a component is mounted on a core substrate and the component is incorporated, the total thickness of the component-embedded substrate itself cannot be reduced due to the thickness of the core substrate.

そこで、更なる薄型化を目的とし、絶縁樹脂層内部に部品を内蔵し内層をコアレス構造とした部品内蔵基板が提案されている(例えば特許文献2)。
しかしながら、特許文献2のように、コアレス部分に部品を内蔵した場合、部品内蔵基板の総板厚を薄くすることは可能であったが、内蔵された部品の電極と、上層の配線回路との絶縁信頼性を確保することが難しかった。
また、絶縁信頼性を確保する為に、絶縁樹脂層の厚みを増加させると、本来の目的である部品内蔵基板の薄型化を達成することが難しかった。
Therefore, for the purpose of further thinning, a component-embedded substrate in which a component is built in an insulating resin layer and the inner layer is a coreless structure has been proposed (for example, Patent Document 2).
However, when components are incorporated in the coreless part as in Patent Document 2, it is possible to reduce the total thickness of the component-embedded substrate, but the electrodes of the incorporated components and the upper layer wiring circuit It was difficult to ensure insulation reliability.
Further, if the thickness of the insulating resin layer is increased in order to ensure insulation reliability, it has been difficult to achieve a reduction in the thickness of the component-embedded substrate, which is the original purpose.

ここで、従来手法の一例を図10乃至図14を用いて説明する。
先ず、図10(a)に示すように、片面にキャリア1002を有する銅箔1001のもう一方の面に、めっき液耐性のあるドライフィルムフォトレジストで実装パッド1003を形成する為のマスクを形成し、ニッケルと金のめっき後、マスクを除去し、実装パッド1003を備えた基材P101を得る。
次に、図10(b)に示すように、部品1004の電極が所望の実装パッド1003と接するように図示しない接着剤を介して部品1004を実装し、部品実装基材P102を得る。
Here, an example of the conventional method will be described with reference to FIGS.
First, as shown in FIG. 10A, a mask for forming a mounting pad 1003 with a plating film resistant dry film photoresist is formed on the other surface of the copper foil 1001 having a carrier 1002 on one side. After plating with nickel and gold, the mask is removed to obtain a base material P101 provided with the mounting pads 1003.
Next, as shown in FIG. 10B, the component 1004 is mounted via an adhesive (not shown) so that the electrode of the component 1004 is in contact with the desired mounting pad 1003 to obtain a component mounting substrate P102.

次に、図10(c)に示すように、部品実装基材P102と、部品の位置と対応する部位に所望の開口部を設けた複数枚の絶縁層(ガラスクロス入りプリプレグ材)1005と、銅箔1006の構成でレイアップし積層することで、図10(d)に示すような積層体P103を得る。
次に、図11(a)に示すように、キャリア1002を剥離し、積層体P111を得る。
次に、図11(b)に示すように、積層体P111に貫通穴1101を設けた後、両面の銅箔1001及び銅箔1006をエッチングにより除去し積層体P112を得る。
次に、図11(c)に示すように、積層体P112に無電解めっき及び電解めっきを行い、貫通穴1101が穴埋めされると共に表層に導体層1102が形成された積層体P113を得る。
次に、図11(d)に示すように、積層体P113を回路形成し、積層体P114を得る。
Next, as shown in FIG. 10 (c), a component mounting substrate P102, and a plurality of insulating layers (glass cloth-containing prepreg materials) 1005 provided with desired openings at positions corresponding to the positions of the components, By laying up and laminating with the configuration of the copper foil 1006, a laminate P103 as shown in FIG. 10 (d) is obtained.
Next, as shown in FIG. 11A, the carrier 1002 is peeled off to obtain a stacked body P111.
Next, as shown in FIG.11 (b), after providing the through-hole 1101 in the laminated body P111, the copper foil 1001 and the copper foil 1006 of both surfaces are removed by an etching, and the laminated body P112 is obtained.
Next, as shown in FIG. 11C, electroless plating and electrolytic plating are performed on the multilayer body P112 to obtain a multilayer body P113 in which the through holes 1101 are filled and the conductor layer 1102 is formed on the surface layer.
Next, as shown in FIG. 11D, the multilayer body P113 is formed into a circuit to obtain the multilayer body P114.

次に、図12(a)に示すように、積層体P114の上下各々に、ビルドアップ樹脂1201と銅箔1202をレイアップし、積層することで、図12(b)に示す積層体P122を得る。
次に、図12(c)に示すように、積層体P122に、非貫通穴1203を設け、積層体P123を得る。
Next, as shown in FIG. 12 (a), the build-up resin 1201 and the copper foil 1202 are laid up and laminated on the upper and lower sides of the laminate P114, thereby stacking the laminate P122 shown in FIG. 12 (b). obtain.
Next, as shown in FIG.12 (c), the non-through-hole 1203 is provided in the laminated body P122, and the laminated body P123 is obtained.

次に、図13(a)に示すように、積層体P123に無電解めっき及び電解めっきを行い、導体層1301が形成された積層体P131を得る。
次に、図13(b)に示すように、積層体P131に回路形成を施すことで、部品内蔵型多層プリント配線板P132を得る。
Next, as illustrated in FIG. 13A, the multilayer body P <b> 123 is subjected to electroless plating and electrolytic plating to obtain a multilayer body P <b> 131 in which the conductor layer 1301 is formed.
Next, as shown in FIG. 13B, a circuit is formed on the multilayer body P131 to obtain a component built-in multilayer printed wiring board P132.

ここで、内蔵した部品とその上層回路との間に必要な絶縁信頼性を得る為に、図10(c)に示す積層前のレイアップ時に、開口部を設けた絶縁層の重ね枚数を増加させたり、開口部を設けた絶縁層の上に開口部を設けていない絶縁層を追加する等して、絶縁層の総厚みを厚くして絶縁信頼性を確保することは可能であるが、総板厚の薄い部品内蔵基板を得ることが困難と成ってしまう問題があった。
また、図10(c)に示す積層前のレイアップ時に、図14(a)に示すように開口部を設けた絶縁層1405の重ね枚数を減らして、絶縁層の総厚みを薄くすることは可能であるが、絶縁層の開口部は内蔵される部品の大きさよりも大きく開口される為、内蔵される部品と絶縁層とのクリアランスをフローした樹脂が埋めることと成り、図14(b)に示すように内蔵された部品上部の絶縁層厚みを均一且つ適正に保つことが難しく成り、結果、図14(c)に示すように、部品1404とその上層回路1436とのクリアランスにばらつきがある絶縁信頼性に不安が発生し、状態をもたらすこととなる。
Here, in order to obtain necessary insulation reliability between the built-in component and its upper layer circuit, the number of stacked insulating layers provided with openings is increased at the time of layup before stacking shown in FIG. It is possible to secure insulation reliability by increasing the total thickness of the insulating layer, such as by adding an insulating layer that does not provide an opening over the insulating layer provided with an opening, There is a problem that it is difficult to obtain a component-embedded substrate having a thin total thickness.
Further, at the time of laying up before stacking shown in FIG. 10C, reducing the total number of insulating layers 1405 provided with openings as shown in FIG. 14A to reduce the total thickness of the insulating layers. Although the opening of the insulating layer is opened larger than the size of the built-in component, the resin that has flowed through the clearance between the built-in component and the insulating layer is filled, and FIG. As shown in FIG. 14, it becomes difficult to keep the thickness of the insulating layer on the built-in component uniform and appropriate. As a result, as shown in FIG. 14C, the clearance between the component 1404 and its upper layer circuit 1436 varies. Anxiety arises in the insulation reliability and brings about a state.

特に、上述の開口部への樹脂流れ込みによるクリアランスばらつきは、部品が個々に離れて点在してしる領域(図14(c)では領域1431)よりも、複数の部品が一箇所に密集して実装されている領域(図14(c)では領域1432)の方が部品上部の樹脂厚みが薄くなる傾向にあり、絶縁信頼性劣化がより懸念される領域となる。
また、内蔵する部品の形状や数量、各々の部品と開口部に設定されたクリアランス値等によっても絶縁樹脂層から流れ出る樹脂量やクリアランスに流れ込む樹脂量が変化する為、内蔵された全ての部品上部の絶縁層厚みを安定して十分に確保出来ず、設計や製造の難易度が増すと共に、歩留まり低下や製品品質劣化が発生してしまうという問題があった。
In particular, the variation in clearance due to the resin flowing into the opening described above is that a plurality of components are more concentrated in one place than the region where the components are scattered separately (region 1431 in FIG. 14C). In the region mounted in this manner (region 1432 in FIG. 14C), the resin thickness at the upper part of the component tends to be thinner, and the insulation reliability deterioration is more a concern.
In addition, since the amount of resin flowing out of the insulating resin layer and the amount of resin flowing into the clearance also change depending on the shape and quantity of the built-in components, the clearance value set for each component and opening, etc., the upper part of all the built-in components Insulating layer thickness cannot be ensured stably and sufficiently, and the difficulty of design and manufacturing increases, and the yield and product quality deteriorate.

特開2008−078573号公報JP 2008-078573 A 特開2005−217372号公報JP 2005-217372 A

本発明は、前述の問題と実状に鑑みて成されたもので、汎用部品であるチップ型部品を内蔵する部品内蔵型多層プリント配線板に関して、総板厚を薄くする為にコアレス基板に部品を内蔵しても、内蔵された部品の電極と上層の配線層との絶縁性を保つことが出来る部品内蔵型多層プリント配線板及びその製造方法を提供することを課題とする。   The present invention has been made in view of the above-mentioned problems and actual circumstances. With regard to a component built-in type multilayer printed wiring board that incorporates a chip-type component that is a general-purpose component, the component is attached to the coreless substrate in order to reduce the total thickness. It is an object of the present invention to provide a component built-in type multilayer printed wiring board that can maintain the insulation between the electrode of the incorporated component and the upper wiring layer even if it is built in, and a method for manufacturing the same.

請求項に係る本発明は、第一導体層を有する第一支持体の当該第一導体層上に、硬化した絶縁物を設ける工程と、第二導体層を有する第二支持体の当該第二導体層上に、部品を実装する工程と、半硬化状態の絶縁樹脂層を、当該第二導体層上に実装された部品の領域に合せて開口する工程と、当該第二支持体上に当該開口工程を経た絶縁樹脂層を、少なくとも積層工程後に当該部品が埋まる高さまで重ね合わせる第一レイアップ工程と、当該第二支持体に重ね合わせた絶縁樹脂層上に、当該絶縁物が当該絶縁樹脂層側を向くように当該第一支持体を重ね合わせる第二レイアップ工程と、当該第一及び第二レイアップ工程を経た第二支持体を積層し第一積層体を得る工程と、当該第一積層体から第一及び第二支持体を取り除き第二積層体を得る工程と、当該第二積層体に貫通穴を設け第三積層体を得る工程と、第三積層体にめっきを施し第四積層体を得る工程と、第四積層体に回路形成を施し第五積層体を得る工程と、を含むことを特徴とする部品内蔵型多層プリント配線板の製造方法により上記課題を解決したものである。
これにより、絶縁信頼性を低下させること無く、総板厚を薄くした部品内蔵型多層プリント配線板が得られる。
The present invention according to claim 1 provides a step of providing a cured insulator on the first conductor layer of the first support having the first conductor layer, and the second support of the second support having the second conductor layer. Mounting the component on the two-conductor layer, opening the semi-cured insulating resin layer in accordance with the region of the component mounted on the second conductor layer, and on the second support A first layup process in which the insulating resin layer that has undergone the opening process is overlapped at least to a height at which the component is buried after the laminating process, and the insulating material is insulated on the insulating resin layer superimposed on the second support. A second layup step of superimposing the first support so as to face the resin layer side, a step of obtaining a first laminate by laminating the second support through the first and second layup steps, and Remove the first and second supports from the first laminate to obtain the second laminate A step of providing a third laminate by providing a through-hole in the second laminate, a step of obtaining a fourth laminate by plating the third laminate, and forming a circuit on the fourth laminate by fifth. The above-mentioned problems are solved by a method for manufacturing a component-embedded multilayer printed wiring board, comprising a step of obtaining a laminate.
Thereby, a component built-in type multilayer printed wiring board having a reduced total board thickness can be obtained without deteriorating the insulation reliability.

請求項に係る本発明は、前記第四積層体を得る工程に於けるめっきが、穴埋めめっきであることを特徴とする請求項記載の部品内蔵型多層プリント配線板の製造方法により上記課題を解決したものである。
これにより、更なる多層化をしても、絶縁信頼性を低下させること無く、総板厚を薄くした部品内蔵型多層プリント配線板が得られる。
According to a second aspect of the present invention, in the method for producing a component built-in multilayer printed wiring board according to the first aspect, the plating in the step of obtaining the fourth laminate is hole filling plating. Is a solution.
As a result, a component-embedded multilayer printed wiring board having a reduced total board thickness can be obtained without lowering the insulation reliability even if the number of layers is further increased.

請求項に係る本発明は、前記絶縁物が、硬化後の絶縁樹脂層より低い弾性率を有していることを特徴とする請求項1または2記載の部品内蔵型多層プリント配線板の製造方法により上記課題を解決したものである。
これにより、マイクロクラックの成長を阻止することで、絶縁信頼性を低下させること無く、総板厚を薄くした部品内蔵型多層プリント配線板が得られる。
The present invention according to claim 3, wherein the insulator is manufactured according to claim 1 or 2 wherein the component built-in multilayer printed wiring board, characterized in that it has a lower modulus of elasticity than that of the insulating resin layer after curing The method solves the above problems.
Thus, by preventing the growth of microcracks, a component built-in type multilayer printed wiring board having a reduced total board thickness can be obtained without lowering the insulation reliability.

本発明により得られた部品内蔵型多層プリント配線板は、内蔵された部品の直上に絶縁物が配置されていることにより、内蔵された部品とその上層の配線回路との絶縁信頼性を保つことが出来ると共に、部品内蔵型多層プリント配線板の総板厚を薄くすることが出来る為、更なる軽薄短小が求められる携帯機器等にも搭載が容易となる。   The component built-in type multilayer printed wiring board obtained by the present invention maintains insulation reliability between the built-in component and the upper layer wiring circuit by disposing an insulator immediately above the built-in component. In addition, since the total thickness of the component built-in type multilayer printed wiring board can be reduced, it can be easily mounted on portable devices and the like that are required to be lighter and thinner.

本発明の部品内蔵型多層プリント配線板の一例を示す概略断面構成説明図。BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a schematic cross-sectional configuration explanatory view showing an example of a component built-in multilayer printed wiring board according to the present invention. 本発明の部品内蔵型多層プリント配線板の製造方法の一例を示す概略断面工程説明図。BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a schematic cross-sectional process explanatory diagram illustrating an example of a method for producing a component built-in multilayer printed wiring board according to the present invention. 図2に続く概略断面工程説明図。FIG. 3 is a schematic cross-sectional process explanatory diagram following FIG. 2. 図3に続く概略断面工程説明図。FIG. 4 is a schematic cross-sectional process explanatory diagram following FIG. 3. 図4に続く概略断面工程説明図。FIG. 5 is a schematic cross-sectional process explanatory diagram subsequent to FIG. 4. 図5に続く概略断面工程説明図。FIG. 6 is a schematic cross-sectional process explanatory diagram following FIG. 5. 図6に続く概略断面工程説明図。FIG. 7 is a schematic cross-sectional process explanatory diagram following FIG. 6. 図7に続く概略断面工程説明図。FIG. 8 is a schematic cross-sectional process explanatory diagram following FIG. 7. 図8に続く概略断面工程説明図。FIG. 9 is a schematic cross-sectional process explanatory diagram following FIG. 8. 従来の部品内蔵型多層プリント配線板の製造方法の一例を示す概略断面工程説明図。Schematic cross-sectional process explanatory drawing which shows an example of the manufacturing method of the conventional component built-in type multilayer printed wiring board. 図10に続く概略断面工程説明図。FIG. 11 is a schematic cross-sectional process explanatory diagram following FIG. 10. 図11に続く概略断面工程説明図。FIG. 12 is a schematic cross-sectional process explanatory diagram following FIG. 11. 図12に続く概略断面工程説明図。FIG. 13 is a schematic cross-sectional process explanatory diagram following FIG. 12. 別の従来の部品内蔵型多層プリント配線板の製造方法の一例を示す概略断面工程説明図。The schematic cross-sectional process explanatory drawing which shows an example of the manufacturing method of another conventional component built-in type multilayer printed wiring board.

本発明の実施の形態を図1を用いて説明する。
尚、図1(a)は本発明の最も単純な構造を示す両面基板構造の部品内蔵型多層プリント配線板であり、図1(b)は更に多層化した部品内蔵型多層プリント配線板である。
An embodiment of the present invention will be described with reference to FIG.
1A is a component-embedded multilayer printed wiring board having a double-sided board structure showing the simplest structure of the present invention, and FIG. 1B is a component-embedded multilayer printed wiring board further multilayered. .

図1(a)に於いて、P1(a)は部品内蔵型多層プリント配線板で、部品102と、当該部品102上部に配された絶縁物103とを内部に備えた絶縁樹脂層101と、当該絶縁樹脂層101の上層に配された配線回路104と、当該絶縁樹脂層101の下層に配された、部品を実装する領域を含む配線回路105とを有している。また、当該絶縁物103は、絶縁樹脂層101の硬化工程前に予め硬化されていると共に、当該絶縁樹脂層101には配線回路が存在しない。   In FIG. 1 (a), P1 (a) is a component built-in type multilayer printed wiring board, which includes a component 102 and an insulating resin layer 101 provided with an insulator 103 disposed above the component 102, The wiring circuit 104 is disposed on the insulating resin layer 101 and the wiring circuit 105 is disposed on the lower layer of the insulating resin layer 101 and includes a region for mounting components. In addition, the insulator 103 is cured in advance before the curing process of the insulating resin layer 101, and no wiring circuit exists in the insulating resin layer 101.

また、図1(b)に於いて、P1(b)は、上述のP1(a)に加えて、P1(a)の両面各々に、ビルドアップ樹脂106と配線回路107とを配し、必要な任意の箇所の配線回路104と配線回路107とを電気的に接続する層間接続ビア108を有している。   In FIG. 1 (b), P1 (b) requires a build-up resin 106 and a wiring circuit 107 on both sides of P1 (a) in addition to the above-described P1 (a). An interlayer connection via 108 for electrically connecting the wiring circuit 104 and the wiring circuit 107 at any arbitrary position is provided.

ここで、図1(a)及び(b)では部品102の一例として汎用タイプのチップ型部品を用いて説明しているが、本発明に於いて部品とはチップ型部品に限定されるものではなく、実装タイプの電子部品全般を示す。
また、部品を銅箔に接合する為の手段としては、接合をもたらす手段全般を用いることが可能で、例えばはんだ等のろうづけ法、ワイヤボンディングや常温接合等の固相拡散接合法、導電性ペースト、導電性接着剤、導電性フィルム、異方導電性接着剤、異方導電性フィルム等を用いた接着部材による接着法等が挙げられ、その固着方法、部材、材質、状態の如何を問わないが、ここでは、内層の部品実装工程後に、最外層の部品実装の為のリフロー工程があることを考慮して、内層の部品実装部の接合材が再溶融し、内層の実装パッド間短絡による不具合が発生し難い導電性ペーストを用いることが望ましい。
Here, in FIGS. 1A and 1B, a general-purpose type chip-type component is described as an example of the component 102. However, in the present invention, the component is not limited to the chip-type component. Rather, it shows all mounting-type electronic components.
In addition, as a means for joining the component to the copper foil, it is possible to use all means for bringing the joint together, for example, soldering method such as solder, solid phase diffusion bonding method such as wire bonding or room temperature bonding, conductivity, etc. Examples include adhesion methods using adhesive members using pastes, conductive adhesives, conductive films, anisotropic conductive adhesives, anisotropic conductive films, etc., regardless of the fixing method, members, materials, and conditions. However, in this case, considering that there is a reflow process for mounting the outermost component after the inner component mounting process, the bonding material of the inner component mounting part is remelted and the inner layer mounting pad short circuit It is desirable to use a conductive paste that does not easily cause problems due to the above.

尚、一般的なはんだは実装された部品の微細な位置ずれを溶融時にセンタリングするセルフアライメント機能を有するが、導電性ペーストにはセルフアライメント機能が無い為、部品を内蔵する為の絶縁樹脂層(例えばプリプレグ)の開口部(刳り貫き)は、一般的なはんだを用いた場合と比較して、部品とのクリアランスをより大き目に取る必要が有る。
クリアランスが大きくなれば、当該クリアランスに引き込まれる絶縁樹脂層の樹脂量が多くなる為、一般的なはんだを用いた場合以上に、部品上部の絶縁層の厚みを確保することが難しくなる。
In addition, general solder has a self-alignment function for centering a minute misalignment of a mounted component at the time of melting, but since an electrically conductive paste does not have a self-alignment function, an insulating resin layer ( For example, it is necessary for the opening (piercing through) of the prepreg to have a larger clearance from the component as compared with the case where general solder is used.
If the clearance is increased, the amount of resin in the insulating resin layer drawn into the clearance increases, so that it is more difficult to ensure the thickness of the insulating layer on the upper part than when using a general solder.

しかし、本発明は、積層工程よりも前に予め硬化した絶縁物103を、部品102とその上部の配線回路104との間に設けている為、部品102と上部の配線回路104との絶縁信頼性劣化を回避することが出来る。
従って、本発明によれば、内蔵された部品102上部の絶縁物103及び絶縁樹脂層101が絶縁信頼性を保つ為に必要な厚みを確実に確保出来る総板厚が薄い部品内蔵型多層プリント配線板が得られる。
However, according to the present invention, since the insulator 103 cured in advance before the lamination process is provided between the component 102 and the upper wiring circuit 104, the insulation reliability between the component 102 and the upper wiring circuit 104 is provided. Deterioration can be avoided.
Therefore, according to the present invention, the component-embedded multilayer printed wiring with a small total board thickness that can ensure the thickness necessary for maintaining the insulation reliability of the insulator 103 and the insulating resin layer 101 on the built-in component 102. A board is obtained.

また、この実施の形態に係る部品内蔵型多層プリント配線板はコアレス基板構造であり、部品内蔵絶縁樹脂層には配線回路が無い。
従って、部品内蔵絶縁樹脂層内部には配線回路の凹凸が無い為、積層工程時に層間絶縁材であると共に埋め込み材となる絶縁樹脂層(例えばプリプレグ)から流れ出た樹脂が、配線回路の凹凸の埋め込みに費やされることが無く、部品内蔵絶縁樹脂層の内部に配線回路がある場合と比較して、部品周囲のクリアランスを埋め込むことに対しては、樹脂不足等の不具合が発生し難い。
Further, the component built-in type multilayer printed wiring board according to this embodiment has a coreless substrate structure, and the component built-in insulating resin layer has no wiring circuit.
Accordingly, since there is no wiring circuit irregularity inside the component-embedded insulating resin layer, the resin that flows out of the insulating resin layer (for example, prepreg) that is an interlayer insulating material and an embedding material during the lamination process embeds the wiring circuit irregularities. In comparison with the case where there is a wiring circuit inside the component-embedded insulating resin layer, it is difficult for defects such as resin shortage to occur when the clearance around the component is embedded.

因に、従来は、このコアレス基板構造をもってしても、本発明における絶縁物103が存在しなかったため、プリプレグの含浸する樹脂量のばらつきや、プリプレグの形状加工をすることによって変化したフローする樹脂量の変化等を、的確に設計制御することは難しく、それが故に内蔵部品上部の絶縁厚みを必要十分に確保することが困難であった。
更に、内蔵された部品の上部の絶縁厚みが十分でないと、上層の配線回路との絶縁信頼性が確保出来ず、結果として、内蔵された部品の上層に配線回路を設けることが困難であった。
従って、本発明によれば、内蔵された部品102と当該部品の上層の配線回路104との絶縁を確保し得るので、従来は配線回路が引き回せなかった内蔵部品直上領域にも配線回路を引き回すことが可能と成り、設計自由度が向上すると共に、従来よりビルドアップ層の総数を減らすことが可能と成り、部品内蔵型多層プリント配線板の総板厚を薄くすることが出来る。
In the past, even with this coreless substrate structure, since the insulator 103 in the present invention did not exist, the flow of resin changed due to variations in the amount of resin impregnated by the prepreg, or shape processing of the prepreg It is difficult to precisely control the change in the amount and the like, and it is therefore difficult to secure the necessary and sufficient insulation thickness above the built-in component.
Furthermore, if the insulation thickness of the upper part of the built-in component is not sufficient, insulation reliability with the upper-layer wiring circuit cannot be secured, and as a result, it is difficult to provide the wiring circuit on the upper layer of the built-in component. .
Therefore, according to the present invention, it is possible to ensure insulation between the built-in component 102 and the wiring circuit 104 on the upper layer of the component. Therefore, the wiring circuit is also routed to the region directly above the built-in component that could not be routed conventionally. Thus, the degree of freedom in design is improved and the total number of build-up layers can be reduced as compared with the prior art, and the total thickness of the component built-in multilayer printed wiring board can be reduced.

また、本発明は、積層工程よりも前に、予め硬化した絶縁物103を、部品102とその上部の配線回路104との間に設けている為、実装時に発生する高さばらつき等を吸収し、部品102と上部の配線回路104との絶縁信頼性劣化を回避することが出来る。
従って、本発明によれば、内蔵された部品102の直上に絶縁物103が配置されていることにより、内蔵された部品102とその上層の配線回路104との絶縁信頼性を保つことが出来ると共に、当該絶縁物103により絶縁信頼性を保つ為に必要な厚みが予め確保されている為、絶縁樹脂層から流れ出る樹脂量や流れ込む樹脂量の過不足等の製造マージンを意識することなく、部品内蔵型多層プリント配線板の総板厚を薄くすることが出来る。
In addition, since the insulator 103 that has been hardened in advance is provided between the component 102 and the wiring circuit 104 on the upper side before the stacking step, the present invention absorbs height variations and the like that occur during mounting. Insulation reliability deterioration between the component 102 and the upper wiring circuit 104 can be avoided.
Therefore, according to the present invention, since the insulator 103 is disposed immediately above the built-in component 102, insulation reliability between the built-in component 102 and the wiring circuit 104 in the upper layer can be maintained. In addition, the thickness required to maintain the insulation reliability by the insulator 103 is secured in advance, so the components can be built in without worrying about manufacturing margins such as the amount of resin flowing out of the insulating resin layer and the excess or insufficient amount of resin flowing in. The total thickness of the multilayer printed wiring board can be reduced.

また、絶縁物103は、絶縁樹脂層101より低い弾性率の絶縁物を選択することで、部品102と絶縁樹脂層101との界面に発生するマイクロクラックの成長を阻止することが出来る。
これは、回路の下部に絶縁樹脂層101より低い弾性率の絶縁物103を配置することで、絶縁樹脂層101が積層後に硬化する際、内蔵された部品102と絶縁樹脂層101の樹脂との線膨張係数の違いにより、回路下部付近に発生するマイクロクラックが、絶縁信頼性の確保を難しくさせることに対する対策となる。
従って、本発明において、絶縁樹脂層101より低い弾性率の第一絶縁性物を、内蔵される部品102とその上部の配線回路104との間に設けることで、当該マイクロクラックの成長を阻止することが出来、結果、絶縁信頼性を低下させること無く、部品内蔵型多層プリント配線板の総板厚を薄くすることが出来る。
Further, as the insulator 103, by selecting an insulator having an elastic modulus lower than that of the insulating resin layer 101, it is possible to prevent the growth of microcracks generated at the interface between the component 102 and the insulating resin layer 101.
This is because the insulator 103 having a lower elastic modulus than the insulating resin layer 101 is disposed at the lower part of the circuit, so that when the insulating resin layer 101 is cured after being laminated, the built-in component 102 and the resin of the insulating resin layer 101 Due to the difference in the coefficient of linear expansion, microcracks that occur near the lower part of the circuit are measures against making it difficult to ensure insulation reliability.
Therefore, in the present invention, the first insulating material having a lower elastic modulus than that of the insulating resin layer 101 is provided between the built-in component 102 and the wiring circuit 104 thereabove to prevent the growth of the microcracks. As a result, the total board thickness of the component built-in multilayer printed wiring board can be reduced without lowering the insulation reliability.

尚、プリプレグに含浸した樹脂の線膨張係数は通常10〜50ppm/℃、汎用タイプのチップ型部品の線膨張係数は大凡6〜8ppm/℃である為、その線膨張係数の差で絶縁樹脂にクラックが生じ易く、回路が絶縁樹脂層101の内側にある構造の場合には絶縁樹脂層101の外側となる回路上部支持体の弾性率で回路を支持出来るが、回路が絶縁樹脂層101の外側にある構造の場合には全ての応力が絶縁樹脂層101に掛ることと成りクラックがより発生し易い状態となる。   The linear expansion coefficient of the resin impregnated in the prepreg is usually 10 to 50 ppm / ° C., and the linear expansion coefficient of the general-purpose type chip part is about 6 to 8 ppm / ° C. In the case of a structure in which cracks are likely to occur and the circuit is inside the insulating resin layer 101, the circuit can be supported by the elastic modulus of the circuit upper support that is outside the insulating resin layer 101, but the circuit is outside the insulating resin layer 101. In the case of the structure, all the stress is applied to the insulating resin layer 101, and cracks are more likely to occur.

また、絶縁物103として絶縁樹脂層101より弾性率が低い絶縁物を回路下部に設けることで、上部回路に掛る応力が緩和されクラックの発生が低減出来る。
絶縁物103が上述の効果を発揮するには、その弾性率は硬化後の絶縁樹脂層101の弾性率の半分以下、特に10分の1程度とするのが望ましい。
これは、硬化後の絶縁樹脂層101の弾性率と絶縁物103の弾性率の差が半分以上であると、マイクロクラックの成長を阻止することなく、絶縁物103自体にもマイクロクラックが発生してしまう為である。
因に、絶縁物103は、当然基板構成体の一部である為、最低限基板として成立する弾性率は必要となる。
従って、通常23〜25Gpa程度の弾性率を有する絶縁樹脂層101に対して、絶縁物103の弾性率を2〜10Gpa程度とするのが効果的である。
Further, by providing an insulator having an elastic modulus lower than that of the insulating resin layer 101 as the insulator 103 in the lower part of the circuit, the stress applied to the upper circuit is relieved and the occurrence of cracks can be reduced.
In order for the insulator 103 to exert the above-described effects, it is desirable that its elastic modulus is less than or equal to half of the elastic modulus of the insulating resin layer 101 after curing, particularly about 1/10.
This is because if the difference between the elastic modulus of the insulating resin layer 101 after curing and the elastic modulus of the insulator 103 is more than half, microcracks are generated in the insulator 103 itself without preventing the growth of microcracks. It is because it ends up.
Incidentally, since the insulator 103 is naturally a part of the substrate structure, an elastic modulus that is at least established as a substrate is required.
Therefore, it is effective to set the elastic modulus of the insulator 103 to about 2 to 10 Gpa with respect to the insulating resin layer 101 having an elastic modulus of about 23 to 25 Gpa.

尚、本発明者の実験によれば、含浸した樹脂の線膨張係数が10〜50ppm/℃のプリプレグに、6〜8ppm/℃の線膨張係数を持つ汎用タイプのチップ型部品を埋め込み積層する際、通常23〜25Gpa程度の弾性率を有する絶縁樹脂層101に対して、2〜4GPaの範囲の絶縁物103で、マイクロクラックの成長を阻止する効果が確認され、特に2.4〜3.4GPaの範囲に於いて更に優れたマイクロクラックの成長阻止効果が確認された。   According to the experiments of the present inventors, when a general-purpose chip type component having a linear expansion coefficient of 6 to 8 ppm / ° C. is embedded and laminated in a prepreg whose impregnated resin has a linear expansion coefficient of 10 to 50 ppm / ° C. In general, the insulating resin layer 101 having an elastic modulus of about 23 to 25 GPa has been confirmed to have an effect of preventing the growth of microcracks with the insulator 103 in the range of 2 to 4 GPa, particularly 2.4 to 3.4 GPa. In this range, a further excellent effect of preventing the growth of microcracks was confirmed.

また、絶縁物103は、絶縁樹脂層101より低い弾性率の絶縁物を選択することで、積層形成時に絶縁樹脂層から流れ出た樹脂が絶縁物103と内蔵された部品102との間にも介入し易く、絶縁信頼性をより確実なものとすることが出来る。
従って、本発明においては、絶縁物103を部品102に直接配置するのではなく、部品102と部品上層の配線回路104の間に配置された形態とすることによって、部品102と部品上層の配線回路104との絶縁信頼性を、より確実なものとすることが出来る。
Further, by selecting an insulator having a lower elastic modulus than that of the insulating resin layer 101, the insulator 103 intervenes between the insulator 103 and the component 102 in which the resin that has flowed out of the insulating resin layer at the time of stacking is formed. It is easy to do, and insulation reliability can be made more reliable.
Therefore, in the present invention, the insulator 103 is not arranged directly on the component 102 but is arranged between the component 102 and the upper wiring circuit 104 of the component, so that the wiring circuit of the component 102 and the upper layer of the component is used. The insulation reliability with 104 can be made more reliable.

また、絶縁物103は、硬化後の厚みにて内蔵された部品102との絶縁性を保持出来、且つ応力緩和の為の弾性率を満していれば、その材料や材質等は問わないが、積層成型時に、絶縁樹脂の溶融粘度が下がり、クロスや不織布等の補強材が内蔵部品に接触すると、積層成型時の圧力が部品へ掛り、部品の破損や部品のクラックが発生してしまう恐れがある為、絶縁物103は内部にクロスや不織布等の補強材を含まない方がより好ましい。
また、本発明により、積層工程より以前に予め硬化した絶縁物103を部品102と部品上層の配線回路104の間に配置する為、開口前のプリプレグ自体の含有樹脂割合のばらつきと、開口したプリプレグに含浸されていた樹脂量の両方に配慮する必要がなく成り、プリプレグの厚みのみを配慮すれば良い。
The insulator 103 can be made of any material or material as long as it can maintain insulation with the built-in component 102 with a thickness after curing and satisfies the elastic modulus for stress relaxation. When laminate molding, the melt viscosity of the insulating resin decreases, and if reinforcing materials such as cloth or nonwoven fabric come into contact with the built-in component, the pressure during lamination molding may be applied to the component, causing damage to the component or cracking of the component. Therefore, it is more preferable that the insulator 103 does not include a reinforcing material such as cloth or nonwoven fabric.
Further, according to the present invention, since the insulator 103 that has been hardened before the laminating process is disposed between the component 102 and the wiring circuit 104 in the upper layer of the component, the variation in the resin content of the prepreg itself before opening, and the prepreg that has opened It is not necessary to consider both the amount of resin impregnated in the resin, and only the thickness of the prepreg needs to be considered.

加えて、内蔵する部品102の配置の粗密により、部品内蔵絶縁樹脂層を形成する樹脂が不足し、部品上の樹脂が部品と上部回路との絶縁性を保てない程薄く成っても、配線回路との絶縁信頼性を確保するだけの膜厚が確保されている為、絶縁信頼性の劣化を防ぐことが出来る。
従って、本発明によれば、基板の設計容易性を向上させることが出来る。
尚、絶縁物103は、必要な絶縁性が保てる範囲で、薄い方が総板厚の薄型化にもより貢献出来る為、2〜50μm程度の皮膜形状が望ましい。
In addition, due to the density of the arrangement of the built-in component 102, the resin for forming the component built-in insulating resin layer is insufficient, and even if the resin on the component is thin enough that the insulation between the component and the upper circuit cannot be maintained, wiring Since the film thickness sufficient to ensure the insulation reliability with the circuit is secured, deterioration of the insulation reliability can be prevented.
Therefore, according to the present invention, it is possible to improve the design ease of the substrate.
The insulator 103 is preferably in the range of 2 to 50 μm because the thinner the insulator 103 can contribute to the reduction of the total plate thickness as long as the necessary insulating properties can be maintained.

次に、本発明の実施の形態の製造方法を図2〜図7を用いて説明する。
先ず、図2(a)に示すように、第一キャリア201の片側に、積層工程後に第一キャリア201から剥離が可能な第一導体層である銅箔202を備えた第一支持体P2を用意する。
尚、第一キャリア201は、その後の絶縁物を配する工程と、第一導体層の剥離工程に於いて不具合が無ければ、硬化した樹脂板、片面銅箔基板、両面銅箔基板、多層基板の何れでも良く、また、樹脂基板の代わりに金属板でも構わない。
Next, the manufacturing method of embodiment of this invention is demonstrated using FIGS.
First, as shown to Fig.2 (a), the 1st support body P2 provided with the copper foil 202 which is the 1st conductor layer which can peel from the 1st carrier 201 after the lamination process on the one side of the 1st carrier 201 is shown. prepare.
The first carrier 201 has a cured resin plate, a single-sided copper foil substrate, a double-sided copper foil substrate, and a multilayer substrate, as long as there are no problems in the subsequent step of disposing the insulator and the first conductor layer peeling step. In addition, a metal plate may be used instead of the resin substrate.

次に、図2(b)に示すように、銅箔202上に未硬化状態の絶縁物203を塗布し、硬化させる。
尚、絶縁物203は、硬化後の厚みにて内蔵部品との絶縁性を保持出来、且つ応力緩和の為の弾性率を満たしていれば材料や工法等は問わない。
例えば、熱硬化型の樹脂で、全面に塗布しても良いし、サンドブラストやレーザ加工等で不要な部位を除去しても良い。
また、光感光型の絶縁材料を用いて、選択的に必要な部位のみ形成しても良い。
また、絶縁物は、実装した部品点数が多い場合には銅箔202上全面に塗布しても構わないが、部品点数が少ない場合には、実装した各部品の位置に、当該各部品の実装時上面視外形と同等程度の大きさのみに配置すれば、材料の削減と成り、生産コストを抑えることが出来る。
また、銅箔202上に絶縁物203を配する別の方法として、実装した各部品に相当する第一支持体の各領域に、接着層を介して、既に硬化した絶縁物203を配しても良い。
Next, as shown in FIG. 2B, an uncured insulator 203 is applied on the copper foil 202 and cured.
Note that the insulator 203 can be made of any material or method as long as it can maintain insulation with the built-in component at the thickness after curing and satisfies the elastic modulus for stress relaxation.
For example, a thermosetting resin may be applied on the entire surface, or unnecessary portions may be removed by sandblasting, laser processing, or the like.
Alternatively, only a necessary portion may be formed selectively using a photosensitive insulating material.
The insulator may be applied to the entire surface of the copper foil 202 when the number of mounted components is large. However, when the number of components is small, the insulator is mounted at the position of each mounted component. If it is arranged only in the same size as the top view, the material can be reduced and the production cost can be reduced.
As another method of arranging the insulator 203 on the copper foil 202, the already cured insulator 203 is arranged on each region of the first support corresponding to each mounted component via an adhesive layer. Also good.

次に、図3(a)に示すように、第二キャリア301の片側に、積層工程後に第二キャリア301から剥離が可能な第二導体層である銅箔302を備えた第二支持体P3を用意する。
尚、第二キャリア301は、その後の第二絶縁物を配する工程と、第二導体層の剥離工程に於いて不具合が無ければ、硬化した樹脂板、片面銅箔基板、両面銅箔基板、多層基板の何れでも良く、また、樹脂基板の代わりに金属板でも構わない。
また、部品の実装が可能であれば、第二キャリアを用いなくても構わない。
Next, as shown to Fig.3 (a), the 2nd support body P3 provided with the copper foil 302 which is the 2nd conductor layer which can peel from the 2nd carrier 301 after the lamination process on the one side of the 2nd carrier 301. As shown in FIG. Prepare.
In addition, the second carrier 301 is a cured resin plate, a single-sided copper foil substrate, a double-sided copper foil substrate, if there are no problems in the subsequent step of arranging the second insulator and the peeling step of the second conductor layer, Any of the multilayer substrates may be used, and a metal plate may be used instead of the resin substrate.
Further, the second carrier may not be used as long as components can be mounted.

次に、図3(b)に示すように、第二支持体P3の銅箔302上に部品303を実装する。
尚、部品を銅箔に接合する為の手段としては、はんだ、導電性ペースト、導電性接着剤、導電性フィルム、異方導電性接着剤、異方導電性フィルム等、その材質及び形状を問わず、実装する部品を銅箔に固着させ、且つ導電性接合をもたらす手段全般を用いることが可能であるが、ここでは、内蔵する部品を内層に実装した後に最外層の部品実装の為のリフロー工程があることを考慮して、実装後の再溶融による不具合が発生し難い導電性ペーストを用いることが望ましい。
Next, as shown in FIG. 3B, the component 303 is mounted on the copper foil 302 of the second support P3.
As a means for joining the component to the copper foil, any material and shape such as solder, conductive paste, conductive adhesive, conductive film, anisotropic conductive adhesive, anisotropic conductive film, etc. may be used. First, it is possible to use all means for fixing the mounted component to the copper foil and providing conductive bonding, but here, the reflow for mounting the outermost layer component after mounting the built-in component on the inner layer Considering that there is a process, it is desirable to use a conductive paste that is less likely to cause problems due to remelting after mounting.

次に、図4に示すように、前記の第二支持体P3上に実装された部品303の実装領域に合せて、半硬化状態のプリプレグである絶縁樹脂層401に、開口部402を設ける。
尚、前記の「開口部402を設ける」とは、第二支持体上に実装された部品にプリプレグが接触せずにレイアップ出来るように、部品が実装された状態で部品の周囲から一定のクリアランスを有する大きさに開口することを意味し、具体的には、部品実装位置精度のばらつき等の製造マージンを加味して、配置された部品から0.01〜0.1mmのクリアランスを持たせることが望ましい。
また、プリプレグは、積層後に前記部品が埋め込まれる厚みとなるように、必要に応じて、同形状の開口を施したプリプレグをレイアップすることで、絶縁樹脂不足による絶縁信頼性の不具合を抑制することが出来る。
例えば、内蔵する部品の実装時の高さ(基板実装面から実装時の部品上面までのZ軸方向の大きさ)が、最大寸法で330mmの場合、350mm程度のプリプレグを設計することが望ましい。
Next, as shown in FIG. 4, an opening 402 is provided in the insulating resin layer 401, which is a semi-cured prepreg, in accordance with the mounting region of the component 303 mounted on the second support P3.
The above-mentioned “providing the opening 402” means that the component mounted on the second support is fixed from the periphery of the component in a state where the component is mounted so that the prepreg can be laid up without contacting the component. This means opening to a size having a clearance. Specifically, a clearance of 0.01 to 0.1 mm is provided from a placed component in consideration of a manufacturing margin such as variations in component mounting position accuracy. It is desirable.
Also, if necessary, the prepreg lays up the prepreg with the same shape opening so that the thickness of the component is embedded after lamination, thereby suppressing problems in insulation reliability due to lack of insulating resin. I can do it.
For example, when the height of a built-in component (the size in the Z-axis direction from the board mounting surface to the top surface of the component when mounted) is 330 mm in the maximum dimension, it is desirable to design a prepreg of about 350 mm.

次に、図5(a)に示すように、部品303が実装された第二支持体P3に、開口された絶縁樹脂層401をレイアップし、当該レイアップした中でプリプリグ最上位の上に、絶縁物203が下側つまり第二支持体に実装された部品303側を向くように第一支持体P2をレイアップし、積層することで、図5(b)に示すような、部品303及び絶縁物203が内蔵された絶縁樹脂層501を有する積層体P5を得る。
次に、図6(a)に示すように、積層体P5から、第一キャリア201と第二キャリア301を剥離し、積層体P6を得る。
Next, as shown in FIG. 5A, an insulating resin layer 401 opened is laid up on the second support P3 on which the component 303 is mounted, and the prepreg is placed on the uppermost layer in the laid-up state. The first support P2 is laid up and laminated so that the insulator 203 faces down, that is, the component 303 mounted on the second support, so that the component 303 as shown in FIG. And the laminated body P5 which has the insulating resin layer 501 in which the insulator 203 was incorporated is obtained.
Next, as shown to Fig.6 (a), the 1st carrier 201 and the 2nd carrier 301 are peeled from the laminated body P5, and the laminated body P6 is obtained.

次に、図6(b)に示すように、積層体P6に貫通穴601を設けた後、図6(c)に示すように、無電解めっき及び電解めっきを行い、貫通穴が穴埋めされると共に表層全面に導体層602が形成され、これを回路形成し、図7(a)に示すような積層体P7を得る。
尚、回路形成の際、接合部材は溶かさず導体のみをエッチングすることが可能なエッチング液を用いれば、液が接合部材を侵さない為、仮に、回路と部品の位置ずれが生じた際でも、露出した実装パッドや部品の電極が侵食をされることを防ぎ、不本意なエッチングによる接続不良や部品故障を回避出来る。
積層体P7は、必要に応じて、一般的なプリント配線板製造工程に於ける後工程を施して、両面基板構造の部品内蔵型多層プリント配線板となる。
Next, as shown in FIG. 6B, after providing the through hole 601 in the laminate P6, as shown in FIG. 6C, electroless plating and electrolytic plating are performed to fill the through hole. At the same time, a conductor layer 602 is formed on the entire surface and a circuit is formed to obtain a laminate P7 as shown in FIG.
In addition, when the circuit is formed, if an etching solution that can etch only the conductor without dissolving the bonding member is used, the liquid does not attack the bonding member. It is possible to prevent the exposed mounting pads and component electrodes from being eroded and to avoid connection failures and component failures due to unintentional etching.
The laminated body P7 is subjected to a post-process in a general printed wiring board manufacturing process, if necessary, to become a component-embedded multilayer printed wiring board having a double-sided board structure.

また、上述の両面基板構造に更なる多層化が必要な場合は、以下の工程を経る。
即ち、図7(b)に示すように、積層体P7の上下各々に、ビルドアップ樹脂701と銅箔702をレイアップし、積層することで、図7(c)に示す積層体P8を得る。
次に、図8(a)に示すように、積層体P8に、非貫通穴801を設けた後、図8(b)に示すように、無電解めっき及び電解めっきを行い、導体層802が形成され、これを回路形成し、図9に示すような部品内蔵型多層プリント配線板P9を得る。
When the above double-sided substrate structure requires further multilayering, the following steps are performed.
That is, as shown in FIG. 7B, the laminate P8 shown in FIG. 7C is obtained by laying up and laminating the buildup resin 701 and the copper foil 702 on the upper and lower sides of the laminate P7. .
Next, as shown in FIG. 8A, after the non-through hole 801 is provided in the laminate P8, electroless plating and electrolytic plating are performed as shown in FIG. Then, this is formed into a circuit to obtain a component built-in type multilayer printed wiring board P9 as shown in FIG.

本発明を説明するに当たって、前述の実施の形態を例として説明したが、本発明の構成はこれらの限りでなく、また、これらの例により何ら制限されるものではなく、本発明の範囲内で種々の変更が可能である。   In the description of the present invention, the above-described embodiment has been described as an example. However, the configuration of the present invention is not limited to these, and is not limited to these examples, and is within the scope of the present invention. Various changes are possible.

101,501:絶縁樹脂層
102,303,1004,1404:部品
103,203:絶縁物
104,105,107:配線回路
106,701,1201:ビルドアップ樹脂
108:層間接続ビア
201,301,1002,1402:キャリア
202,302,702,1001,1006,1202,1401,1406:銅箔
401,1005,1405:絶縁樹脂層
402:開口部
601,1101:貫通穴
602,802,1102:導体層
801,1203:非貫通穴
1003,1403:実装パッド
1411,1412,1421,1422,1431,1432:領域
P1(a),P1(b),P9,P132,P143:部品内蔵型多層プリント配線板
P2,P3:支持体
P5〜P8,P103,P111〜P114,P122,P123,P131,P142:積層体
P101,P102,P141:基材
101, 501: insulating resin layers 102, 303, 1004, 1404: parts 103, 203: insulators 104, 105, 107: wiring circuits 106, 701, 1201: build-up resin 108: interlayer connection vias 201, 301, 1002, 1402: Carriers 202, 302, 702, 1001, 1006, 1202, 1401, 1406: Copper foil 401, 1005, 1405: Insulating resin layer 402: Openings 601, 1101: Through holes 602, 802, 1102: Conductor layer 801 1203: Non-through holes 1003, 1403: Mounting pads 1411, 1412, 1421, 1422, 1431, 1432: Regions P1 (a), P1 (b), P9, P132, P143: Built-in component type multilayer printed wiring boards P2, P3 : Supports P5 to P8, P103, P111 to P11 , P122, P123, P131, P142: laminate P101, P102, P141: substrate

Claims (3)

第一導体層を有する第一支持体の当該第一導体層上に、硬化した絶縁物を設ける工程と、第二導体層を有する第二支持体の当該第二導体層上に、部品を実装する工程と、半硬化状態の絶縁樹脂層を、当該第二導体層上に実装された部品の領域に合せて開口する工程と、当該第二支持体上に当該開口工程を経た絶縁樹脂層を、少なくとも積層工程後に当該部品が埋まる高さまで重ね合わせる第一レイアップ工程と、当該第二支持体に重ね合わせた絶縁樹脂層上に、当該絶縁物が当該絶縁樹脂層側を向くように当該第一支持体を重ね合わせる第二レイアップ工程と、当該第一及び第二レイアップ工程を経た第二支持体を積層し第一積層体を得る工程と、当該第一積層体から第一及び第二支持体を取り除き第二積層体を得る工程と、当該第二積層体に貫通穴を設け第三積層体を得る工程と、第三積層体にめっきを施し第四積層体を得る工程と、第四積層体に回路形成を施し第五積層体を得る工程と、を含むことを特徴とする部品内蔵型多層プリント配線板の製造方法。   A step of providing a hardened insulator on the first conductor layer of the first support having the first conductor layer, and mounting a component on the second conductor layer of the second support having the second conductor layer A step of opening a semi-cured insulating resin layer in accordance with a region of a component mounted on the second conductor layer, and an insulating resin layer having undergone the opening step on the second support. A first lay-up step of superimposing at least a height at which the component is buried after the lamination step, and an insulating resin layer superimposed on the second support so that the insulator faces the insulating resin layer side. A second layup step of superimposing one support, a step of obtaining a first laminate by laminating the second support through the first and second layup steps, and a first and a second from the first laminate. Removing the two supports to obtain a second laminate, and the second laminate Including a step of providing a through-hole to obtain a third laminate, a step of plating the third laminate to obtain a fourth laminate, and a step of forming a circuit on the fourth laminate to obtain a fifth laminate. A method of manufacturing a component-embedded multilayer printed wiring board characterized by the above. 前記第四積層体を得る工程に於けるめっきが、穴埋めめっきであることを特徴とする請求項記載の部品内蔵型多層プリント配線板の製造方法。 Wherein in the plating Fourth obtain a laminate process, a manufacturing method of claim 1, wherein the component built-in multilayer printed wiring board, which is a hole filling plating. 前記絶縁物が、硬化後の絶縁樹脂層より低い弾性率を有していることを特徴とする請求項1または2記載の部品内蔵型多層プリント配線板の製造方法。 It said insulating material The method according to claim 1 or 2 wherein the component built-in multilayer printed wiring board, characterized in that it has a lower modulus of elasticity than that of the insulating resin layer after curing.
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