JP5464853B2 - 半導体装置の製造方法 - Google Patents
半導体装置の製造方法 Download PDFInfo
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- 239000004065 semiconductor Substances 0.000 title claims description 70
- 238000004519 manufacturing process Methods 0.000 title claims description 26
- 229910052751 metal Inorganic materials 0.000 claims description 45
- 239000002184 metal Substances 0.000 claims description 45
- 239000012535 impurity Substances 0.000 claims description 24
- 238000000034 method Methods 0.000 claims description 17
- FYYHWMGAXLPEAU-UHFFFAOYSA-N Magnesium Chemical compound [Mg] FYYHWMGAXLPEAU-UHFFFAOYSA-N 0.000 claims description 16
- 229910052746 lanthanum Inorganic materials 0.000 claims description 16
- FZLIPJUXYLNCLC-UHFFFAOYSA-N lanthanum atom Chemical compound [La] FZLIPJUXYLNCLC-UHFFFAOYSA-N 0.000 claims description 16
- 229910052749 magnesium Inorganic materials 0.000 claims description 15
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 14
- 239000000758 substrate Substances 0.000 claims description 12
- 239000011777 magnesium Substances 0.000 claims description 9
- 229910052782 aluminium Inorganic materials 0.000 claims description 8
- 239000000463 material Substances 0.000 claims description 7
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 16
- 229920005591 polysilicon Polymers 0.000 description 16
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 10
- 229910052814 silicon oxide Inorganic materials 0.000 description 10
- 238000000059 patterning Methods 0.000 description 9
- 230000007423 decrease Effects 0.000 description 8
- 229910021334 nickel silicide Inorganic materials 0.000 description 8
- RUFLMLWJRZAWLJ-UHFFFAOYSA-N nickel silicide Chemical compound [Ni]=[Si]=[Ni] RUFLMLWJRZAWLJ-UHFFFAOYSA-N 0.000 description 8
- 229910052581 Si3N4 Inorganic materials 0.000 description 6
- NRTOMJZYCJJWKI-UHFFFAOYSA-N Titanium nitride Chemical compound [Ti]#N NRTOMJZYCJJWKI-UHFFFAOYSA-N 0.000 description 6
- 230000006870 function Effects 0.000 description 6
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 6
- 125000006850 spacer group Chemical group 0.000 description 6
- 238000010586 diagram Methods 0.000 description 4
- 238000010438 heat treatment Methods 0.000 description 4
- 230000002093 peripheral effect Effects 0.000 description 4
- 230000000052 comparative effect Effects 0.000 description 3
- 230000000694 effects Effects 0.000 description 3
- AZDRQVAHHNSJOQ-UHFFFAOYSA-N alumane Chemical group [AlH3] AZDRQVAHHNSJOQ-UHFFFAOYSA-N 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 2
- 238000009792 diffusion process Methods 0.000 description 2
- 238000002955 isolation Methods 0.000 description 2
- MRELNEQAGSRDBK-UHFFFAOYSA-N lanthanum(3+);oxygen(2-) Chemical compound [O-2].[O-2].[O-2].[La+3].[La+3] MRELNEQAGSRDBK-UHFFFAOYSA-N 0.000 description 2
- 230000000295 complement effect Effects 0.000 description 1
- 238000006880 cross-coupling reaction Methods 0.000 description 1
- 239000012212 insulator Substances 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- CPLXHLVBOLITMK-UHFFFAOYSA-N magnesium oxide Inorganic materials [Mg]=O CPLXHLVBOLITMK-UHFFFAOYSA-N 0.000 description 1
- 239000000395 magnesium oxide Substances 0.000 description 1
- AXZKOIWUVFPNLO-UHFFFAOYSA-N magnesium;oxygen(2-) Chemical compound [O-2].[Mg+2] AXZKOIWUVFPNLO-UHFFFAOYSA-N 0.000 description 1
- 239000011159 matrix material Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- TWNQGVIAIRXVLR-UHFFFAOYSA-N oxo(oxoalumanyloxy)alumane Chemical compound O=[Al]O[Al]=O TWNQGVIAIRXVLR-UHFFFAOYSA-N 0.000 description 1
- 230000004044 response Effects 0.000 description 1
- 230000003068 static effect Effects 0.000 description 1
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Description
半導体基板上にp型不純物を注入することにより、p型の導電型を有する第1および第2のnMISチャネル領域が形成される。第1および第2のnMISチャネル領域上に高誘電率膜が形成される。高誘電率膜のうち第1のnMISチャネル領域上の部分を覆い、かつ高誘電率膜のうち第2のnMISチャネル領域上の部分を露出するように、ランタンおよびマグネシウムの少なくともいずれかを含有するnMISキャップ膜が形成される。第1のnMISチャネル領域上に高誘電率膜およびnMISキャップ膜を介して第1のnMIS金属電極が形成され、かつ第2のnMISチャネル領域上に高誘電率膜を介して第2のnMIS金属電極が形成される。nMISキャップ膜に含有されるランタンおよびマグネシウムの少なくともいずれかが高誘電率膜の第1のnMISチャネル領域上の部分に拡散される。
半導体基板上にn型不純物を注入することにより、n型の導電型を有する第1および第2のpMISチャネル領域が形成される。
高誘電率膜のうち第1のpMISチャネル領域上の部分を覆い、かつ高誘電率膜のうち第2のpMISチャネル領域上の部分を露出するように、アルミニウムを含有するpMISキャップ膜が形成される。
(実施の形態1)
図1は、本発明の実施の形態1における半導体装置の構成を概略的に示す部分断面図である。
図6は、本発明の実施の形態1に対する比較例における半導体装置の構成を概略的に示す部分断面図である。図6を参照して、比較例の半導体装置100nZにおいてnMISトランジスタTLnZおよびTHnZの各々は高誘電率膜HCnを有する。nMISトランジスタTHnZのしきい値をnMISトランジスタTLnZのしきい値よりも大きくするために、nMISトランジスタTHnZのチャネル領域CHnの不純物濃度は、nMISトランジスタTLnZのチャネル領域CLnの不純物濃度よりも高くされている。このためチャネル領域CHnにおいては不純物散乱の増大にともなう移動度の低下が生じる。これによりnMISトランジスタTHnZの駆動電流が低下してしまう。
図7は、本発明の実施の形態2における半導体装置の構成を概略的に示す部分断面図である。
なお、上記以外の構成については、上述した実施の形態1の構成とほぼ同じであるため、同一または対応する要素について同一の符号を付し、その説明を繰り返さない。
図12は、本発明の実施の形態3における半導体装置の構成を概略的に示す部分断面図である。図12を参照して、本実施の形態の半導体装置100cは、実施の形態2の半導体装置100pの構成に加えて、実施の形態1における第1および第2のnMISトランジスタT1n、T2nをさらに有する。
図13は、本発明の実施の形態4における半導体装置の構成を概略的に示す部分断面図である。図13を参照して、本実施の形態の半導体装置100cVは、実施の形態2の半導体装置100pの構成に加えて、実施の形態1における第1のnMISトランジスタT1nと、第2のnMISトランジスタT2nVとをさらに有する。第2のnMISトランジスタT2nVは、実施の形態1における第1のnMISトランジスタT1nと同様の構成を有する。
図14は、本発明の実施の形態5における半導体装置としての半導体記憶装置の構成を概略的に示すブロック図である。
Claims (6)
- 半導体基板上にp型不純物を注入することにより、p型の導電型を有する第1および第2のnMISチャネル領域を形成する工程と、
前記第1および第2のnMISチャネル領域上に高誘電率膜を形成する工程と、
前記高誘電率膜のうち前記第1のnMISチャネル領域上の部分を覆い、かつ前記高誘電率膜のうち前記第2のnMISチャネル領域上の部分を露出するように、ランタンおよびマグネシウムの少なくともいずれかを含有するnMISキャップ膜を形成する工程と、 前記第1のnMISチャネル領域上に前記高誘電率膜および前記nMISキャップ膜を介して第1のnMIS金属電極を形成し、かつ前記第2のnMISチャネル領域上に前記高誘電率膜を介して第2のnMIS金属電極を形成する工程と、
前記nMISキャップ膜に含有されるランタンおよびマグネシウムの少なくともいずれかを前記高誘電率膜の前記第1のnMISチャネル領域上の部分に拡散させる工程とを備えた、半導体装置の製造方法。 - 前記第1および第2のnMIS金属電極は一の材料からなる、請求項1に記載の半導体装置の製造方法。
- 前記第1および第2のnMISチャネル領域を形成する工程は、前記第1および第2のnMISチャネル領域の各々を同時に形成することにより行なわれる、請求項1または2に記載の半導体装置の製造方法。
- 半導体基板上にn型不純物を注入することにより、n型の導電型を有する第1および第2のpMISチャネル領域を形成する工程と、
前記第1および第2のpMISチャネル領域上に高誘電率膜を形成する工程と、
前記高誘電率膜のうち前記第1のpMISチャネル領域上の部分を覆い、かつ前記高誘電率膜のうち前記第2のpMISチャネル領域上の部分を露出するように、アルミニウムを含有するpMISキャップ膜を形成する工程と、
前記第1のpMISチャネル領域上に前記高誘電率膜および前記pMISキャップ膜を介して第1のpMIS金属電極を形成し、かつ前記第2のpMISチャネル領域上に前記高誘電率膜を介して第2のpMIS金属電極を形成する工程と、
前記pMISキャップ膜に含有されるアルミニウムを前記高誘電率膜の前記第1のpMISチャネル領域上の部分に拡散させる工程とを備えた、半導体装置の製造方法。 - 前記第1および第2のpMIS金属電極は一の材料からなる、請求項4に記載の半導体装置の製造方法。
- 前記第1および第2のpMISチャネル領域を形成する工程は、前記第1および第2のpMISチャネル領域の各々を同時に形成することにより行なわれる、請求項4または5に記載の半導体装置の製造方法。
Priority Applications (6)
Application Number | Priority Date | Filing Date | Title |
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JP2008335656A JP5464853B2 (ja) | 2008-12-29 | 2008-12-29 | 半導体装置の製造方法 |
US12/627,060 US8384160B2 (en) | 2008-12-29 | 2009-11-30 | Semiconductor device and method of manufacturing same |
TW098145158A TWI493691B (zh) | 2008-12-29 | 2009-12-25 | Semiconductor device and manufacturing method thereof |
CN200910265276.1A CN101771048B (zh) | 2008-12-29 | 2009-12-28 | 半导体器件及其制造方法 |
KR1020090131562A KR101658236B1 (ko) | 2008-12-29 | 2009-12-28 | 반도체 장치 및 그 제조 방법 |
US13/750,655 US8580632B2 (en) | 2008-12-29 | 2013-01-25 | Semiconductor device and method of manufacturing same |
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JP2008335656A JP5464853B2 (ja) | 2008-12-29 | 2008-12-29 | 半導体装置の製造方法 |
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JP5464853B2 true JP5464853B2 (ja) | 2014-04-09 |
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JP5147588B2 (ja) * | 2008-08-04 | 2013-02-20 | パナソニック株式会社 | 半導体装置 |
JP5444176B2 (ja) | 2010-09-14 | 2014-03-19 | パナソニック株式会社 | 半導体装置 |
WO2012107970A1 (ja) * | 2011-02-10 | 2012-08-16 | パナソニック株式会社 | 半導体装置 |
US20130049134A1 (en) * | 2011-08-30 | 2013-02-28 | Renesas Electronics Corporation | Semiconductor device and method of making same |
US9276004B2 (en) * | 2012-03-30 | 2016-03-01 | Broadcom Corporation | ROM arrays having memory cell transistors programmed using metal gates |
KR101923946B1 (ko) | 2012-08-31 | 2018-11-30 | 삼성전자 주식회사 | 반도체 장치 및 그 제조 방법 |
EP3832710B1 (en) * | 2013-09-27 | 2024-01-10 | INTEL Corporation | Non-planar i/o and logic semiconductor devices having different workfunction on common substrate |
KR102155511B1 (ko) * | 2013-12-27 | 2020-09-15 | 삼성전자 주식회사 | 반도체 장치 및 그 제조 방법 |
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JP3419597B2 (ja) * | 1995-07-11 | 2003-06-23 | 株式会社日立製作所 | 半導体集積回路装置の製造方法 |
JP4895430B2 (ja) * | 2001-03-22 | 2012-03-14 | ルネサスエレクトロニクス株式会社 | 半導体装置及び半導体装置の製造方法 |
JP2002368126A (ja) * | 2001-06-12 | 2002-12-20 | Hitachi Ltd | 半導体集積回路装置の製造方法 |
JP2005025907A (ja) * | 2003-07-03 | 2005-01-27 | Hitachi Ltd | 半導体集積回路装置 |
JP2006013092A (ja) | 2004-06-25 | 2006-01-12 | Rohm Co Ltd | 半導体装置及びその製造方法 |
US8618523B2 (en) * | 2006-05-31 | 2013-12-31 | Renesas Electronics Corporation | Semiconductor device |
JP4282691B2 (ja) | 2006-06-07 | 2009-06-24 | 株式会社東芝 | 半導体装置 |
US7432548B2 (en) * | 2006-08-31 | 2008-10-07 | Micron Technology, Inc. | Silicon lanthanide oxynitride films |
US7563730B2 (en) * | 2006-08-31 | 2009-07-21 | Micron Technology, Inc. | Hafnium lanthanide oxynitride films |
US7544604B2 (en) * | 2006-08-31 | 2009-06-09 | Micron Technology, Inc. | Tantalum lanthanide oxynitride films |
EP1944801A1 (en) * | 2007-01-10 | 2008-07-16 | Interuniversitair Microelektronica Centrum | Methods for manufacturing a CMOS device with dual work function |
JP5196954B2 (ja) * | 2007-10-31 | 2013-05-15 | 株式会社東芝 | 半導体装置の製造方法 |
JP2010056239A (ja) * | 2008-08-27 | 2010-03-11 | Fujitsu Microelectronics Ltd | 半導体装置及び半導体装置の製造方法 |
JP2010123669A (ja) * | 2008-11-18 | 2010-06-03 | Nec Electronics Corp | 半導体装置およびその製造方法 |
JP5127694B2 (ja) * | 2008-12-26 | 2013-01-23 | パナソニック株式会社 | 半導体装置及びその製造方法 |
JP2010157587A (ja) * | 2008-12-26 | 2010-07-15 | Panasonic Corp | 半導体装置及びその製造方法 |
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JP2010157641A (ja) | 2010-07-15 |
US20100164007A1 (en) | 2010-07-01 |
KR20100080412A (ko) | 2010-07-08 |
TW201025569A (en) | 2010-07-01 |
US20130137231A1 (en) | 2013-05-30 |
TWI493691B (zh) | 2015-07-21 |
US8580632B2 (en) | 2013-11-12 |
CN101771048B (zh) | 2014-08-13 |
US8384160B2 (en) | 2013-02-26 |
KR101658236B1 (ko) | 2016-09-22 |
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