JP5461212B2 - 配線基板 - Google Patents
配線基板 Download PDFInfo
- Publication number
- JP5461212B2 JP5461212B2 JP2010019109A JP2010019109A JP5461212B2 JP 5461212 B2 JP5461212 B2 JP 5461212B2 JP 2010019109 A JP2010019109 A JP 2010019109A JP 2010019109 A JP2010019109 A JP 2010019109A JP 5461212 B2 JP5461212 B2 JP 5461212B2
- Authority
- JP
- Japan
- Prior art keywords
- diameter
- hole
- wiring
- copper plating
- small
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
Landscapes
- Production Of Multi-Layered Print Wiring Board (AREA)
Description
図1は、本発明における配線基板の実施形態の一例を示す概略断面図であり、半導体集積回路素子をフリップチップ接続により搭載した場合を示している。
2 ビルドアップ絶縁層
3 ビルドアップ配線層
5 スルーホール
5S 小径スルーホール
5L 大径スルーホール
Claims (2)
- 外周部および中央部に、銅めっき層が被着された多数のスルーホールを有するコア基板の上下面にビルドアップ絶縁層を介して信号配線および接地配線および電源配線を含むビルドアップ配線層を積層してなる配線基板であって、前記外周部に小径スルーホールを第1の隣接間隔で配列するとともに前記中央部に大径スルーホールを前記第1の隣接間隔以下の第2の隣接間隔で配置し、かつ前記大径スルーホールの直径を、該大径スルーホールに被着された前記銅めっき層の総横断面積が、前記小径スルーホールと同径のスルーホールを前記中央部に前記第2の隣接間隔で配置して該同径のスルーホールに前記銅めっき層と同じ厚みの銅めっき層を被着させた場合の該銅めっき層の総横断面積よりも大きくなる大きさとし、前記小径スルーホールに前記信号線を接続するとともに前記大径スルーホールに前記接地配線および電源配線を接続したことを特徴とする配線基板。
- 前記小径スルーホールの直径が100〜200μmであり、前記大径スルーホールの直径が250〜350μmであることを特徴とする請求項1記載の配線基板。
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2010019109A JP5461212B2 (ja) | 2010-01-29 | 2010-01-29 | 配線基板 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2010019109A JP5461212B2 (ja) | 2010-01-29 | 2010-01-29 | 配線基板 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2011159734A JP2011159734A (ja) | 2011-08-18 |
JP5461212B2 true JP5461212B2 (ja) | 2014-04-02 |
Family
ID=44591451
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2010019109A Expired - Fee Related JP5461212B2 (ja) | 2010-01-29 | 2010-01-29 | 配線基板 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP5461212B2 (ja) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP6013960B2 (ja) * | 2013-03-28 | 2016-10-25 | 京セラ株式会社 | 配線基板 |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2793497B2 (ja) * | 1994-02-28 | 1998-09-03 | 茨城日本電気株式会社 | 高密度回路基板のビアホールの形成方法 |
JP4282190B2 (ja) * | 1999-12-14 | 2009-06-17 | イビデン株式会社 | 多層プリント配線板及び多層プリント配線板の製造方法 |
JP2003209359A (ja) * | 2002-01-11 | 2003-07-25 | Dainippon Printing Co Ltd | コア基板およびその製造方法 |
JP2005347391A (ja) * | 2004-06-01 | 2005-12-15 | Ibiden Co Ltd | プリント配線板 |
-
2010
- 2010-01-29 JP JP2010019109A patent/JP5461212B2/ja not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
JP2011159734A (ja) | 2011-08-18 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JP5122932B2 (ja) | 多層配線基板 | |
TWI573229B (zh) | 配線基板 | |
TWI528871B (zh) | 用於印刷電路板中以改良信號完整性之同軸通孔走線的方法及結構 | |
US20130180772A1 (en) | Wiring board and method of manufacturing the same | |
US20090200682A1 (en) | Via in via circuit board structure | |
KR20130087434A (ko) | 배선 기판 및 그것을 사용한 실장 구조체 | |
US20150305155A1 (en) | Wiring board | |
JP5311653B2 (ja) | 配線基板 | |
JP5730152B2 (ja) | 配線基板 | |
US8227699B2 (en) | Printed circuit board | |
JP5461212B2 (ja) | 配線基板 | |
JP2015211147A (ja) | 配線基板 | |
JP2010232616A (ja) | 半導体装置及び配線基板 | |
US9532468B2 (en) | Printed wiring board and method for manufacturing printed wiring board | |
JP2012033786A (ja) | 配線基板 | |
JP2005019730A (ja) | 配線基板およびそれを用いた電子装置 | |
KR101219929B1 (ko) | 인쇄회로기판 및 그의 제조 방법 | |
JP2015012112A (ja) | 配線基板 | |
JP2010519769A (ja) | 高速メモリパッケージ | |
JP6215784B2 (ja) | 配線基板 | |
KR20130120390A (ko) | 배선 기판, 실장 구조체, 배선 기판의 제조방법 및 실장 구조체의 제조방법 | |
JP5881170B2 (ja) | 配線基板 | |
JP4349891B2 (ja) | 配線基板および電子装置 | |
JP5890978B2 (ja) | 配線基板の製造方法 | |
US9412688B2 (en) | Wiring board |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20120830 |
|
A977 | Report on retrieval |
Free format text: JAPANESE INTERMEDIATE CODE: A971007 Effective date: 20130618 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20130624 |
|
A521 | Written amendment |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20130820 |
|
TRDD | Decision of grant or rejection written | ||
A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20140107 |
|
A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20140115 |
|
R150 | Certificate of patent or registration of utility model |
Free format text: JAPANESE INTERMEDIATE CODE: R150 |
|
S531 | Written request for registration of change of domicile |
Free format text: JAPANESE INTERMEDIATE CODE: R313531 |
|
S533 | Written request for registration of change of name |
Free format text: JAPANESE INTERMEDIATE CODE: R313533 |
|
R350 | Written notification of registration of transfer |
Free format text: JAPANESE INTERMEDIATE CODE: R350 |
|
S111 | Request for change of ownership or part of ownership |
Free format text: JAPANESE INTERMEDIATE CODE: R313111 |
|
R350 | Written notification of registration of transfer |
Free format text: JAPANESE INTERMEDIATE CODE: R350 |
|
LAPS | Cancellation because of no payment of annual fees |