JP5429092B2 - Semiconductor device and manufacturing method of semiconductor device - Google Patents

Semiconductor device and manufacturing method of semiconductor device Download PDF

Info

Publication number
JP5429092B2
JP5429092B2 JP2010163965A JP2010163965A JP5429092B2 JP 5429092 B2 JP5429092 B2 JP 5429092B2 JP 2010163965 A JP2010163965 A JP 2010163965A JP 2010163965 A JP2010163965 A JP 2010163965A JP 5429092 B2 JP5429092 B2 JP 5429092B2
Authority
JP
Japan
Prior art keywords
adhesive
circuit board
semiconductor device
base body
back surface
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2010163965A
Other languages
Japanese (ja)
Other versions
JP2012028443A (en
Inventor
岳史 石川
徹 野村
賢吾 岡
太助 福田
憲也 平沢
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Denso Corp
Original Assignee
Denso Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Denso Corp filed Critical Denso Corp
Priority to JP2010163965A priority Critical patent/JP5429092B2/en
Publication of JP2012028443A publication Critical patent/JP2012028443A/en
Application granted granted Critical
Publication of JP5429092B2 publication Critical patent/JP5429092B2/en
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/2902—Disposition
    • H01L2224/29023—Disposition the whole layer connector protruding from the surface
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/2919—Material with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/3205—Shape
    • H01L2224/32057—Shape in side view
    • H01L2224/32058—Shape in side view being non uniform along the layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/3205—Shape
    • H01L2224/32057—Shape in side view
    • H01L2224/32059—Shape in side view comprising protrusions or indentations
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4912—Layout
    • H01L2224/49175—Parallel arrangements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319—Arrangement of the layer connectors prior to mounting
    • H01L2224/83192—Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/832—Applying energy for connecting
    • H01L2224/83201—Compression bonding
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8336—Bonding interfaces of the semiconductor or solid state body
    • H01L2224/83365—Shape, e.g. interlocking features
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838—Bonding techniques
    • H01L2224/8385—Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/1901—Structure
    • H01L2924/19015—Structure including thin film passive components
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/191—Disposition
    • H01L2924/19101—Disposition of discrete passive components
    • H01L2924/19105—Disposition of discrete passive components in a side-by-side arrangement on a common die mounting substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/191—Disposition
    • H01L2924/19101—Disposition of discrete passive components
    • H01L2924/19107—Disposition of discrete passive components off-chip wires

Description

本発明は、接着剤により接着された回路基板およびベース体が封止部材により封止される半導体装置および半導体装置の製造方法に関するものである。   The present invention relates to a semiconductor device in which a circuit board and a base body bonded with an adhesive are sealed with a sealing member, and a method for manufacturing the semiconductor device.

従来、接着剤により接着された回路基板およびベース体が封止部材により封止される半導体装置では、接着剤として主にシリコーン系材料のものが採用されている。シリコーン系の接着剤は、接着時にシリコーン系材料の低分子成分が基板側面や表面まで染み出してしまう場合があり、このように染み出した低分子成分は密着力を低下させるため、モールド樹脂と基板との界面での剥離が引き起こされることがある。   Conventionally, in a semiconductor device in which a circuit board and a base body bonded by an adhesive are sealed by a sealing member, a silicone material is mainly used as the adhesive. Silicone-based adhesives may cause the low-molecular components of the silicone-based material to ooze out to the side or surface of the substrate during bonding, and the low-molecular components that ooze out in this way reduce the adhesive force. Separation at the interface with the substrate may be caused.

そこで、下記特許文献１に開示される半導体装置では、アルミナ基板（半導体素子）におけるリードフレームに搭載される面の外周部には、接着剤はみだし防止手段として突起が設けられている。これにより、リードフレームにアルミナ基板を搭載した際に、接着剤が突起よりも外周部にはみだすことが防止され、接着剤がアルミナ基板におけるパワーチップやチップコンデンサを搭載した面に流れてしまうことを防止している。   Therefore, in the semiconductor device disclosed in Patent Document 1 below, a protrusion is provided as an adhesive protrusion preventing means on the outer peripheral portion of the surface of the alumina substrate (semiconductor element) mounted on the lead frame. As a result, when the alumina substrate is mounted on the lead frame, the adhesive is prevented from protruding to the outer peripheral portion rather than the protrusion, and the adhesive flows on the surface of the alumina substrate where the power chip or the chip capacitor is mounted. It is preventing.

また、下記特許文献２に開示される半導体装置では、回路基板のリードフレームが接着される基板接着部に、余剰の接着剤を吸収するスルーホールが設けられている。これにより、接着剤を余剰に接着剤吸収部に配設する場合でも、接着剤が基板接着部以外の回路基板やリードフレームに広がることを防止している。   In the semiconductor device disclosed in Patent Document 2 below, a through hole that absorbs excess adhesive is provided in a substrate bonding portion to which a lead frame of a circuit board is bonded. This prevents the adhesive from spreading on the circuit board and the lead frame other than the substrate bonding portion even when excessive adhesive is disposed on the adhesive absorbing portion.

また、下記特許文献３に開示される半導体装置では、密着性の低下を抑制する接着剤として、同一分子中にケイ素原子結合アルケニル基とケイ素原子結合水素原子をそれぞれ平均して２個以上有するオルガノポリシロキサンを主成分とする付加反応硬化型シリコーンゴム組成物からなるものを採用している。   In addition, in the semiconductor device disclosed in Patent Document 3 below, as an adhesive that suppresses a decrease in adhesion, organo having an average of two or more silicon atom-bonded alkenyl groups and silicon atom-bonded hydrogen atoms in the same molecule. A composition comprising an addition reaction curable silicone rubber composition mainly composed of polysiloxane is employed.

また、下記特許文献４に開示される半導体装置では、基板と半導体チップとを接着する接着剤は、半導体チップの側面に至るように設けられている。また、基板における半導体チップが搭載された面で半導体チップの周囲には、封止材が設けられおり、この封止材は、半導体チップの上面及び接着剤の一部が露出するように設けられている。このように、半導体チップの上面を封止材から露出させることで、放熱性を向上させている。また、接着剤の一部が露出するように封止材を設けることで、当該接着剤から水蒸気を逃がしている。   In the semiconductor device disclosed in Patent Document 4 below, an adhesive that bonds the substrate and the semiconductor chip is provided so as to reach the side surface of the semiconductor chip. In addition, a sealing material is provided around the semiconductor chip on the surface of the substrate on which the semiconductor chip is mounted, and the sealing material is provided so that the upper surface of the semiconductor chip and a part of the adhesive are exposed. ing. Thus, heat dissipation is improved by exposing the upper surface of the semiconductor chip from the sealing material. Further, by providing a sealing material so that a part of the adhesive is exposed, water vapor is released from the adhesive.

また、下記特許文献５に開示される電子部品では、封止ケースにおける配線基板との接着面には、凹型溝が全周に渡って設けており、封止ケースは、マウンタ等で、接着剤が塗布された配線基板上の位置にマウント、圧着される。その結果、接着剤は、封止ケースと配線基板間を押し広げられるが、余剰な接着剤は、封止ケースに設けた凹型溝に逃げるため、封止ケースの周囲にはみ出す量が抑制される。   In addition, in the electronic component disclosed in Patent Document 5 below, a concave groove is provided over the entire circumference on the adhesive surface of the sealing case with the wiring board, and the sealing case is a mounter or the like. Is mounted and pressure-bonded at a position on the wiring substrate to which is applied. As a result, the adhesive is spread between the sealing case and the wiring board, but the excess adhesive escapes into the concave groove provided in the sealing case, so that the amount of the adhesive protruding around the sealing case is suppressed. .

また、下記特許文献６に開示される半導体チップの実装方法では、半導体チップを実装基板に接着する接着剤として、シリコーン系の接着剤と異なりエポキシ系の接着剤が採用されている。この接着剤によって実装基板の実装面を被着する場合は、事前に実装基板を加熱して接着剤が最軟化する直前の温度に加熱して行い、実装基板の実装面を接着剤によって被覆した状態で半導体チップを実装基板に加圧して搭載する。接着剤は加熱されて軟化しているから、半導体チップを実装基板に押圧すると接着剤が流動して余分の接着剤が半導体チップの下側から外側に押し出されて、半導体チップの側面と実装基板との間でフィレットが形成される。このようにフィレットが形成されると、接着剤の濡れ力が半導体チップを実装基板に引き込むように作用するため、半導体チップの位置ずれが防止されて半導体チップと実装基板との接続が確実になされることとなる。   Also, in the semiconductor chip mounting method disclosed in Patent Document 6 below, an epoxy adhesive is employed as an adhesive for bonding the semiconductor chip to the mounting substrate, unlike a silicone adhesive. When the mounting surface of the mounting board is applied with this adhesive, the mounting board is heated in advance to a temperature just before the adhesive is softened, and the mounting surface of the mounting board is covered with the adhesive. In this state, the semiconductor chip is pressed and mounted on the mounting substrate. Since the adhesive is heated and softened, when the semiconductor chip is pressed against the mounting substrate, the adhesive flows and excess adhesive is pushed outward from the lower side of the semiconductor chip, and the side surface of the semiconductor chip and the mounting substrate A fillet is formed between the two. When the fillet is formed in this manner, the wetting force of the adhesive acts so as to draw the semiconductor chip into the mounting substrate, so that the semiconductor chip is prevented from being displaced and the connection between the semiconductor chip and the mounting substrate is ensured. The Rukoto.

特開２００４−２７３９４６号公報JP 2004-273946 A 特開平０９−１８１２４４号公報JP 09-181244 A 特開２００１−２７９２２３号公報JP 2001-279223 A 特開２００３−２６４２５７号公報JP 2003-264257 A 特開平０７−１３０９１６号公報Japanese Patent Laid-Open No. 07-130916 特開２００１−３３２５８３号公報JP 2001-332583 A

ところで、上記特許文献１，２，５のように、接着剤のはみだしを防ぐための特別な構成を採用すると、煩雑であり低コスト化の阻害要因となってしまう。また、上記特許文献３のように、接着剤の材料自体を改良することは接着特性を劣化させる恐れがあり、開発に時間を要する。また、上記特許文献４では、放熱性等が考慮されているものの、接着剤の接着特性に関してそもそも言及されていない。また、上記特許文献６では、エポキシ系の接着剤が採用されることを前提としたものであり、シリコーン系等の他の接着剤についてそもそも言及されていない。   By the way, if a special configuration for preventing the adhesive from sticking out is employed as in Patent Documents 1, 2, and 5, it is cumbersome and hinders cost reduction. Further, as in Patent Document 3, improving the adhesive material itself may deteriorate the adhesive properties, and requires time for development. Moreover, in the said patent document 4, although heat dissipation etc. are considered, it is not mentioned in the first place regarding the adhesive characteristic of an adhesive agent. Moreover, in the said patent document 6, it is a premise that an epoxy-type adhesive agent is employ | adopted, and the other adhesives, such as a silicone type, are not mentioned in the first place.

本発明は、上述した課題を解決するためになされたものであり、その目的とするところは、シリコーン系の接着剤にて接着された回路基板およびベース体を封止する封止部材の密着力の低下を抑制し得る半導体装置および半導体装置の製造方法を提供することにある。   The present invention has been made to solve the above-described problems, and an object of the present invention is to provide an adhesion force of a sealing member that seals a circuit board and a base body bonded with a silicone-based adhesive. It is an object of the present invention to provide a semiconductor device and a method for manufacturing the semiconductor device that can suppress the decrease in the semiconductor device.

上記目的を達成するため、特許請求の範囲に記載の請求項１の半導体装置では、回路基板とこの回路基板が接着剤により接着されるベース体との少なくとも一部が封止部材により封止される半導体装置において、前記回路基板の裏面と前記ベース体の接着面との間には、前記接着剤として粘度が１００Ｐａ・ｓ以上であるシリコーン系接着剤が塗布され、前記ベース体の接着面の表面粗さは、前記回路基板の裏面の表面粗さよりも大きく、前記回路基板の裏面と前記ベース体の接着面との両面により押しつぶされて前記回路基板の裏面に沿い流動する回路基板側の前記接着剤が前記ベース体の接着面に向かい流動し、前記両面間から押し出された前記接着剤が断面山形状に盛り上がるように形成されることを特徴とする。 In order to achieve the above object, in the semiconductor device according to claim 1, at least a part of the circuit board and the base body to which the circuit board is bonded by an adhesive is sealed with a sealing member. In the semiconductor device, a silicone-based adhesive having a viscosity of 100 Pa · s or more is applied as an adhesive between the back surface of the circuit board and the adhesive surface of the base body. The surface roughness is larger than the surface roughness of the back surface of the circuit board, and is crushed by both the back surface of the circuit board and the adhesive surface of the base body and flows along the back surface of the circuit board. The adhesive is formed so as to flow toward the bonding surface of the base body, and the adhesive pushed out between the both surfaces is formed to rise in a cross-sectional mountain shape.

請求項２の発明は、請求項１に記載の半導体装置において、前記回路基板の裏面に外縁部が中央部よりも厚みが薄くなるように段部が形成されることで、前記両面間から押し出される直前の前記接着剤の前記段部への接触を抑制することを特徴とする。 The invention of claim 2 is the semiconductor device according to claim 1, by the outer edges stepped portion such that the thickness becomes thinner than the central portion is formed on the back surface of the circuit board, from between the two sides The contact of the adhesive immediately before being pushed out to the stepped portion is suppressed .

請求項３の発明は、請求項１または２に記載の半導体装置において、前記シリコーン系接着剤に含まれるフィラーの割合が７０ｗｔ％以上であることを特徴とする。 According to a third aspect of the present invention, in the semiconductor device according to the first or second aspect , the ratio of the filler contained in the silicone-based adhesive is 70 wt% or more.

特許請求の範囲に記載の請求項４の半導体装置の製造方法では、回路基板とこの回路基板が接着剤により接着されるベース体との少なくとも一部が封止部材により封止される半導体装置の製造方法において、前記ベース体の接着面の表面粗さは、前記回路基板の裏面の表面粗さよりも大きく、前記接着剤として粘度が１００Ｐａ・ｓ以上であるシリコーン系接着剤を、前記ベース体の接着面および前記回路基板の裏面のいずれか一方に塗布する第１工程と、前記回路基板の裏面と前記ベース体の接着面との両面により前記接着剤を押しつぶして、前記回路基板の裏面に沿い流動した回路基板側の前記接着剤を前記ベース体の接着面に向かうように流動させて、前記回路基板の裏面と前記ベース体の接着面とを前記接着剤を介して接着するとともにこれら両面間から押し出された接着剤を断面山形状に盛り上げる第２工程と、接着された前記回路基板および前記ベース体の少なくとも一部を前記封止部材により封止する第３工程と、を備えることを特徴とする。 In the method for manufacturing a semiconductor device according to claim 4 , at least a part of a circuit board and a base body to which the circuit board is bonded by an adhesive is sealed with a sealing member. In the manufacturing method, the surface roughness of the adhesive surface of the base body is larger than the surface roughness of the back surface of the circuit board, and a silicone-based adhesive having a viscosity of 100 Pa · s or more is used as the adhesive. A first step of applying to either the adhesive surface or the back surface of the circuit board, and crushing the adhesive by both the back surface of the circuit board and the adhesive surface of the base body, along the back surface of the circuit board the flow was the circuit board side of the adhesive to flow to face the bonding surface of the base body, when an adhesive surface of the base body and the back surface of the circuit board adhered via the adhesive preparative A second step of raising the adhesive extruded from both sides into a cross-sectional mountain shape, and a third step of sealing at least a part of the bonded circuit board and the base body with the sealing member. It is characterized by providing.

請求項５の発明は、請求項４に記載の半導体装置の製造方法において、前記回路基板の裏面に外縁部が中央部よりも厚みが薄くなるように段部が形成されることで、前記第２工程にて、前記両面間から押し出される直前の前記接着剤の前記段部への接触を抑制することを特徴とする。 The invention of claim 5 is a method of manufacturing a semiconductor device according to claim 4, the outer edges on the back surface of the circuit board that step portion so that the thickness becomes thinner than the central portion is formed, the In the second step, the contact of the adhesive immediately before being pushed out from between both surfaces is suppressed .

請求項６の発明は、請求項４または５に記載の半導体装置の製造方法において、前記シリコーン系接着剤に含まれるフィラーの割合が７０ｗｔ％以上であることを特徴とする。 According to a sixth aspect of the present invention, in the method for manufacturing a semiconductor device according to the fourth or fifth aspect , the ratio of the filler contained in the silicone-based adhesive is 70 wt% or more.

請求項７の発明は、請求項４〜６のいずれか一項に記載の半導体装置の製造方法において、前記第１工程では、前記接着剤は、前記回路基板の中央部および四隅に対応する部位の厚さが他の部位より厚く塗布されることを特徴とする。 A seventh aspect of the present invention is the method for manufacturing a semiconductor device according to any one of the fourth to sixth aspects, wherein in the first step, the adhesive is a portion corresponding to a central portion and four corners of the circuit board. It is characterized in that the coating is thicker than other parts.

請求項８の発明は、請求項７に記載の半導体装置の製造方法において、前記第１工程では、前記回路基板の中央部および四隅に対応する前記接着剤の部位の少なくともいずれかは、要求される厚みに応じた形状の溝付スキージを用いて、他の部位より厚く塗布されることを特徴とする。 According to an eighth aspect of the present invention, in the method for manufacturing a semiconductor device according to the seventh aspect , in the first step, at least one of the adhesive portions corresponding to a central portion and four corners of the circuit board is required. A grooved squeegee having a shape corresponding to the thickness to be applied is used to apply thicker than other parts.

請求項９の発明は、請求項７に記載の半導体装置の製造方法において、前記第１工程では、前記回路基板の中央部および四隅に対応する前記接着剤の部位の少なくともいずれかは、ディスペンス法により、他の部位より厚く塗布されることを特徴とする。 According to a ninth aspect of the present invention, in the method for manufacturing a semiconductor device according to the seventh aspect , in the first step, at least one of the adhesive portions corresponding to the central portion and the four corners of the circuit board is a dispensing method. Thus, it is applied thicker than other parts.

請求項１の発明では、回路基板の裏面とベース体の接着面との間には、両部材を接着する接着剤として、粘度が１００Ｐａ・ｓ以上であるシリコーン系接着剤が塗布されており、回路基板の裏面とベース体の接着面との間から押し出された接着剤が断面山形状に盛り上がるように形成されている。   In the invention of claim 1, between the back surface of the circuit board and the adhesive surface of the base body, a silicone adhesive having a viscosity of 100 Pa · s or more is applied as an adhesive for adhering both members, The adhesive extruded from between the back surface of the circuit board and the adhesive surface of the base body is formed so as to rise in a cross-sectional mountain shape.

回路基板の裏面とベース体の接着面との間には、高い粘度のシリコーン系接着剤が塗布されているので、接着時にこれら両面間から押し出された接着剤は、回路基板の側面にてフィレットを形成することなく断面山形状に盛り上がることとなる。このため、両面間から押し出された接着剤が回路基板の側面に接触しにくくなるので、シリコーン系接着剤に含まれる低分子成分が回路基板の側面を介して基板表面まで染み出す距離が長くなる。これにより、シリコーン系接着剤を使用する場合でも、上記両面間の接着後に封止部材により封止されるまでに、シリコーン系材料の低分子成分が基板表面等まで染み出すことが抑制される。
したがって、シリコーン系の接着剤にて接着された回路基板およびベース体を封止する封止部材の密着力の低下を抑制することができる。 Since a high-viscosity silicone adhesive is applied between the back surface of the circuit board and the adhesive surface of the base body, the adhesive extruded from both sides during bonding is filled on the side surface of the circuit board. It will rise to a cross-sectional mountain shape without forming. For this reason, since the adhesive pushed out from both sides becomes difficult to contact the side surface of the circuit board, the distance that the low molecular component contained in the silicone-based adhesive oozes to the substrate surface through the side surface of the circuit board becomes longer. . Thereby, even when using a silicone type adhesive agent, it is suppressed that the low molecular component of a silicone type material oozes out to the board | substrate surface etc. until it seals with the sealing member after adhesion | attachment between the said both surfaces.
Therefore, it is possible to suppress a decrease in the adhesion of the sealing member that seals the circuit board and the base body bonded with the silicone-based adhesive.

特に、ベース体の接着面の表面粗さは、回路基板の裏面の表面粗さよりも大きいため、接着時における両面間の接着剤は回路基板の裏面に沿い流れやすくなり、両面間から押し出された回路基板側の接着剤がベース体の接着面に向かうように流れることとなる。これにより、接着時に両面間から押し出された接着剤を、回路基板の側面に対してより接触しにくくすることができる。 In particular , since the surface roughness of the adhesive surface of the base body is larger than the surface roughness of the back surface of the circuit board, the adhesive between both surfaces at the time of bonding is easy to flow along the back surface of the circuit board and is pushed out from between the both surfaces. The adhesive on the circuit board side flows toward the bonding surface of the base body. Thereby, the adhesive pushed out from between both surfaces at the time of adhesion | attachment can be made harder to contact with respect to the side surface of a circuit board.

請求項２の発明では、回路基板の裏面には、外縁部が中央部よりも厚みが薄くなるように段部が形成されることで両面間から押し出される直前の接着剤の段部への接触が抑制される。これにより、接着時に両面間から押し出される直前の接着剤はベース体の接着面にのみ接触し回路基板の裏面には接触しないので、両面間から押し出された接着剤を、回路基板の側面に対してより接触しにくくすることができる。 According to the invention of claim 2 , the step of the adhesive immediately before being pushed out from between both sides is formed on the back surface of the circuit board by forming the step so that the outer edge portion is thinner than the center portion. Is suppressed . As a result, the adhesive immediately before being pushed out from both sides during bonding contacts only the adhesive surface of the base body and does not contact the back surface of the circuit board. More difficult to touch.

請求項３の発明では、シリコーン系接着剤の粘度を高くするために、シリコーン系接着剤に含まれるフィラーの割合が７０ｗｔ％以上に設定されている。これにより、シリコーン系接着剤の粘度を好適に高くして、接着時に上記両面間から押し出された接着剤を回路基板の側面に対してより接触しにくくすることができる。 In invention of Claim 3 , in order to make the viscosity of a silicone type adhesive high, the ratio of the filler contained in a silicone type adhesive is set to 70 wt% or more. Thereby, the viscosity of a silicone type adhesive agent can be made high suitably, and the adhesive agent extruded from between the said both surfaces at the time of adhesion | attachment can be made harder to contact with the side surface of a circuit board.

請求項４の発明では、第１工程により、接着剤として粘度が１００Ｐａ・ｓ以上であるシリコーン系接着剤が、ベース体の接着面および回路基板の裏面のいずれか一方に塗布され、第２工程により、回路基板の裏面とベース体の接着面との両面により接着剤を押しつぶして、回路基板の裏面に沿い流動した回路基板側の接着剤をベース体の接着面に向かうように流動させて、回路基板の裏面とベース体の接着面とが接着剤を介して接着されるとともにこれら両面間から押し出された接着剤が断面山形状に盛り上げられ、第３工程により、接着された回路基板およびベース体の少なくとも一部が封止部材により封止される。 In the invention of claim 4 , in the first step, a silicone-based adhesive having a viscosity of 100 Pa · s or more is applied as an adhesive to either the adhesive surface of the base body or the back surface of the circuit board. By crushing the adhesive by both the back surface of the circuit board and the adhesive surface of the base body, the adhesive on the circuit board side that flows along the back surface of the circuit board flows toward the adhesive surface of the base body, The back surface of the circuit board and the adhesive surface of the base body are bonded via an adhesive, and the adhesive extruded from both the surfaces is raised into a cross-sectional mountain shape, and the bonded circuit board and base are bonded in the third step. At least a part of the body is sealed with a sealing member.

回路基板の裏面とベース体の接着面との間には、高い粘度のシリコーン系接着剤が塗布されているので、接着時にこれら両面間から押し出された接着剤は、回路基板の側面にてフィレットを形成することなく断面山形状に盛り上がることとなる。このため、両面間から押し出された接着剤が回路基板の側面に接触しにくくなるので、シリコーン系接着剤に含まれる低分子成分が回路基板の側面を介して基板表面まで染み出す距離が長くなる。これにより、シリコーン系接着剤を使用する場合でも、上記両面間の接着後に封止部材により封止されるまでに、シリコーン系材料の低分子成分が基板表面等まで染み出すことが抑制される。
したがって、シリコーン系の接着剤にて接着された回路基板およびベース体を封止する封止部材の密着力の低下を抑制することができる。 Since a high-viscosity silicone adhesive is applied between the back surface of the circuit board and the adhesive surface of the base body, the adhesive extruded from both sides during bonding is filled on the side surface of the circuit board. It will rise to a cross-sectional mountain shape without forming. For this reason, since the adhesive pushed out from both sides becomes difficult to contact the side surface of the circuit board, the distance that the low molecular component contained in the silicone-based adhesive oozes to the substrate surface through the side surface of the circuit board becomes longer. . Thereby, even when using a silicone type adhesive agent, it is suppressed that the low molecular component of a silicone type material oozes out to the board | substrate surface etc. until it seals with the sealing member after adhesion | attachment between the said both surfaces.
Therefore, it is possible to suppress a decrease in the adhesion of the sealing member that seals the circuit board and the base body bonded with the silicone-based adhesive.

特に、ベース体の接着面の表面粗さは、回路基板の裏面の表面粗さよりも大きいため、両面間の接着剤は回路基板の裏面に沿い流れやすくなり、両面間から押し出された回路基板側の接着剤がベース体の接着面に向かうように流れることとなる。これにより、両面間から押し出された接着剤を、回路基板の側面に対してより接触しにくくすることができる。 In particular , since the surface roughness of the adhesive surface of the base body is larger than the surface roughness of the back surface of the circuit board, the adhesive between both surfaces can easily flow along the back surface of the circuit board, and the circuit board side pushed out from between both surfaces This adhesive flows toward the bonding surface of the base body. Thereby, the adhesive extruded from between both surfaces can be made more difficult to contact the side surface of the circuit board.

請求項５の発明では、回路基板の裏面には、外縁部が中央部よりも厚みが薄くなるように段部が形成されることで、両面間から押し出される直前の接着剤の段部への接触が抑制される。これにより、両面間から押し出される直前の接着剤はベース体の接着面にのみ接触し回路基板の裏面には接触しないので、両面間から押し出された接着剤を、回路基板の側面に対してより接触しにくくすることができる。 In the invention of claim 5 , a step portion is formed on the back surface of the circuit board so that the outer edge portion is thinner than the center portion . Contact is suppressed. As a result, the adhesive immediately before being pushed out from between both sides contacts only the adhesive surface of the base body and does not come into contact with the back surface of the circuit board. It can be made difficult to contact.

請求項６の発明では、シリコーン系接着剤の粘度を高くするために、シリコーン系接着剤に含まれるフィラーの割合が７０ｗｔ％以上に設定されている。これにより、シリコーン系接着剤の粘度を好適に高くして、上記両面間から押し出された接着剤を回路基板の側面に対してより接触しにくくすることができる。 In the invention of claim 6 , in order to increase the viscosity of the silicone adhesive, the ratio of the filler contained in the silicone adhesive is set to 70 wt% or more. Thereby, the viscosity of a silicone type adhesive agent can be made high suitably, and the adhesive agent extruded from between the said both surfaces can be made harder to contact with the side surface of a circuit board.

請求項７の発明では、第１工程では、接着剤は、回路基板の中央部および四隅に対応する部位の厚さが他の部位より厚く塗布される。 In the seventh aspect of the invention, in the first step, the adhesive is applied such that the thicknesses of the portions corresponding to the central portion and the four corners of the circuit board are thicker than the other portions.

印刷用マスク等を使用してベース体の接着面および回路基板の裏面のいずれか一方に塗布された接着剤は、印刷用マスク等を外すときに端部の厚さが厚くなるため、両面間の接着時にこれら両面間にて接着剤を押し潰すと、中央部の空気が抜けきれずに当該接着剤内にボイドが発生する場合がある。特に、接着剤として粘度が高いものを採用する場合には、上記ボイドが発生しやすくなってしまう。そこで、回路基板の中央部に対応する部位の厚さを他の部位より厚く塗布することで、両面間の接着時に、接着剤の上記中央部が押し潰されながらボイドの元となる空気を外方へ押し出して広がるので、ボイドの発生を抑制することができる。   The adhesive applied to either the base surface or the back side of the circuit board using a mask for printing, etc., increases the thickness of the edge when removing the mask for printing. When the adhesive is crushed between both surfaces during the bonding, air in the central portion cannot be completely removed and voids may be generated in the adhesive. In particular, when an adhesive having a high viscosity is used, the void is likely to occur. Therefore, by applying the thickness of the portion corresponding to the central portion of the circuit board thicker than other portions, the air that causes the void is removed while the central portion of the adhesive is crushed when bonding between both surfaces. Since it pushes out and spreads, generation | occurrence | production of a void can be suppressed.

また、回路基板の中央部に対応する部位の厚さのみが他の部位より厚く塗布されている場合、接着剤を押し潰す圧力が過剰であると接着剤がベース体からはみ出してしまい、当該圧力が不足すると回路基板の四隅に対応する部位にて接着剤との間で隙間が発生してしまう。そこで、回路基板の中央部に加えて四隅に対応する部位の厚さを他の部位より厚く塗布することで、ベース体から接着剤のはみ出しをなくすとともに上記両面と接着剤との隙間をなくした接着状態を容易に成形することができる。   Also, when only the thickness of the part corresponding to the central part of the circuit board is applied thicker than other parts, if the pressure for crushing the adhesive is excessive, the adhesive protrudes from the base body, and the pressure If there is a shortage, gaps will occur between the adhesive and the adhesive at the portions corresponding to the four corners of the circuit board. Therefore, by applying the thickness of the part corresponding to the four corners in addition to the center part of the circuit board thicker than the other parts, the protrusion of the adhesive from the base body is eliminated and the gap between the both surfaces and the adhesive is eliminated. The adhesion state can be easily formed.

請求項８の発明のように、第１工程にて、回路基板の中央部および四隅に対応する接着剤の部位の少なくともいずれかを、要求される厚みに応じた形状の溝付スキージを用いて、他の部位より厚く塗布してもよい。 As in the invention of claim 8 , in the first step, at least one of the adhesive portions corresponding to the central portion and the four corners of the circuit board is used using a grooved squeegee having a shape corresponding to the required thickness. It may be applied thicker than other parts.

また、請求項９の発明のように、第１工程にて、回路基板の中央部および四隅に対応する接着剤の部位の少なくともいずれかを、ディスペンス法により、他の部位より厚く塗布してもよい。 In addition, as in the ninth aspect of the invention, in the first step, at least one of the adhesive portions corresponding to the central portion and the four corners of the circuit board may be applied thicker than other portions by the dispensing method. Good.

図１（Ａ）は、第１実施形態に係る半導体装置の構成を示す概略構成図であり、図１（Ｂ）は、図１（Ａ）の１Ｂ−１Ｂ線相当の切断面を概略的に示す断面図である。FIG. 1A is a schematic configuration diagram showing a configuration of the semiconductor device according to the first embodiment, and FIG. 1B schematically shows a cut surface corresponding to the line 1B-1B in FIG. It is sectional drawing shown. 図１の回路基板の側面近傍における接着剤の押出端部を示す断面図である。It is sectional drawing which shows the extrusion edge part of the adhesive agent in the side surface vicinity of the circuit board of FIG. 回路基板の側面に形成されるフィレットの状態を示す断面図である。It is sectional drawing which shows the state of the fillet formed in the side surface of a circuit board. 低分子成分の染み出し長さと放置時間との関係を示すグラフである。It is a graph which shows the relationship between the bleeding length of a low molecular component, and leaving time. 接着剤の粘度とフィレット高さとの関係を示すグラフである。It is a graph which shows the relationship between the viscosity of an adhesive agent, and a fillet height. フィラー割合と接着剤の粘度との関係を示すグラフである。It is a graph which shows the relationship between a filler ratio and the viscosity of an adhesive agent. 本第１実施形態に係る半導体装置の製造工程の一部を示す説明図である。It is explanatory drawing which shows a part of manufacturing process of the semiconductor device which concerns on this 1st Embodiment. 本第１実施形態に係る半導体装置の製造工程の一部を示す説明図である。It is explanatory drawing which shows a part of manufacturing process of the semiconductor device which concerns on this 1st Embodiment. 図８（Ｄ）の接着剤が塗布されたヒートシンクを接着面側から見た上面図である。It is the upper side figure which looked at the heat sink with which the adhesive agent of Drawing 8 (D) was applied from the adhesion side. 加圧力が過剰である場合の接着剤の広がり状態を示す上面図である。It is a top view which shows the spreading | diffusion state of an adhesive agent when a pressurizing force is excessive. 加圧力が不足する場合の接着剤の広がり状態を示す上面図である。It is a top view which shows the spreading | diffusion state of the adhesive agent when a pressurizing force is insufficient. 第１実施形態の半導体装置の製造方法に係る第１変形例の要部を示す上面図である。It is a top view which shows the principal part of the 1st modification which concerns on the manufacturing method of the semiconductor device of 1st Embodiment. 第１実施形態の半導体装置の製造方法に係る第２変形例の要部を示す上面図である。It is a top view which shows the principal part of the 2nd modification which concerns on the manufacturing method of the semiconductor device of 1st Embodiment. 第１実施形態の半導体装置の製造方法に係る第３変形例の要部を示す上面図である。It is a top view which shows the principal part of the 3rd modification concerning the manufacturing method of the semiconductor device of 1st Embodiment. 第２実施形態に係る半導体装置の要部を示す断面図である。It is sectional drawing which shows the principal part of the semiconductor device which concerns on 2nd Embodiment. 接着時の接着剤２０の流れを示す説明図である。It is explanatory drawing which shows the flow of the adhesive agent 20 at the time of adhesion | attachment. 第３実施形態に係る半導体装置の要部を示す断面図である。It is sectional drawing which shows the principal part of the semiconductor device which concerns on 3rd Embodiment.

［第１実施形態］
以下、本発明の半導体装置および半導体装置の製造方法を具現化した第１実施形態について、図面を参照して説明する。図１（Ａ）は、第１実施形態に係る半導体装置１０の構成を示す概略構成図であり、図１（Ｂ）は、図１（Ａ）の１Ｂ−１Ｂ線相当の切断面を概略的に示す断面図である。図２は、図１の回路基板１１の側面１１ｃ近傍における接着剤２０の押出端部２１を示す断面図である。なお、図１（Ａ）では、便宜上、回路基板１１の上部のモールド樹脂１３を除いて図示している。 [First Embodiment]
Hereinafter, a semiconductor device and a semiconductor device manufacturing method according to a first embodiment of the present invention will be described with reference to the drawings. FIG. 1A is a schematic configuration diagram showing a configuration of the semiconductor device 10 according to the first embodiment, and FIG. 1B is a schematic cross-sectional view corresponding to the line 1B-1B in FIG. FIG. FIG. 2 is a cross-sectional view showing the extrusion end portion 21 of the adhesive 20 in the vicinity of the side surface 11c of the circuit board 11 of FIG. In FIG. 1A, for convenience, the mold resin 13 on the upper part of the circuit board 11 is omitted.

図１（Ａ），（Ｂ）に示すように、半導体装置１０は、回路基板１１とこの回路基板１１が接着剤２０により接着されるヒートシンク１２とがモールド樹脂１３により封止されて構成されている。回路基板１１の表面１１ａには、ＩＣチップ等が実装されている。また、回路基板１１の表面１１ａには、電極パッド（図示せず）が形成されており、この電極パッドと対応するリードフレーム１４とは、ワイヤボンディングによるワイヤ１５等を介してそれぞれ電気的に接続されている。   As shown in FIGS. 1A and 1B, a semiconductor device 10 is configured by sealing a circuit board 11 and a heat sink 12 to which the circuit board 11 is bonded by an adhesive 20 with a mold resin 13. Yes. An IC chip or the like is mounted on the surface 11 a of the circuit board 11. In addition, electrode pads (not shown) are formed on the surface 11a of the circuit board 11, and the electrode pads and the corresponding lead frames 14 are electrically connected to each other via wires 15 or the like by wire bonding. Has been.

ヒートシンク１２は、回路基板１１等にて発生した熱を放熱する機能を有するもので、その下端部が外部に露出するようにモールド樹脂１３にて封止されている。なお、ヒートシンク１２およびモールド樹脂１３は、特許請求の範囲に記載の「ベース体」および「封止部材」の一例に相当し得る。   The heat sink 12 has a function of radiating heat generated in the circuit board 11 and the like, and is sealed with a mold resin 13 so that the lower end portion thereof is exposed to the outside. The heat sink 12 and the mold resin 13 may correspond to an example of a “base body” and a “sealing member” described in the claims.

また、接着剤２０として、粘度が比較的高いシリコーン系接着剤が採用されており、この接着剤２０により、回路基板１１の裏面１１ｂとヒートシンク１２の接着面１２ａとが接着固定されている。この接着剤２０は、図２に示すように、両面１１ｂ，１２ａ間から押し出された部分（以下、押出端部２１ともいう）が、回路基板１１の側面１１ｃに接触することなく断面山形状に盛り上がるように形成されている。   Further, a silicone adhesive having a relatively high viscosity is employed as the adhesive 20, and the back surface 11 b of the circuit board 11 and the adhesive surface 12 a of the heat sink 12 are bonded and fixed by the adhesive 20. As shown in FIG. 2, the adhesive 20 has a cross-sectional mountain shape in which the portion extruded from between the both surfaces 11b and 12a (hereinafter also referred to as the extrusion end portion 21) does not contact the side surface 11c of the circuit board 11. It is formed to rise.

ここで、接着剤２０として粘度が比較的高いシリコーン系接着剤を採用する理由について、以下に説明する。図３は、回路基板１１の側面１１ｃに形成されるフィレット２２の状態を示す断面図である。図４は、低分子成分の染み出し長さｄｘと放置時間ｔとの関係を示すグラフである。図５は、接着剤２０の粘度μとフィレット高さｄｆとの関係を示すグラフである。図６は、フィラー割合と接着剤２０の粘度μとの関係を示すグラフである。   Here, the reason why a silicone adhesive having a relatively high viscosity is employed as the adhesive 20 will be described below. FIG. 3 is a cross-sectional view showing a state of the fillet 22 formed on the side surface 11 c of the circuit board 11. FIG. 4 is a graph showing the relationship between the leakage length dx of the low molecular component and the standing time t. FIG. 5 is a graph showing the relationship between the viscosity μ of the adhesive 20 and the fillet height df. FIG. 6 is a graph showing the relationship between the filler ratio and the viscosity μ of the adhesive 20.

接着剤２０として粘度が比較的低いシリコーン系接着剤を採用すると、図３に示すように、上記両面１１ｂ，１２ａ間から押し出された接着剤の部分は、回路基板１１の側面１１ｃに接触して、フィレット２２を形成する。この場合、フィレット２２の先端からシリコーン系材料の低分子成分が側面１１ｃや表面１１ａに染み出すこととなる。なお、図３にて、フィレット２２の高さをフィレット高さｄｆとし、回路基板１１の厚さを基板厚さｄｓとする。また、フィレット２２の先端から回路基板１１の表面１１ａまでの距離（すなわち、接着剤２０が側面１１ｃに接触する部位から表面１１ａまでの距離）を染み出し可能長さｄｚとし、上記両面１１ｂ，１２ａ間における接着剤２０の厚さを接着剤厚さｄａとする。   When a silicone adhesive having a relatively low viscosity is employed as the adhesive 20, the portion of the adhesive extruded from between the both surfaces 11b and 12a comes into contact with the side surface 11c of the circuit board 11 as shown in FIG. The fillet 22 is formed. In this case, a low molecular component of the silicone material oozes out from the tip of the fillet 22 to the side surface 11c or the surface 11a. In FIG. 3, the height of the fillet 22 is a fillet height df, and the thickness of the circuit board 11 is a board thickness ds. Further, the distance dz from the tip of the fillet 22 to the surface 11a of the circuit board 11 (that is, the distance from the portion where the adhesive 20 contacts the side surface 11c to the surface 11a) is the exudable length dz, and the both surfaces 11b, 12a The thickness of the adhesive 20 between them is defined as an adhesive thickness da.

このとき、図４に示すように、フィレット高さｄｆが高くなるほど、染み出し可能長さｄｚが短くなり、上記低分子成分が表面１１ａに染み出すまでの時間が短くなるため、モールド樹脂１３と回路基板１１の表面１１ａ等との界面での剥離が引き起こされやすくなる。なお、図４にて示す時間ｔ２は、例えば、２０分程度である。   At this time, as shown in FIG. 4, the higher the fillet height df, the shorter the permeable length dz, and the shorter the time until the low molecular component exudes to the surface 11a. Separation at the interface with the surface 11a and the like of the circuit board 11 is likely to be caused. In addition, the time t2 shown in FIG. 4 is about 20 minutes, for example.

そこで、本第１実施形態では、比較的粘度の高いシリコーン系接着剤を採用することで、接着時に回路基板１１の裏面１１ｂとヒートシンク１２の接着面１２ａの間から押し出された接着剤２０を、フィレット２２を形成することなく、断面山形状に盛り上がるように形成する（図２参照）。このため、両面１１ｂ，１２ａ間から押し出された接着剤２０が回路基板１１の側面１１ｃに接触しにくくなるので、染み出し可能長さｄｚが長くなる（フィレット高さｄｆが短くなる）。これにより、接着剤２０としてシリコーン系接着剤を使用する場合でも、上記両面１１ｂ，１２ａ間の接着後にモールド樹脂１３により封止されるまでに、上記低分子成分が回路基板１１の表面１１ａ等まで染み出すことが抑制される。   Therefore, in the first embodiment, by adopting a relatively high-viscosity silicone-based adhesive, the adhesive 20 extruded from between the back surface 11b of the circuit board 11 and the adhesive surface 12a of the heat sink 12 during bonding, Without forming the fillet 22, it is formed so as to rise to a cross-sectional mountain shape (see FIG. 2). For this reason, since the adhesive 20 pushed out between the both surfaces 11b and 12a becomes difficult to contact the side surface 11c of the circuit board 11, the permeable length dz becomes long (the fillet height df becomes short). As a result, even when a silicone-based adhesive is used as the adhesive 20, the low-molecular component is transferred to the surface 11a of the circuit board 11 and the like before being sealed by the mold resin 13 after bonding between the both surfaces 11b and 12a. Exudation is suppressed.

なお、本第１実施形態では、粘度が１００Ｐａ・ｓ程度のシリコーン系接着剤が採用されている。これは、図５に示すように、接着剤２０の粘度μとフィレット高さｄｆとの関係では、接着剤２０の粘度μを高くするほどフィレット高さｄｆが低くなるからである。   In the first embodiment, a silicone adhesive having a viscosity of about 100 Pa · s is employed. This is because, as shown in FIG. 5, in the relationship between the viscosity μ of the adhesive 20 and the fillet height df, the higher the viscosity μ of the adhesive 20, the lower the fillet height df.

また、図６に示すように、接着剤２０の粘度μとフィラーが当該接着剤２０に含有される割合（以下、フィラー割合ともいう）との関係では、フィラー割合を高くするほど接着剤２０の粘度μが高くなる。そこで、本第１実施形態では、接着剤２０の粘度を１００Ｐａ・ｓ程度に設定するため、フィラー割合が７０ｗｔ％程度に設定されている。すなわち、接着剤２０におけるフィラー割合を７０ｗｔ％以上にして接着剤２０の粘度を１００Ｐａ・ｓ以上にすることで、接着剤２０を回路基板１１の側面１１ｃに接触させずに染み出し可能長さｄｚを長くすることができる。   In addition, as shown in FIG. 6, in the relationship between the viscosity μ of the adhesive 20 and the ratio in which the filler is contained in the adhesive 20 (hereinafter, also referred to as filler ratio), the higher the filler ratio, Viscosity μ increases. Therefore, in the first embodiment, since the viscosity of the adhesive 20 is set to about 100 Pa · s, the filler ratio is set to about 70 wt%. That is, by setting the filler ratio in the adhesive 20 to 70 wt% or more and the viscosity of the adhesive 20 to 100 Pa · s or more, the adhesive 20 can be oozed out without contacting the side surface 11 c of the circuit board 11. Can be lengthened.

次に、本第１実施形態に係る半導体装置１０の製造方法の工程を図７〜図１１を用いて詳細に説明する。図７（Ａ）〜（Ｃ）および図８（Ｄ）〜（Ｇ）は、第１実施形態における半導体装置１０の製造方法の工程を示す説明図である。図９は、図８（Ｄ）の接着剤２０が塗布されたヒートシンク１２を接着面１２ａ側から見た上面図である。図１０は、加圧力Ｆが過剰である場合の接着剤２０の広がり状態を示す上面図である。図１１は、加圧力Ｆが不足する場合の接着剤２０の広がり状態を示す上面図である。なお、図１０および図１１では、回路基板１１を波線にて図示している。   Next, steps of the method for manufacturing the semiconductor device 10 according to the first embodiment will be described in detail with reference to FIGS. FIGS. 7A to 7C and FIGS. 8D to 8G are explanatory views illustrating steps of the method for manufacturing the semiconductor device 10 according to the first embodiment. FIG. 9 is a top view of the heat sink 12 to which the adhesive 20 of FIG. 8D is applied as viewed from the adhesive surface 12a side. FIG. 10 is a top view showing a spread state of the adhesive 20 when the pressure F is excessive. FIG. 11 is a top view showing a spread state of the adhesive 20 when the pressure F is insufficient. In FIG. 10 and FIG. 11, the circuit board 11 is illustrated by a wavy line.

まず、図７（Ａ）に示すように、所定の形状に成形されたヒートシンク１２を用意し、このヒートシンク１２の接着面１２ａ側に対して、印刷用マスク３１を所定の位置に配置する。次に、ヒートシンク１２の接着面１２ａに所定量の接着剤２０を塗布した後に、図７（Ｂ）に示すように、溝付スキージ３２をヒートシンク１２の一辺と略平行に移動させることで、回路基板１１の裏面１１ｂの中央部に対応する接着剤２０の部分を盛り上げるように残して中央部２３を形成する。   First, as shown in FIG. 7A, a heat sink 12 molded in a predetermined shape is prepared, and a printing mask 31 is disposed at a predetermined position on the adhesive surface 12 a side of the heat sink 12. Next, after applying a predetermined amount of adhesive 20 to the adhesive surface 12a of the heat sink 12, the grooved squeegee 32 is moved substantially parallel to one side of the heat sink 12 as shown in FIG. A central portion 23 is formed leaving a portion of the adhesive 20 corresponding to the central portion of the back surface 11b of the substrate 11 so as to be raised.

続いて、図７（Ｃ）に示すように、印刷用マスク３１を取り外すことで、ヒートシンク１２の接着面１２ａに中央部２３と端部とが盛り上がった接着剤２０が塗布されることとなる。   Subsequently, as shown in FIG. 7C, by removing the printing mask 31, the adhesive 20 with the center portion 23 and the end portion raised is applied to the bonding surface 12 a of the heat sink 12.

そして、図８（Ｄ）および図９に示すように、ディスペンス法により、回路基板１１の裏面１１ｂの四隅に対応する接着剤２０の部分に新たな接着剤を塗布して４つの四隅部２４を盛り上げるように形成する。なお、図７（Ａ）〜（Ｃ）および図８（Ｄ）に示す工程は、特許請求の範囲に記載の「第１工程」の一例に相当し得る。   Then, as shown in FIGS. 8D and 9, a new adhesive is applied to the portions of the adhesive 20 corresponding to the four corners of the back surface 11b of the circuit board 11 by the dispensing method, so that the four corners 24 are formed. It is formed so as to rise. 7A to 7C and FIG. 8D can correspond to an example of “first step” described in the claims.

ここで、接着剤２０の中央部２３および四隅部２４を盛り上げるように形成する理由について以下に説明する。
印刷用マスク３１を使用してヒートシンク１２の接着面１２ａに塗布された接着剤２０は、印刷用マスク３１を外すときに端部の厚さが厚くなるため、両面１１ｂ，１２ａ間の接着時にこれら両面１１ｂ，１２ａ間にて接着剤２０を押し潰すと、中央部の空気が抜けきれずに当該接着剤２０内にボイドが発生する場合がある。特に、接着剤２０として粘度が高いものを採用する場合には、上記ボイドが発生しやすくなってしまう。そこで、回路基板１１の中央部に対応する中央部２３の厚さを他の部位より厚く塗布することで、両面１１ｂ，１２ａ間の接着時に、接着剤２０の中央部２３が押し潰されながらボイドの元となる空気を外方へ押し出して広がるので、ボイドの発生を抑制することができる。 Here, the reason why the central portion 23 and the four corner portions 24 of the adhesive 20 are formed so as to rise is described below.
The adhesive 20 applied to the adhesive surface 12a of the heat sink 12 using the printing mask 31 is thick at the end when the printing mask 31 is removed. When the adhesive 20 is crushed between the both surfaces 11b and 12a, the air in the center portion cannot be completely removed and a void may be generated in the adhesive 20 in some cases. In particular, when the adhesive 20 having a high viscosity is used, the void is likely to occur. Therefore, by applying the thickness of the central portion 23 corresponding to the central portion of the circuit board 11 to be thicker than other portions, the void is generated while the central portion 23 of the adhesive 20 is crushed at the time of bonding between the both surfaces 11b and 12a. Since the air that is the source of the air is pushed outward and spreads, the generation of voids can be suppressed.

また、回路基板１１の中央部に対応する中央部２３の厚さのみが他の部位より厚く塗布されている場合、治具３３等を介して作用する接着剤２０を押し潰す加圧力Ｆが過剰であると図１０に示すように接着剤２０がヒートシンク１２からはみ出してしまい、当該加圧力Ｆが不足すると図１１に示すように回路基板１１の四隅に対応する部位にて接着剤６０との間で隙間が発生してしまう。そこで、中央部２３に加えて四隅部２４の厚さを他の部位より厚く塗布することで、ヒートシンク１２から接着剤２０のはみ出しをなくすとともに上記両面１１ｂ，１２ａと接着剤２０との隙間をなくした接着状態を容易に成形することができる。   In addition, when only the thickness of the central portion 23 corresponding to the central portion of the circuit board 11 is applied thicker than other portions, the applied pressure F that crushes the adhesive 20 acting through the jig 33 or the like is excessive. 10, the adhesive 20 protrudes from the heat sink 12 as shown in FIG. 10, and if the pressure F is insufficient, the adhesive 20 is located between the adhesive 60 at the portions corresponding to the four corners of the circuit board 11 as shown in FIG. 11. Will cause a gap. Therefore, by applying the thickness of the four corners 24 in addition to the central part 23 to be thicker than other parts, the adhesive 20 does not protrude from the heat sink 12 and the gap between the both surfaces 11b and 12a and the adhesive 20 is eliminated. The bonded state can be easily formed.

上述のように接着剤２０が塗布等されると、ＩＣチップ等が実装された回路基板１１を用意し、この回路基板１１を、図８（Ｅ）に示すように、ヒートシンク１２に対して位置決めする。続いて、図８（Ｆ）に示すように、回路基板１１の裏面１１ｂにてヒートシンク１２に塗布された接着剤２０を押し潰すようにして、回路基板１１をヒートシンク１２に接着固定する。なお、図８（Ｅ），（Ｆ）では、便宜上、回路基板１１に実装されるＩＣチップ等の図示を省略している。   When the adhesive 20 is applied as described above, a circuit board 11 on which an IC chip or the like is mounted is prepared, and the circuit board 11 is positioned with respect to the heat sink 12 as shown in FIG. To do. Subsequently, as shown in FIG. 8F, the circuit board 11 is bonded and fixed to the heat sink 12 by crushing the adhesive 20 applied to the heat sink 12 on the back surface 11 b of the circuit board 11. 8E and 8F, illustration of an IC chip or the like mounted on the circuit board 11 is omitted for convenience.

このとき、回路基板１１の裏面１１ｂとヒートシンク１２の接着面１２ａの間から押し出された接着剤２０が、フィレット２２を形成することなく断面山形状に盛り上がり、回路基板１１の側面１１ｃ近傍にて押出端部２１が形成される。なお、図８（Ｆ）に示す工程は、特許請求の範囲に記載の「第２工程」の一例に相当し得る。   At this time, the adhesive 20 extruded from between the back surface 11b of the circuit board 11 and the adhesive surface 12a of the heat sink 12 rises into a cross-sectional mountain shape without forming the fillet 22, and is extruded near the side surface 11c of the circuit board 11. An end 21 is formed. The process shown in FIG. 8F can correspond to an example of a “second process” described in the claims.

そして、ヒートシンク１２に接着された回路基板１１に形成された電極パッドとリードフレーム１４とをワイヤボンディングによるワイヤ１５等を介して電気的に接続する。そして、上述のように接着された回路基板１１およびヒートシンク１２等を、図８（Ｇ）に示すように、モールド樹脂１３にて封止することで、図１に示す半導体装置１０が完成する。なお、図８（Ｇ）に示す工程は、特許請求の範囲に記載の「第３工程」の一例に相当し得る。   Then, the electrode pads formed on the circuit board 11 bonded to the heat sink 12 and the lead frame 14 are electrically connected via wires 15 or the like by wire bonding. Then, the circuit board 11 and the heat sink 12 bonded together as described above are sealed with a mold resin 13 as shown in FIG. 8G, whereby the semiconductor device 10 shown in FIG. 1 is completed. Note that the process shown in FIG. 8G can correspond to an example of a “third process” described in the claims.

以上説明したように、本第１実施形態に係る半導体装置１０では、回路基板１１の裏面１１ｂとヒートシンク１２の接着面１２ａとの間には、両部材１１，１２を接着する接着剤２０として、粘度が１００Ｐａ・ｓ以上であるシリコーン系接着剤が塗布されており、回路基板１１の裏面１１ｂとヒートシンク１２の接着面１２ａとの間から押し出された接着剤２０の押出端部２１が断面山形状に盛り上がるように形成されている。   As described above, in the semiconductor device 10 according to the first embodiment, the adhesive 20 that bonds the members 11 and 12 between the back surface 11b of the circuit board 11 and the bonding surface 12a of the heat sink 12 is as follows. A silicone-based adhesive having a viscosity of 100 Pa · s or more is applied, and the extruded end portion 21 of the adhesive 20 extruded from between the back surface 11 b of the circuit board 11 and the adhesive surface 12 a of the heat sink 12 has a cross-sectional mountain shape. It is formed to swell.

そして、本第１実施形態に係る半導体装置１０の製造方法では、図７（Ａ）〜図８（Ｄ）に示す工程により、接着剤６０として粘度が１００Ｐａ・ｓ以上であるシリコーン系接着剤が、ヒートシンク１２の接着面１２ａに塗布され、図８（Ｆ）に示す工程により、回路基板１１の裏面１１ｂとヒートシンク１２の接着面１２ａとが接着剤２０を介して接着されるとともにこれら両面１１ｂ，１２ａ間から押し出された接着剤２０の押出端部２１が断面山形状に盛り上げられ、図８（Ｇ）に示す工程により、接着された回路基板１１およびヒートシンク１２がモールド樹脂１３により封止される。   And in the manufacturing method of the semiconductor device 10 which concerns on this 1st Embodiment, the silicone type adhesive whose viscosity is 100 Pa.s or more is used as the adhesive agent 60 by the process shown to FIG. 7 (A)-FIG. 8 (D). The back surface 11b of the circuit board 11 and the adhesive surface 12a of the heat sink 12 are bonded via the adhesive 20 and applied to the adhesive surface 12a of the heat sink 12 through the process shown in FIG. The extruded end portion 21 of the adhesive 20 extruded from between 12a is raised in a cross-sectional mountain shape, and the bonded circuit board 11 and heat sink 12 are sealed with the mold resin 13 by the process shown in FIG. .

これにより、接着時に上記両面１１ｂ，１２ａ間から押し出された接着剤２０の押出端部２１は、回路基板１１の側面１１ｃにてフィレット２２を形成することなく断面山形状に盛り上がることとなり、両面１１ｂ，１２ａ間から押し出された接着剤２０が回路基板１１の側面１１ｃに接触しにくくなるので、シリコーン系接着剤を使用する場合でも、上記両面１１ｂ，１２ａ間の接着後にモールド樹脂１３により封止されるまでに、シリコーン系材料の低分子成分が基板表面１１ａ等まで染み出すことが抑制される。
したがって、シリコーン系の接着剤にて接着された回路基板１１およびヒートシンク１２を封止するモールド樹脂１３の密着力の低下を抑制することができる。 As a result, the extrusion end portion 21 of the adhesive 20 extruded from between the both surfaces 11b and 12a at the time of bonding rises in a cross-sectional mountain shape without forming the fillet 22 on the side surface 11c of the circuit board 11, and the both surfaces 11b. , 12a is not easily brought into contact with the side surface 11c of the circuit board 11, so that even when a silicone adhesive is used, it is sealed with the mold resin 13 after the bonding between the both surfaces 11b, 12a. By this time, the low molecular component of the silicone material is prevented from seeping out to the substrate surface 11a and the like.
Therefore, it is possible to suppress a decrease in the adhesion of the mold resin 13 that seals the circuit board 11 and the heat sink 12 bonded with the silicone-based adhesive.

また、本第１実施形態に係る半導体装置１０およびその製造方法では、シリコーン系接着剤の粘度を高くするために、シリコーン系接着剤に含まれるフィラーの割合が７０ｗｔ％以上に設定されている。これにより、シリコーン系接着剤の粘度を好適に高くして、接着時に上記両面１１ｂ，１２ａ間から押し出された接着剤２０を回路基板１１の側面１１ｃに対してより接触しにくくすることができる。   In the semiconductor device 10 and the manufacturing method thereof according to the first embodiment, the ratio of the filler contained in the silicone adhesive is set to 70 wt% or more in order to increase the viscosity of the silicone adhesive. Thereby, the viscosity of a silicone type adhesive agent can be made high suitably, and the adhesive agent 20 extruded from between the said both surfaces 11b and 12a at the time of adhesion | attachment can be made harder to contact with the side surface 11c of the circuit board 11. FIG.

さらに、本第１実施形態に係る半導体装置１０の製造方法では、図７（Ｂ）および図８（Ｄ）に示す工程により、接着剤２０は、回路基板１１の中央部および四隅に対応する部位である中央部２３および四隅部２４の厚さが他の部位より厚く塗布される。   Furthermore, in the method for manufacturing the semiconductor device 10 according to the first embodiment, the adhesive 20 is applied to the portions corresponding to the central portion and the four corners of the circuit board 11 by the steps shown in FIGS. 7B and 8D. The thickness of the central portion 23 and the four corner portions 24 is thicker than other portions.

これにより、接着剤２０として粘度が高いものを採用する場合でも、ボイドの発生を抑制することができ、ヒートシンク１２から接着剤２０のはみ出しをなくすとともに上記両面１１ｂ，１２ａと接着剤２０との隙間をなくした接着状態を容易に成形することができる。   Thereby, even when a high viscosity adhesive 20 is used, the generation of voids can be suppressed, and the adhesive 20 can be prevented from protruding from the heat sink 12 and the gap between the both surfaces 11b and 12a and the adhesive 20 can be prevented. It is possible to easily mold the bonded state without the above.

図１２は、第１実施形態の半導体装置１０の製造方法に係る第１変形例の要部を示す説明図であり、図１２（Ａ）は上面図、図１２（Ｂ）は側面図である。図１３は、第１実施形態の半導体装置１０の製造方法に係る第２変形例の要部を示す説明図であり、図１３（Ａ）は上面図、図１３（Ｂ）は側面図である。図１４は、第１実施形態の半導体装置１０の製造方法に係る第３変形例の要部を示す上面図である。   FIGS. 12A and 12B are explanatory views showing a main part of a first modification according to the method for manufacturing the semiconductor device 10 of the first embodiment. FIG. 12A is a top view and FIG. 12B is a side view. . FIGS. 13A and 13B are explanatory views showing a main part of a second modification according to the method for manufacturing the semiconductor device 10 of the first embodiment, FIG. 13A is a top view, and FIG. 13B is a side view. . FIG. 14 is a top view illustrating a main part of a third modification example according to the method for manufacturing the semiconductor device 10 of the first embodiment.

図１２（Ａ），（Ｂ）に示すように、溝付スキージ３２を使用することなく、中央部２３および各四隅部２４を、ディスペンス法により、他の部位と比べて盛り上げるように形成してもよい。また、図１３（Ａ），（Ｂ）に示すように、ディスペンス法を用いることなく、中央部２３および各四隅部２４を、所定の形状の溝付スキージをヒートシンク１２の一辺と略平行に移動させることで、他の部位と比べて盛り上げるように形成してもよい。また、図１４に示すように、ディスペンス法を用いることなく、中央部２３および各四隅部２４を、所定の形状の溝付スキージをヒートシンク１２の各辺と交差するように移動させることで、他の部位と比べて盛り上げるように形成してもよい。この場合、図１４に示すように、対角に位置する２つの四隅部２４と中央部２３とが連結することとなる。   As shown in FIGS. 12A and 12B, without using a squeegee 32 with a groove, the central portion 23 and each of the four corner portions 24 are formed so as to rise compared to other portions by a dispensing method. Also good. Further, as shown in FIGS. 13A and 13B, the grooved squeegee having a predetermined shape is moved substantially parallel to one side of the heat sink 12 through the central portion 23 and the four corner portions 24 without using the dispensing method. By doing so, you may form so that it may rise compared with another site | part. Further, as shown in FIG. 14, without using the dispensing method, the center portion 23 and the four corner portions 24 are moved so that the grooved squeegee having a predetermined shape intersects each side of the heat sink 12. You may form so that it may swell compared with these parts. In this case, as shown in FIG. 14, the two corners 24 and the central part 23 that are diagonally connected are connected.

このように、図７（Ｂ）および図８（Ｄ）に示す工程にて、回路基板１１の中央部および四隅に対応する接着剤２０の中央部２３および各四隅部２４の少なくともいずれかを、要求される厚みに応じた形状の溝付スキージを用いて他の部位より厚く塗布してもよいし、ディスペンス法により他の部位より厚く塗布してもよい。   As described above, in the process shown in FIGS. 7B and 8D, at least one of the central portion 23 of the adhesive 20 and the four corner portions 24 corresponding to the central portion and the four corners of the circuit board 11, A grooved squeegee having a shape corresponding to the required thickness may be used to apply thicker than other parts, or it may be applied thicker than other parts by a dispensing method.

［第２実施形態］
次に、本発明の第２実施形態に係る半導体装置について図１５および図１６を参照して説明する。図１５は、第２実施形態に係る半導体装置１０の要部を示す断面図である。図１６（Ａ）〜（Ｄ）は、接着時の接着剤２０の流れを示す説明図である。
図１５に示すように、本第２実施形態に係る半導体装置１０は、回路基板１１の裏面１１ｂに表面粗さが小さい裏面樹脂４０が貼り付けされている点が、上記第１実施形態および各変形例に係る半導体装置と異なる。したがって、第１実施形態の半導体装置と実質的に同一の構成部分には、同一符号を付し、その説明を省略する。 [Second Embodiment]
Next, a semiconductor device according to a second embodiment of the present invention will be described with reference to FIGS. FIG. 15 is a cross-sectional view showing the main parts of the semiconductor device 10 according to the second embodiment. FIGS. 16A to 16D are explanatory views showing the flow of the adhesive 20 during bonding.
As shown in FIG. 15, in the semiconductor device 10 according to the second embodiment, the back surface resin 40 having a small surface roughness is attached to the back surface 11b of the circuit board 11. Different from the semiconductor device according to the modification. Therefore, substantially the same components as those of the semiconductor device of the first embodiment are denoted by the same reference numerals, and description thereof is omitted.

回路基板１１の裏面１１ｂに表面粗さが小さい裏面樹脂４０が貼り付けられることで、ヒートシンク１２の接着面１２ａの表面粗さは、回路基板１１の裏面１１ｂの表面粗さよりも大きくなる。このため、図１６（Ａ）に示すように、接着剤２０が塗布されたヒートシンク１２に対して裏面樹脂４０が貼り付けられた回路基板１１を位置決めし、図１６（Ｂ）に示すように、裏面樹脂４０と接着面１２ａとで接着剤２０を押しつぶす場合、両面１１ｂ，１２ａ間の接着剤２０は回路基板１１の裏面１１ｂに沿い流れやすくなる。このため、図１６（Ｃ）に示すように、両面１１ｂ，１２ａ間から押し出された回路基板１１側の接着剤２０がヒートシンク１２の接着面１２ａに向かうように流れることとなる（図１６の矢印α参照）。これにより、接着時に両面１１ｂ，１２ａ間から押し出された接着剤２０を、回路基板１１の側面１１ｃに対してより接触しにくくすることができる（図１６（Ｄ）参照）。   By attaching the back surface resin 40 having a small surface roughness to the back surface 11 b of the circuit board 11, the surface roughness of the adhesive surface 12 a of the heat sink 12 becomes larger than the surface roughness of the back surface 11 b of the circuit board 11. For this reason, as shown in FIG. 16 (A), the circuit board 11 on which the back surface resin 40 is attached is positioned with respect to the heat sink 12 to which the adhesive 20 is applied, and as shown in FIG. 16 (B), When the adhesive 20 is crushed by the back surface resin 40 and the adhesive surface 12a, the adhesive 20 between the both surfaces 11b and 12a easily flows along the back surface 11b of the circuit board 11. Therefore, as shown in FIG. 16C, the adhesive 20 on the side of the circuit board 11 pushed out from between the both surfaces 11b and 12a flows toward the adhesive surface 12a of the heat sink 12 (arrow in FIG. 16). α). Thereby, the adhesive 20 pushed out from between the both surfaces 11b and 12a at the time of adhesion can be made more difficult to contact the side surface 11c of the circuit board 11 (see FIG. 16D).

なお、ヒートシンク１２の接着面１２ａの表面粗さを回路基板１１の裏面１１ｂの表面粗さよりも大きくするために、回路基板１１の裏面１１ｂに裏面樹脂４０を貼り付けることに限らず、例えば、表面加工等を施すことで、接着面１２ａの表面粗さを大きくしてもよいし、裏面１１ｂの表面粗さを小さくしてもよい。   In addition, in order to make the surface roughness of the bonding surface 12a of the heat sink 12 larger than the surface roughness of the back surface 11b of the circuit board 11, the back surface resin 40 is not limited to being attached to the back surface 11b of the circuit board 11, but for example, the front surface By performing processing or the like, the surface roughness of the bonding surface 12a may be increased, or the surface roughness of the back surface 11b may be decreased.

［第３実施形態］
次に、本発明の第３実施形態に係る半導体装置について図１７を参照して説明する。図１７は、第３実施形態に係る半導体装置１０の要部を示す断面図である。
図１７に示すように、本第３実施形態に係る半導体装置１０は、回路基板１１の裏面１１ｂに外縁部１１ｅが中央部１１ｆよりも厚みが薄くなるように段部１１ｄが形成されている点が、上記第１実施形態および各変形例に係る半導体装置と異なる。したがって、第１実施形態の半導体装置と実質的に同一の構成部分には、同一符号を付し、その説明を省略する。 [Third Embodiment]
Next, a semiconductor device according to a third embodiment of the present invention will be described with reference to FIG. FIG. 17 is a cross-sectional view showing the main parts of the semiconductor device 10 according to the third embodiment.
As shown in FIG. 17, in the semiconductor device 10 according to the third embodiment, the step portion 11d is formed on the back surface 11b of the circuit board 11 so that the outer edge portion 11e is thinner than the center portion 11f. However, this is different from the semiconductor device according to the first embodiment and each modification. Therefore, substantially the same components as those of the semiconductor device of the first embodiment are denoted by the same reference numerals, and description thereof is omitted.

回路基板１１の裏面１１ｂに外縁部１１ｅが中央部１１ｆよりも厚みが薄くなるように段部１１ｄが形成されるため、接着時に中央部１１ｆから外縁部１１ｅへ押し出される接着剤２０が当該外縁部１１ｅに接触しにくくなる。これにより、接着時に両面１１ｂ，１２ａ間から押し出される直前の接着剤２０は、ヒートシンク１２の接着面１２ａにのみ接触し回路基板１１の裏面１１ｂには接触しないので、両面１１ｂ，１２ａ間から押し出された接着剤２０を、回路基板１１の側面１１ｃに対してより接触しにくくすることができる。   Since the step portion 11d is formed on the back surface 11b of the circuit board 11 so that the outer edge portion 11e is thinner than the central portion 11f, the adhesive 20 pushed out from the central portion 11f to the outer edge portion 11e during bonding is the outer edge portion. It becomes difficult to contact 11e. As a result, the adhesive 20 immediately before being pushed out from between the both surfaces 11b and 12a at the time of bonding contacts only the bonding surface 12a of the heat sink 12 and does not contact the back surface 11b of the circuit board 11, and thus is pushed out from between the both surfaces 11b and 12a. The adhesive 20 can be made less likely to come into contact with the side surface 11 c of the circuit board 11.

なお、回路基板１１の裏面１１ｂに段部１１ｄを形成するために、中央部１１ｆに相当する部分に厚みのある裏面樹脂４０等を貼り付けることで、外縁部１１ｅの厚みを中央部１１ｆよりも薄くしてもよい。   In addition, in order to form the step part 11d on the back surface 11b of the circuit board 11, the thickness of the outer edge part 11e is made larger than that of the center part 11f by pasting a thick back resin 40 or the like on the part corresponding to the center part 11f. It may be thinned.

なお、本発明は上記各実施形態およびその変形例に限定されるものではなく、以下のように具体化してもよく、その場合でも、上記各実施形態およびその変形例と同等の作用・効果が得られる。
（１）回路基板１１は、ヒートシンク１２に代えて、リードフレームなどベース体となり得るものの接着面に対して接着剤２０にて接着されて封止部材であるモールド樹脂１３にて封止されてもよい。 The present invention is not limited to the above-described embodiments and modifications thereof, and may be embodied as follows. Even in this case, the same operations and effects as the above-described embodiments and modifications thereof are provided. can get.
(1) The circuit board 11 may be bonded to the bonding surface of a base body such as a lead frame instead of the heat sink 12 with an adhesive 20 and sealed with a mold resin 13 as a sealing member. Good.

（２）図７（Ａ）〜（Ｃ）および図８（Ｄ）に示す工程では、接着剤２０がヒートシンク１２に代えて回路基板１１の裏面１１ｂに塗布されることで、回路基板１１およびヒートシンク１２を接着剤２０にて接着固定してもよい。 (2) In the steps shown in FIGS. 7A to 7C and FIG. 8D, the adhesive 20 is applied to the back surface 11b of the circuit board 11 instead of the heat sink 12, so that the circuit board 11 and the heat sink are applied. 12 may be bonded and fixed with an adhesive 20.

（３）接着剤２０に含まれるシリコーン系材料の低分子成分が基板表面１１ａ等まで染み出しにくい場合や染み出し可能長さｄｚが長い場合などには、１００Ｐａ・ｓよりも小さな粘度、例えば、８０Ｐａ・ｓ程度の粘度の接着剤を、回路基板１１およびヒートシンク１２の接着固定に使用してもよい。 (3) When the low molecular component of the silicone material contained in the adhesive 20 is difficult to bleed up to the substrate surface 11a or the like, or when the bleedable length dz is long, the viscosity smaller than 100 Pa · s, for example, An adhesive having a viscosity of about 80 Pa · s may be used for bonding and fixing the circuit board 11 and the heat sink 12.

１０…半導体装置
１１…回路基板
１１ａ…表面
１１ｂ…裏面
１１ｃ…側面
１１ｄ…段部
１２…ヒートシンク（ベース体）
１２ａ…接着面
１３…モールド樹脂（封止部材）
２０…接着剤
２１…押出端部
２２…フィレット
２３…中央部
２４…四隅部
３１…印刷用マスク
３２…溝付スキージ
４０…裏面樹脂 DESCRIPTION OF SYMBOLS 10 ... Semiconductor device 11 ... Circuit board 11a ... Front surface 11b ... Back surface 11c ... Side surface 11d ... Step part 12 ... Heat sink (base body)
12a ... Adhesive surface 13 ... Mold resin (sealing member)
DESCRIPTION OF SYMBOLS 20 ... Adhesive 21 ... Extrusion end part 22 ... Fillet 23 ... Center part 24 ... Four corners 31 ... Printing mask 32 ... Grooved squeegee 40 ... Back surface resin

Claims (9)

回路基板とこの回路基板が接着剤により接着されるベース体との少なくとも一部が封止部材により封止される半導体装置において、
前記回路基板の裏面と前記ベース体の接着面との間には、前記接着剤として粘度が１００Ｐａ・ｓ以上であるシリコーン系接着剤が塗布され、
前記ベース体の接着面の表面粗さは、前記回路基板の裏面の表面粗さよりも大きく、
前記回路基板の裏面と前記ベース体の接着面との両面により押しつぶされて前記回路基板の裏面に沿い流動する回路基板側の前記接着剤が前記ベース体の接着面に向かい流動し、前記両面間から押し出された前記接着剤が断面山形状に盛り上がるように形成されることを特徴とする半導体装置。 In a semiconductor device in which at least a part of a circuit board and a base body to which the circuit board is bonded by an adhesive is sealed by a sealing member,
Between the back surface of the circuit board and the adhesive surface of the base body, a silicone-based adhesive having a viscosity of 100 Pa · s or more is applied as the adhesive,
The surface roughness of the adhesive surface of the base body is larger than the surface roughness of the back surface of the circuit board,
The adhesive on the circuit board side that is crushed by both the back surface of the circuit board and the adhesive surface of the base body and flows along the back surface of the circuit board flows toward the adhesive surface of the base body, A semiconductor device, characterized in that the adhesive extruded from the substrate is formed so as to rise in a cross-sectional mountain shape. 前記回路基板の裏面に外縁部が中央部よりも厚みが薄くなるように段部が形成されることで、前記両面間から押し出される直前の前記接着剤の前記段部への接触を抑制することを特徴とする請求項１に記載の半導体装置。 A step portion is formed on the back surface of the circuit board such that the outer edge portion is thinner than the center portion, thereby suppressing contact of the adhesive with the step portion immediately before being pushed out from between both surfaces. The semiconductor device according to claim 1. 前記シリコーン系接着剤に含まれるフィラーの割合が７０ｗｔ％以上であることを特徴とする請求項１または２に記載の半導体装置。 The semiconductor device according to claim 1 or 2 percentage of filler contained in the silicone-based adhesive, characterized in der Rukoto least 70 wt%. 回路基板とこの回路基板が接着剤により接着されるベース体との少なくとも一部が封止部材により封止される半導体装置の製造方法において、
前記ベース体の接着面の表面粗さは、前記回路基板の裏面の表面粗さよりも大きく、
前記接着剤として粘度が１００Ｐａ・ｓ以上であるシリコーン系接着剤を、前記ベース体の接着面および前記回路基板の裏面のいずれか一方に塗布する第１工程と、
前記回路基板の裏面と前記ベース体の接着面との両面により前記接着剤を押しつぶして、前記回路基板の裏面に沿い流動した回路基板側の前記接着剤を前記ベース体の接着面に向かうように流動させて、前記回路基板の裏面と前記ベース体の接着面とを前記接着剤を介して接着するとともにこれら両面間から押し出された接着剤を断面山形状に盛り上げる第２工程と、
接着された前記回路基板および前記ベース体の少なくとも一部を前記封止部材により封止する第３工程と、
を備えることを特徴とする半導体装置の製造方法。 In a method for manufacturing a semiconductor device in which at least a part of a circuit board and a base body to which the circuit board is bonded by an adhesive is sealed by a sealing member.
The surface roughness of the adhesive surface of the base body is larger than the surface roughness of the back surface of the circuit board,
A first step of applying a silicone-based adhesive having a viscosity of 100 Pa · s or more as the adhesive to either the adhesive surface of the base body or the back surface of the circuit board;
The adhesive is crushed by both the back surface of the circuit board and the adhesive surface of the base body so that the adhesive on the circuit board side flowing along the back surface of the circuit board is directed toward the adhesive surface of the base body. A second step of flowing and adhering the back surface of the circuit board and the adhesive surface of the base body via the adhesive and raising the adhesive extruded from both sides into a cross-sectional mountain shape;
A third step of sealing at least a part of the bonded circuit board and the base body with the sealing member;
A method for manufacturing a semiconductor device, comprising: 前記回路基板の裏面に外縁部が中央部よりも厚みが薄くなるように段部が形成されることで、前記第２工程にて、前記両面間から押し出される直前の前記接着剤の前記段部への接触を抑制することを特徴とする請求項４に記載の半導体装置の製造方法。 In the second step, the step portion of the adhesive immediately before being pushed out from between both surfaces is formed by forming a step portion on the back surface of the circuit board so that the outer edge portion is thinner than the center portion. The method for manufacturing a semiconductor device according to claim 4, wherein contact with the semiconductor device is suppressed . 前記シリコーン系接着剤に含まれるフィラーの割合が７０ｗｔ％以上であることを特徴とする請求項４または５に記載の半導体装置の製造方法。 The method for manufacturing a semiconductor device according to claim 4, wherein a ratio of the filler contained in the silicone-based adhesive is 70 wt% or more . 前記第１工程では、前記接着剤は、前記回路基板の中央部および四隅に対応する部位の厚さが他の部位より厚く塗布されることを特徴とする請求項４〜６のいずれか一項に記載の半導体装置の製造方法。 7. The adhesive according to claim 4, wherein in the first step, the adhesive is applied such that the thicknesses of the portions corresponding to the central portion and the four corners of the circuit board are thicker than other portions. The manufacturing method of the semiconductor device as described in any one of. 前記第１工程では、前記回路基板の中央部および四隅に対応する前記接着剤の部位の少なくともいずれかは、要求される厚みに応じた形状の溝付スキージを用いて、他の部位より厚く塗布されることを特徴とする請求項７に記載の半導体装置の製造方法。 In the first step, at least one of the adhesive portions corresponding to the central portion and the four corners of the circuit board is applied thicker than other portions using a grooved squeegee having a shape corresponding to the required thickness. The method of manufacturing a semiconductor device according to claim 7 , wherein: 前記第１工程では、前記回路基板の中央部および四隅に対応する前記接着剤の部位の少なくともいずれかは、ディスペンス法により、他の部位より厚く塗布されることを特徴とする請求項７に記載の半導体装置の製造方法。 In the first step, at least one portion of the adhesive corresponding to the central portion and four corners of the circuit board, according to claim 7, characterized in that the dispensing method, is applied thicker than other portions Semiconductor device manufacturing method.
JP2010163965A 2010-07-21 2010-07-21 Semiconductor device and manufacturing method of semiconductor device Expired - Fee Related JP5429092B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2010163965A JP5429092B2 (en) 2010-07-21 2010-07-21 Semiconductor device and manufacturing method of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2010163965A JP5429092B2 (en) 2010-07-21 2010-07-21 Semiconductor device and manufacturing method of semiconductor device

Publications (2)

Publication Number Publication Date
JP2012028443A JP2012028443A (en) 2012-02-09
JP5429092B2 true JP5429092B2 (en) 2014-02-26

Family

ID=45781052

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2010163965A Expired - Fee Related JP5429092B2 (en) 2010-07-21 2010-07-21 Semiconductor device and manufacturing method of semiconductor device

Country Status (1)

Country Link
JP (1) JP5429092B2 (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2015198911A1 (en) * 2014-06-26 2015-12-30 ソニー株式会社 Semiconductor device and method for manufacturing semiconductor device
CN107369656B (en) * 2017-07-17 2018-05-22 睿力集成电路有限公司 A kind of window-type ball grid array package assembling

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3294926B2 (en) * 1993-12-21 2002-06-24 積水化学工業株式会社 Floor panel
JP2647047B2 (en) * 1995-03-01 1997-08-27 日本電気株式会社 Flip chip mounting method for semiconductor element and adhesive used in this mounting method
JPH09275170A (en) * 1996-04-03 1997-10-21 Fuji Electric Co Ltd Semiconductor device
DE10009678C1 (en) * 2000-02-29 2001-07-19 Siemens Ag Heat conducting adhesive joint between two workpieces used in the production of electronic components comprises a layer of heat conducting material having two flat sided surfaces with openings on each surface
JP2005116566A (en) * 2003-10-02 2005-04-28 Sumitomo Bakelite Co Ltd Adhesive for fixing semiconductor element, method of supplying adhesive to semiconductor element, semiconductor device and its manufacturing method
JP2007168786A (en) * 2006-12-25 2007-07-05 Hitachi Ltd In-vehicle electronic device and thermal flowmeter
JP2009016659A (en) * 2007-07-06 2009-01-22 Denso Corp Component connection structure and connection method of component
JP2009071218A (en) * 2007-09-18 2009-04-02 Denso Corp Electronic apparatus
JP2009256400A (en) * 2008-04-11 2009-11-05 Shin Etsu Chem Co Ltd Silicone adhesive for semiconductor element
JP5340069B2 (en) * 2008-08-29 2013-11-13 京セラ株式会社 Carbon-metal composite and circuit member or heat dissipation member using the same

Also Published As

Publication number Publication date
JP2012028443A (en) 2012-02-09

Similar Documents

Publication Publication Date Title
JP5813137B2 (en) Power semiconductor device and manufacturing method thereof
CN108109927B (en) Semiconductor device and method for manufacturing the same
US10262912B2 (en) Semiconductor device
JP2014207430A (en) Semiconductor device
EP3285289A1 (en) Semiconductor device
JP2009105366A (en) Semiconductor device and method of manufacturing semiconductor device as well as package of semiconductor device
CN111095537B (en) Semiconductor device and power conversion device provided with same
JP5126201B2 (en) Semiconductor module and manufacturing method thereof
JP2006253354A (en) Circuit device and its manufacturing method
CN107210233B (en) Semiconductor device and method for manufacturing the same
JP5429092B2 (en) Semiconductor device and manufacturing method of semiconductor device
JP6972622B2 (en) Semiconductor devices and methods for manufacturing semiconductor devices
JP2013065648A (en) Semiconductor device and manufacturing method of the same
JP2003051573A (en) Power module and its manufacturing method
JP2010272556A (en) Mold package, and method for manufacturing the same
JP2014090103A (en) Molded package and method for manufacturing the same
JP6797002B2 (en) Semiconductor devices and methods for manufacturing semiconductor devices
US9960126B2 (en) Semiconductor device
JP6480550B2 (en) Wire bonding method and semiconductor device
JP2007201036A (en) Electronic device and its manufacturing process
JP2005093635A (en) Resin-sealed semiconductor device
US20230142695A1 (en) Semiconductor device and manufacturing method therefor
WO2021229673A1 (en) Power semiconductor device
JP2008288566A (en) Semiconductor device
JP2022181779A (en) Semiconductor device and method for manufacturing semiconductor device

Legal Events

Date Code Title Description
A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20120924

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20130730

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20130820

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20131008

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20131105

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20131118

R151 Written notification of patent or utility model registration

Ref document number: 5429092

Country of ref document: JP

Free format text: JAPANESE INTERMEDIATE CODE: R151

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

LAPS Cancellation because of no payment of annual fees