JP5352737B2 - 多結晶シリコン薄膜の製造方法 - Google Patents
多結晶シリコン薄膜の製造方法 Download PDFInfo
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- JP5352737B2 JP5352737B2 JP2012509721A JP2012509721A JP5352737B2 JP 5352737 B2 JP5352737 B2 JP 5352737B2 JP 2012509721 A JP2012509721 A JP 2012509721A JP 2012509721 A JP2012509721 A JP 2012509721A JP 5352737 B2 JP5352737 B2 JP 5352737B2
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/20—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02521—Materials
- H01L21/02524—Group 14 semiconducting materials
- H01L21/02532—Silicon, silicon germanium, germanium
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- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02436—Intermediate layers between substrates and deposited layers
- H01L21/02439—Materials
- H01L21/02441—Group 14 semiconducting materials
- H01L21/0245—Silicon, silicon germanium, germanium
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- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02436—Intermediate layers between substrates and deposited layers
- H01L21/02439—Materials
- H01L21/02488—Insulating materials
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02436—Intermediate layers between substrates and deposited layers
- H01L21/02439—Materials
- H01L21/02491—Conductive materials
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02436—Intermediate layers between substrates and deposited layers
- H01L21/02494—Structure
- H01L21/02496—Layer structure
- H01L21/02505—Layer structure consisting of more than two layers
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02587—Structure
- H01L21/0259—Microstructure
- H01L21/02595—Microstructure polycrystalline
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02656—Special treatments
- H01L21/02664—Aftertreatments
- H01L21/02667—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
- H01L21/02672—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth using crystallisation enhancing elements
Description
Claims (7)
- 絶縁基板の上に金属層を形成する金属層形成段階と、
前記金属層を熱処理することにより、又は、前記金属層の上に金属酸化膜を蒸着することにより、前記金属層の表面に金属酸化膜を形成する酸化膜形成段階と、
前記酸化膜形成段階で形成された前記金属酸化膜の上にシリコン層を積層する第1シリコン層形成段階と、
触媒金属原子が前記金属層から前記シリコン層に移動してシリサイド層を形成するように熱処理を行う第1熱処理段階と、
前記シリサイド層の上に非晶質シリコン層を積層させる第2シリコン層形成段階と、
前記シリサイド層の粒子を媒介として前記非晶質シリコン層から結晶質シリコンが生成されるように熱処理を行う結晶化段階と、を含むことを特徴とする多結晶シリコン薄膜の製造方法。 - 前記基板は、前記金属層との間に、SiO2からなる緩衝層を含むことを特徴とする請求項1に記載の多結晶シリコン薄膜の製造方法。
- 前記第1シリコン層形成段階の後に、前記シリコン層の上に窒化シリコン層(SiN)を形成する過剰触媒捕集層形成段階と、
前記第1熱処理段階の後に、前記窒化シリコン層をエッチングして除去するエッチング段階と、をさらに含むことを特徴とする請求項1または請求項2に記載の多結晶シリコン薄膜の製造方法。 - 前記金属層の厚みは、5Åないし1,500Åであり、前記酸化膜の厚みは、1Åないし300Åであり、前記シリコン層の厚みは、5Åないし1,500Åであり、前記金属層の厚みと前記シリコン層の厚みとの比は、1:0.5ないし1:6であることを特徴とする請求項1に記載の多結晶シリコン薄膜の製造方法。
- 前記酸化膜形成段階での熱処理温度は、400℃ないし1,000℃であり、前記第1熱処理段階での熱処理温度は、300℃ないし1,000℃であることを特徴とする請求項3に記載の多結晶シリコン薄膜の製造方法。
- 前記酸化膜形成段階の後に、前記金属層が露出するように前記酸化膜の一部分をフォトリソグラフィー又はエッチングで除去することにより前記酸化膜をパターニングするパターニング段階を含み、その後に、前記第1シリコン層形成段階を行うことを特徴とする請求項1に記載の多結晶シリコン薄膜の製造方法。
- 絶縁基板上に非晶質シリコンを積層させる第1シリコン層形成段階と、
前記非晶質シリコン上に、金属とその金属の酸化物とが混在した状態で金属酸化膜を形成する酸化膜形成段階と、
前記酸化膜上に非晶質シリコンを積層させる第2シリコン層形成段階と、
前記酸化膜の金属粒子を触媒として、前記シリコン層の非晶質シリコンが結晶質シリコンに成長するように熱処理を行う結晶化段階と、を含むことを特徴とする多結晶シリコン薄膜の製造方法。
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1020090045191A KR100994236B1 (ko) | 2009-05-22 | 2009-05-22 | 다결정 실리콘 박막의 제조방법 |
KR10-2009-0045191 | 2009-05-22 | ||
PCT/KR2010/001761 WO2010134691A2 (ko) | 2009-05-22 | 2010-03-23 | 다결정 실리콘 박막의 제조방법 |
Publications (2)
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JP2012526379A JP2012526379A (ja) | 2012-10-25 |
JP5352737B2 true JP5352737B2 (ja) | 2013-11-27 |
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JP2012509721A Active JP5352737B2 (ja) | 2009-05-22 | 2010-03-23 | 多結晶シリコン薄膜の製造方法 |
Country Status (5)
Country | Link |
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US (1) | US8367527B2 (ja) |
JP (1) | JP5352737B2 (ja) |
KR (1) | KR100994236B1 (ja) |
CN (1) | CN102414791B (ja) |
WO (1) | WO2010134691A2 (ja) |
Families Citing this family (5)
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KR101057147B1 (ko) | 2010-03-23 | 2011-08-16 | 노코드 주식회사 | 다결정 실리콘 박막의 제조방법 |
CN102732941B (zh) * | 2012-05-30 | 2016-03-09 | 昆山工研院新型平板显示技术中心有限公司 | 一种低温多晶硅薄膜制造方法 |
CN104299891B (zh) * | 2014-10-20 | 2017-06-09 | 京东方科技集团股份有限公司 | 低温多晶硅薄膜的制备方法、tft、阵列基板及显示装置 |
KR101919086B1 (ko) * | 2017-01-25 | 2018-11-16 | 강원대학교산학협력단 | 다결정 실리콘 박막 형성 방법 |
US11114288B2 (en) | 2019-02-08 | 2021-09-07 | Applied Materials, Inc. | Physical vapor deposition apparatus |
Family Cites Families (10)
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JP2001291876A (ja) * | 1993-02-15 | 2001-10-19 | Semiconductor Energy Lab Co Ltd | 薄膜トランジスタ |
JP3540012B2 (ja) * | 1994-06-07 | 2004-07-07 | 株式会社半導体エネルギー研究所 | 半導体装置作製方法 |
JP3138169B2 (ja) * | 1995-03-13 | 2001-02-26 | シャープ株式会社 | 半導体装置の製造方法 |
JP4176362B2 (ja) * | 2001-03-16 | 2008-11-05 | 株式会社半導体エネルギー研究所 | 半導体装置の作製方法 |
JP4106204B2 (ja) * | 2001-08-22 | 2008-06-25 | シャープ株式会社 | 半導体装置の製造方法 |
AU2002951838A0 (en) * | 2002-10-08 | 2002-10-24 | Unisearch Limited | Method of preparation for polycrystalline semiconductor films |
KR20040061795A (ko) * | 2002-12-31 | 2004-07-07 | 엘지.필립스 엘시디 주식회사 | 다결정 실리콘 박막 제조 방법 |
US7709360B2 (en) * | 2004-06-07 | 2010-05-04 | Imec | Method for manufacturing a crystalline silicon layer |
JP4734944B2 (ja) | 2005-02-02 | 2011-07-27 | セイコーエプソン株式会社 | 薄膜半導体装置の製造方法 |
KR100653853B1 (ko) * | 2005-05-24 | 2006-12-05 | 네오폴리((주)) | 비금속 씨드 에피 성장을 이용한 비정질 반도체 박막의결정화 방법 및 이를 이용한 다결정 박막 트랜지스터의제조방법 |
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- 2010-03-23 CN CN201080019409.8A patent/CN102414791B/zh active Active
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Publication number | Publication date |
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US20120064702A1 (en) | 2012-03-15 |
CN102414791B (zh) | 2014-07-16 |
JP2012526379A (ja) | 2012-10-25 |
US8367527B2 (en) | 2013-02-05 |
KR100994236B1 (ko) | 2010-11-12 |
CN102414791A (zh) | 2012-04-11 |
WO2010134691A3 (ko) | 2011-01-20 |
WO2010134691A2 (ko) | 2010-11-25 |
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