JP5286034B2 - 半導体装置の作製方法 - Google Patents

半導体装置の作製方法 Download PDF

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Publication number
JP5286034B2
JP5286034B2 JP2008284435A JP2008284435A JP5286034B2 JP 5286034 B2 JP5286034 B2 JP 5286034B2 JP 2008284435 A JP2008284435 A JP 2008284435A JP 2008284435 A JP2008284435 A JP 2008284435A JP 5286034 B2 JP5286034 B2 JP 5286034B2
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JP
Japan
Prior art keywords
film
semiconductor layer
insulating film
semiconductor
semiconductor film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2008284435A
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English (en)
Japanese (ja)
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JP2009135483A (ja
JP2009135483A5 (enExample
Inventor
英人 大沼
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Semiconductor Energy Laboratory Co Ltd
Original Assignee
Semiconductor Energy Laboratory Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Semiconductor Energy Laboratory Co Ltd filed Critical Semiconductor Energy Laboratory Co Ltd
Priority to JP2008284435A priority Critical patent/JP5286034B2/ja
Publication of JP2009135483A publication Critical patent/JP2009135483A/ja
Publication of JP2009135483A5 publication Critical patent/JP2009135483A5/ja
Application granted granted Critical
Publication of JP5286034B2 publication Critical patent/JP5286034B2/ja
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/01Manufacture or treatment
    • H10D30/021Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/031Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT]
    • H10D30/0321Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT] comprising silicon, e.g. amorphous silicon or polysilicon
    • H10D30/0323Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT] comprising silicon, e.g. amorphous silicon or polysilicon comprising monocrystalline silicon
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/01Manufacture or treatment
    • H10D30/021Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/031Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT]
    • H10D30/0321Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT] comprising silicon, e.g. amorphous silicon or polysilicon
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/67Thin-film transistors [TFT]
    • H10D30/6704Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device
    • H10D30/6713Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device characterised by the properties of the source or drain regions, e.g. compositions or sectional shapes
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00Electrodes of devices having potential barriers
    • H10D64/20Electrodes characterised by their shapes, relative sizes or dispositions 
    • H10D64/23Electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. sources, drains, anodes or cathodes
    • H10D64/251Source or drain electrodes for field-effect devices
    • H10D64/258Source or drain electrodes for field-effect devices characterised by the relative positions of the source or drain electrodes with respect to the gate electrode
    • H10D64/259Source or drain electrodes being self-aligned with the gate electrode and having bottom surfaces higher than the interface between the channel and the gate dielectric
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/67Thin-film transistors [TFT]
    • H10D30/674Thin-film transistors [TFT] characterised by the active materials
    • H10D30/675Group III-V materials, Group II-VI materials, Group IV-VI materials, selenium or tellurium

Landscapes

  • Thin Film Transistor (AREA)
  • Recrystallisation Techniques (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
JP2008284435A 2007-11-07 2008-11-05 半導体装置の作製方法 Expired - Fee Related JP5286034B2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2008284435A JP5286034B2 (ja) 2007-11-07 2008-11-05 半導体装置の作製方法

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2007289750 2007-11-07
JP2007289750 2007-11-07
JP2008284435A JP5286034B2 (ja) 2007-11-07 2008-11-05 半導体装置の作製方法

Publications (3)

Publication Number Publication Date
JP2009135483A JP2009135483A (ja) 2009-06-18
JP2009135483A5 JP2009135483A5 (enExample) 2011-12-15
JP5286034B2 true JP5286034B2 (ja) 2013-09-11

Family

ID=40588492

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2008284435A Expired - Fee Related JP5286034B2 (ja) 2007-11-07 2008-11-05 半導体装置の作製方法

Country Status (2)

Country Link
US (3) US7749850B2 (enExample)
JP (1) JP5286034B2 (enExample)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20120090014A (ko) * 2011-01-12 2012-08-16 가부시키가이샤 한도오따이 에네루기 켄큐쇼 반도체 장치의 제작 방법

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8759917B2 (en) * 2010-01-04 2014-06-24 Samsung Electronics Co., Ltd. Thin-film transistor having etch stop multi-layer and method of manufacturing the same
US9048327B2 (en) * 2011-01-25 2015-06-02 Semiconductor Energy Laboratory Co., Ltd. Microcrystalline semiconductor film, method for manufacturing the same, and method for manufacturing semiconductor device
JP5960000B2 (ja) * 2012-09-05 2016-08-02 ルネサスエレクトロニクス株式会社 半導体装置及び半導体装置の製造方法
CN111403489B (zh) * 2020-04-15 2023-06-27 合肥鑫晟光电科技有限公司 薄膜晶体管、显示基板及其制作方法
CN112582476B (zh) * 2020-12-09 2022-05-06 全芯智造技术有限公司 半导体器件及其形成方法

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4016587A (en) 1974-12-03 1977-04-05 International Business Machines Corporation Raised source and drain IGFET device and method
JPH04348040A (ja) * 1991-01-18 1992-12-03 Casio Comput Co Ltd 薄膜トランジスタおよびその製造方法
JP3277548B2 (ja) 1991-05-08 2002-04-22 セイコーエプソン株式会社 ディスプレイ基板
US5491099A (en) 1994-08-29 1996-02-13 United Microelectronics Corporation Method of making silicided LDD with recess in semiconductor substrate
JPH09298170A (ja) * 1996-04-30 1997-11-18 Hitachi Ltd 半導体装置用電極配線およびその製造方法
US6063675A (en) 1996-10-28 2000-05-16 Texas Instruments Incorporated Method of forming a MOSFET using a disposable gate with a sidewall dielectric
US6306712B1 (en) 1997-12-05 2001-10-23 Texas Instruments Incorporated Sidewall process and method of implantation for improved CMOS with benefit of low CGD, improved doping profiles, and insensitivity to chemical processing
EP1649506A1 (en) * 2003-07-31 2006-04-26 Advanced Micro Devices, Inc. Field effect transistor having a doped gate electrode with reduced gate depletion and method of forming the transistor
JP2005167068A (ja) * 2003-12-04 2005-06-23 Seiko Epson Corp 半導体装置およびその製造方法
US7018901B1 (en) * 2004-09-29 2006-03-28 Freescale Semiconductor, Inc. Method for forming a semiconductor device having a strained channel and a heterojunction source/drain
JP4655797B2 (ja) * 2005-07-19 2011-03-23 信越半導体株式会社 直接接合ウエーハの製造方法
KR100647457B1 (ko) * 2005-12-09 2006-11-23 한국전자통신연구원 반도체 소자 및 그 제조방법
US7772054B2 (en) * 2007-06-15 2010-08-10 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing semiconductor device
US7851318B2 (en) * 2007-11-01 2010-12-14 Semiconductor Energy Laboratory Co., Ltd. Semiconductor substrate and method for manufacturing the same, and method for manufacturing semiconductor device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20120090014A (ko) * 2011-01-12 2012-08-16 가부시키가이샤 한도오따이 에네루기 켄큐쇼 반도체 장치의 제작 방법
KR101953911B1 (ko) 2011-01-12 2019-03-04 가부시키가이샤 한도오따이 에네루기 켄큐쇼 반도체 장치의 제작 방법

Also Published As

Publication number Publication date
US20100197087A1 (en) 2010-08-05
US8198165B2 (en) 2012-06-12
US7749850B2 (en) 2010-07-06
US20090117693A1 (en) 2009-05-07
JP2009135483A (ja) 2009-06-18
US8026144B2 (en) 2011-09-27
US20110318896A1 (en) 2011-12-29

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