JP5271694B2 - diode - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a diode for stabilizing withstand voltage and maintaining a clamping voltage at low. <P>SOLUTION: This diode includes: a semiconductor substrate having a first conductivity type; a first semiconductor layer provided on one surface of the semiconductor substrate to form bonding between itself and the semiconductor substrate, having the same conductivity type as the first conductivity type and having impurity concentration higher than that of the semiconductor substrate; a second semiconductor layer having a second conductivity type opposite to the first conductivity type and formed on the surface on a center region of the first semiconductor layer; and a second conductivity-type third semiconductor layer formed on the outer periphery of the second semiconductor layer on the surface of the first semiconductor layer. The thickness of the third semiconductor layer is thicker than the thickness of the second semiconductor layer. <P>COPYRIGHT: (C)2010,JPO&amp;INPIT

Description

  The present invention relates to an avalanche breakdown type high voltage constant voltage diode.

A constant voltage diode using an avalanche breakdown phenomenon is widely used in various electronic circuits such as a reference voltage circuit and a protection circuit (see, for example, Patent Document 1).
In the conventional constant voltage diode, as shown in FIG. 4, the depletion layer is further extended at the interface between the epi layer 102 and the semiconductor layer 103, the depletion layer extending to the epi layer 102 reaches the semiconductor substrate 101, and reach-through breakdown is caused. The breakdown voltage is obtained by waking up.
JP 2006-41385 A

In the above-described conventional constant voltage diode, the main junction portion reaches reach-through breakdown, but the breakdown voltage of the main junction portion varies greatly due to the variation in the thickness of the epi layer 102.
Further, since the bevel angle θm of the mesa groove portion M is negative (θm> 90 °), the withstand voltage VRBG of the mesa groove portion G is lower than the withstand voltage VRBA of the interface A between the epi layer 102 and the semiconductor layer 103.
Further, in the above-described conventional constant voltage diode, the design withstand voltage can be stably obtained by the variation in the breakdown voltage of the main junction portion due to the thickness of the epi layer 102 and the variation in the breakdown voltage VRBG of the mesa groove portion G. There is no problem.
Further, when breakdown occurs first in the mesa groove portion G, a current due to breakdown flows only in the region of the mesa groove portion G, so that a large amount of current cannot be taken and the clamping voltage is not lowered. The circuit may not be adequately protected.

  The present invention has been made in view of such circumstances, and an object of the present invention is to provide a diode capable of stabilizing a breakdown voltage and maintaining a clamping voltage low.

The diode of the present invention is a mesa-type diode, and is provided with a first conductive type that is provided on one surface of the semiconductor substrate and forms a junction with the semiconductor substrate. A first semiconductor layer of the same conductivity type as the mold, a second semiconductor layer of a second conductivity type formed on a surface in a central region of the first semiconductor layer, opposite to the first conductivity type, and first Oite the surface of the semiconductor layer, the second is formed to surround the outer peripheral portion of the semiconductor layer, a second conductivity type, the second third impurity concentration lower than the semiconductor layer A diode formed on a side surface of the first semiconductor layer and the third semiconductor layer, wherein the third semiconductor layer is thicker than the second semiconductor layer. Mesa groove to be separated, and interface between the first semiconductor layer and the third semiconductor layer Is a second bevel angle formed between the interface between the first semiconductor layer and the second semiconductor layer and the interface between the first semiconductor layer and the third semiconductor layer. and wherein the Okiiko.

  The diode of the present invention is characterized in that the thickness of the first semiconductor layer below the interface between the first semiconductor layer and the second semiconductor layer is thicker than the thickness of the depletion layer when the diode avalanche breakdown occurs. To do.

  The diode of the present invention is characterized in that the impurity concentration of the first semiconductor layer is lower than the impurity concentration of the semiconductor substrate.

As described above, according to the present invention, breakdown occurs at the interface between the first semiconductor layer and the second semiconductor layer. things Ku generating a breakdown in part), the breakdown voltage is stabilized, and since the current flows by an average surrendered to the central portion of the constant voltage diode viewed in plan view, take much amount of current can, it is possible to a clamping voltage low Ku, it is possible to sufficiently protect the circuit.

Hereinafter, a constant voltage diode (zener diode) according to an embodiment of the present invention will be described with reference to the drawings. FIG. 1 is a conceptual diagram showing a cross-sectional structure of a constant voltage diode in the present embodiment.
In this figure, a first semiconductor layer 2 having the same conductivity type as that of the semiconductor substrate 1 and having an impurity concentration lower than that of the semiconductor substrate 1 is formed as an epitaxial layer above (upper surface) of the n-type semiconductor substrate 1 (cathode side). Is formed.
On the first semiconductor layer 2, a P-type second semiconductor layer 3 (anode side) different in conductivity type from the semiconductor substrate 1 and the first semiconductor layer 2 (cathode side) is formed.

Further, the first semiconductor layer 2 has the same conductivity type as the second semiconductor layer 3 so as to surround the outer periphery of the second semiconductor layer 3, and has an impurity concentration higher than that of the second semiconductor layer 3. A fourth semiconductor layer 4 having a low height is formed.
Here, the third semiconductor layer 4 is formed thicker than the second semiconductor layer 3. That is, the thickness of the first semiconductor layer 2 directly below the third semiconductor layer 4 in plan view is equal to the thickness of the first semiconductor layer 2 directly below the second semiconductor layer 3 in plan view. In comparison, it is formed thinner.

The relationship between the impurity ( n-type ) concentration in the semiconductor substrate 1 and the first semiconductor layer 2 is such that the impurity concentration in the first semiconductor layer 2 <the impurity concentration in the semiconductor substrate 1.
The relationship between the impurity ( p-type ) concentration in the second semiconductor layer 3 and the third semiconductor layer 4 is the relationship of impurity concentration in the third semiconductor layer 4 <impurity concentration in the second semiconductor layer 3. ing.
At the lateral end (side portion) of the constant voltage diode in FIG. 1, the connection portion (interface) between the first semiconductor layer 2 and the third semiconductor layer 4 is at a position Q on the side wall 100 of the mesa groove 50. It is terminated.
An insulating protective film (glass, oxide film, nitride film, etc.) 200 such as an oxide film is formed on the side wall 100 of the mesa groove 50.
Although not shown, electrodes are respectively formed on the lower surface of the semiconductor substrate 1 and the upper surface of the second semiconductor layer 3.

The junction between the first semiconductor layer 2 and the second semiconductor layer 3 is a first main junction 5, and the junction between the first semiconductor layer 2 and the third semiconductor layer 4 is a junction 6. Then, the first main joint portion 5 is surrounded by the joint portion 6 in plan view.
Further, as described in the prior art, the first bevel angle θm is an angle between the junction 6 and the side of the first semiconductor layer 2, that is, the mesa in the junction 6 and the first semiconductor layer 2. The angle between the side wall 100 of the groove 50 and the first semiconductor layer 2 is defined.
The second bevel angle θi is an angle formed by the first main junction 5 and the junction of the first semiconductor layer 2 and the third semiconductor layer 4 in the first semiconductor layer 2. .

Here, the boundary surface of the depletion layer is formed perpendicular to the surface of the semiconductor layer or a junction of different semiconductor layers.
For this reason, as shown in FIG. 2, the distance between the position Q of the junction 6 that terminates at the side wall 100 of the mesa groove 50 and the position P at the boundary surface of the depletion layer that terminates at the surface of the side wall 100 of the mesa groove 50. That is, the thickness of the depletion layer along the side wall 100 of the mesa groove 50 is shorter than the thickness up to the boundary surface of the depletion layer in the direction perpendicular to the junction 6. That is, as the thickness at the side portion of the constant voltage semiconductor is reduced, the electric field concentrates in the region in the first semiconductor layer 2 in the mesa groove portion G, and breakdown occurs, so that the breakdown voltage at the junction 6 is reduced. Resulting in.
For the above-described reason, when the first bevel angle θm is negative (θm> 90 °), the reverse bias of the constant voltage diode is compared with the case where the first bevel angle θm is positive (θm <90). The pressure resistance against is reduced.

For this reason, it is conceivable to form the constant voltage diode so that the first bevel angle θm is positive.
However, as shown in FIG. 3, the method of manufacturing the constant voltage diode is such that a plurality of constant voltage diode regions D are formed on the wafer and the constant voltage diode regions D are separated so that the constant voltage diode regions D are separated. An insulating protective film 200 such as an oxide film is formed on the side wall 100 of the mesa groove in order to form a mesa groove 50 in the portion and protect the junction between the first semiconductor layer 2 and the third semiconductor layer 4. .
Then, the wafer is cut by an arrow C, and each constant voltage diode region D is separated to form a constant voltage diode. The manufacturing cost of the constant voltage diode is reduced by the simple manufacturing method described above. Because of this manufacturing method, the bevel angle θm is formed as negative.
Accordingly, in order to make the first bevel angle θm positive, an additional process is required, and the manufacturing cost increases.

Therefore, in the present embodiment, as described above, the third main semiconductor layer 4 is provided in the outer peripheral portion of the second semiconductor layer 3 as the guard ring, so that the first main junction 5 in addition to the junction 6 is provided. Is forming. A second bevel angle θi formed by the surface of the first main junction 5 and the surfaces of the junctions of the first semiconductor layer 2 and the third semiconductor layer 4 is formed.
By forming the bevel angle θi to be smaller than the bevel angle θm, the withstand voltage against the reverse bias of the constant voltage diode can be stabilized for the following reason.

The reason why the breakdown voltage becomes unstable is that the angle of the side wall 100 of the mesa groove 50 in the manufacture of the mesa groove 50 varies, so that the thickness of the depletion layer formed along the side wall 100 varies, and as a result, the mesa groove The high breakdown voltage in the portion G varies from device to device.
For this reason, electric field concentration is caused in the first main junction 5 which is an interface between the second semiconductor layer 3 having a higher impurity concentration than the third semiconductor layer 4 and the first semiconductor layer 2. By dispersing the electric field concentration, the unipolar concentration of the electric field concentration in the mesa groove portion G is prevented and the electric field concentration in the mesa groove portion G is relaxed.

  Furthermore, the thickness of the first semiconductor layer 2 at the junction 6 is reduced in order to form the region F having the second bevel angle θi, but the impurity concentration of the third semiconductor layer 4 is reduced to the second level. By making it lower than the impurity concentration of the semiconductor layer 3, the depletion layer also extends in the third semiconductor layer 4, so that the electric field in the depletion layer is reduced and the breakdown voltage of the region G is improved. Further, by reducing the impurity concentration of the third semiconductor layer 4, the thickness of the depletion layer extending in the first semiconductor layer 2 at the junction 6 is relatively reduced, and breakdown at the side of the constant voltage diode is achieved. Since the high breakdown voltage breakdown is caused in the first main junction 5 before the breakdown, the depletion layer does not cause the breakdown due to the reach-through contacting the semiconductor substrate 1, so that only the side of the constant voltage diode Therefore, the breakdown current does not flow and the clamping voltage is not increased.

That is, in the present embodiment, the first semiconductor layer 2 in the first main junction 5 and the first semiconductor layer 2 are generated so that the high breakdown voltage of the first main junction 5 is generated at a lower voltage than the breakdown in the junction 6. The impurity concentration of the second semiconductor layer 3 is determined.
Then, since the impurity concentration of the first semiconductor layer 2 is set in the above process, the impurity concentration and thickness of the third semiconductor layer 4 are determined according to the high breakdown voltage first in the first main junction 5. Must be set to happen.
Here, at a voltage at which a high breakdown voltage occurs at the first main junction 5, the impurity concentration of the third semiconductor layer 4 and the thickness of the first semiconductor layer 2 at the junction 6 are as follows. This means that the depletion layer in one semiconductor layer 2 needs to be set to a numerical value that does not reach the semiconductor substrate 1.

Therefore, the thickness of the first semiconductor layer 2 and the impurity concentration of the third semiconductor layer 4 in the junction 6 need to satisfy the following expressions.
d> (Na / Nb) {2ε · (Na + Nb) · (Vd + V) / (e · (Na · Nb))}
The left side d is the thickness of the first semiconductor layer 2 in the junction 6, and the right side shows the distance of the depletion layer extending in the first semiconductor layer 2, where Na is the third semiconductor layer. 4, Nb is the impurity concentration of the first semiconductor layer 2, ε is the dielectric constant of the semiconductor, e is the charge amount, V is the reverse voltage, and Vd is the diffusion potential.

Further, in order to stabilize the high breakdown voltage voltage as the Zener constant voltage diode by causing a high breakdown voltage breakdown in the first main junction 5, the second bevel angle θi in the region F is the first bevel angle. It is formed so as to be smaller than θm, and the electric field in the region F is relaxed. Here, the region F is a region inside the third semiconductor layer 4 where the second bevel angle θi is formed.
With this structure, electric field concentration does not occur only in the region G, and electric field concentration is shared by the first main junction surface 5 where the first semiconductor layer 2 and the second semiconductor layer 3 are joined, and Since the high breakdown voltage breakdown is caused in the main junction 5 of one, the high breakdown voltage can be controlled by the impurity concentration of the first semiconductor layer 2 and the second semiconductor layer 3 and stable. High breakdown voltage can be obtained.

That is, in the above-described configuration, the thicknesses of the first semiconductor layer 2 and the third semiconductor layer 4 in the junction 6 are adjusted together with the adjustment of the impurity concentration of the first semiconductor layer 2 and the third semiconductor layer 4. It is necessary to adjust the thickness so that the depletion layer is sufficiently extended at a voltage at which a high breakdown voltage breakdown occurs at the main junction portion 1. Here, in the first main junction 1, since the impurity concentration of the first semiconductor layer 2 is determined by the setting in the junction 6, a high breakdown voltage is obtained depending on the amount of impurity concentration in the second semiconductor layer 3. The breakdown voltage is set arbitrarily.
With this arbitrarily set voltage, the impurity concentration and thickness of the third semiconductor layer 4 and the thickness of the first semiconductor layer 2 at the junction 6 are set.
According to the above-described configuration, it is possible to suppress variations in breakdown voltage at the first main joint portion 5.

As described above, as shown in FIG. 2, the impurity concentration of the third semiconductor layer 4 is set lower than the impurity concentration of the second semiconductor layer 3, and the first semiconductor layer 4 has a first impurity concentration. Similar to the semiconductor layer 2, the depletion layer extends.
For this reason, the extension of the depletion layer in the first semiconductor layer 2 in the junction 6 is reduced, that is, the length extending in the direction of the semiconductor substrate 1 (lower direction) is the first semiconductor in the first main junction 5. The length of the first main junction 5 is reduced before the depletion layer comes into contact with the semiconductor substrate 1.

  Accordingly, breakdown due to reach-through due to the contact of the depletion layer of the first semiconductor layer 2 with the semiconductor substrate 1 does not occur at the junction 6, and the voltage due to lightning strikes abruptly changes, causing the high voltage to become noise. Even if it is input, since the high breakdown voltage breakdown occurs at the first main junction 5, the current flows through a wide area compared to the conventional example in which the breakdown current flows only at the end of the constant voltage diode, so the current density is The clamping voltage can be reduced, and the circuit to be protected can be protected with a preset voltage.

It is a conceptual diagram which shows the cross-section of the constant voltage diode by one Embodiment of this invention. It is a conceptual diagram which shows the formation state of the depletion layer at the time of reverse bias in the constant voltage diode in FIG. It is a conceptual diagram explaining the manufacturing method of the constant voltage diode of FIG. It is a conceptual diagram which shows the cross-section of the conventional constant voltage diode.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 ... Semiconductor substrate 2 ... 1st semiconductor layer 3 ... 2nd semiconductor layer 4 ... 3rd semiconductor layer 5 ... 1st main junction part 6 ... Junction part 50 ... Mesa groove 100 ... Side wall 200 ... Protection film (theta) m ... First bevel angle θi ... Second bevel angle

Claims (3)

A mesa diode,
A semiconductor substrate having a first conductivity type;
A first semiconductor layer of the same conductivity type as the first conductivity type provided on one surface of the semiconductor substrate and forming a junction with the semiconductor substrate;
A second semiconductor layer of a second conductivity type formed on a surface in a central region of the first semiconductor layer and opposite to the first conductivity type;
Oite the surface of the first semiconductor layer, the second is formed to surround the outer peripheral portion of the semiconductor layer, wherein a second conductivity type, the impurity concentration lower than said second semiconductor layer 3 semiconductor layers,
A mesa groove for separating the diode formed on a side surface of the first semiconductor layer and the third semiconductor layer, wherein the third semiconductor layer is formed thicker than the second semiconductor layer; A first bevel angle formed between an interface between the first semiconductor layer and the third semiconductor layer is defined as an interface between the first semiconductor layer and the second semiconductor layer, the first semiconductor layer, and the third semiconductor layer; diode, wherein the Okiiko than bevel angle second formed by the interface of the semiconductor layer. According to claim 1, the thickness of the first semiconductor layer under the interface of the first semiconductor layer and the second semiconductor layer, and wherein the greater than the thickness of a depletion layer at the time of avalanche breakdown of the diode Diodes. The impurity concentration of the first semiconductor layer, according to claim 1 or diode of claim 2, wherein the lower than the impurity concentration of the semiconductor substrate.

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