JPS58206174A - Mesa type semiconductor device and manufacture thereof - Google Patents

Abstract

PURPOSE:To enhance the withstand voltage and to reduce the leakage current of the device by a method wherein depth of a p-n junction face from the surface of a substrate is formed much more deeper at the neighborhoods of the sides of the substrate. CONSTITUTION:Depth of the p-n junction face 1 is formed as to be much more deeper at the parts nearby the sides 3 of the substrate, and the sides 3 of the substrate are coated with protective films of resin, glass, etc. As the manufacturing method, P is diffused from the back 12 of the n type substrate at first to form an n<+> type region 13. Then B is diffused to the whoe face of the surface 11, and Ga or Al having the diffusion coefficient larger than B is diffused doubly in succession in the neighborhoods of the boundary lines 14 between the parts to be isolated. The maximum electric field intensity in the neighborhood of the side is smaller than that at the center, and the withstand voltage is enhanced. Moreover the surface leakage current to be generated according to inversion or depletion of the p type region can be suppressed small according to elongation of the path of the leakage current of the surface, and moreover according to increase of impurity concentration.

Description

[Detailed Description of the Invention] [Technical Field of the Invention] The present invention provides a method in which a pn junction surface is formed substantially parallel to a substrate surface,
[Technical background of the invention and its problems] Regarding a mesa-type semiconductor device in which the pn junction surface is exposed at the wound surface of the substrate and its manufacturing method [Technical background of the invention and its problems] A conventional mesa-type semiconductor device is shown in FIGS. show.

The pnn junction surface is formed parallel to the substrate surface 2, and its end is exposed on the substrate side surface 3. Therefore, in contrast to the conventional method, which has a problem of inferior reliability and lifespan, the substrate side surface J is They were protected by coating them with a protective film made of resin or glass, or they were made into an inverted trapezoid as shown in Figure 1 (1) to make them resistant to deterioration.

However, since the protective film is not a resin, it is difficult for depletion to occur in the n-type region near the surface due to charges caused by impurities in the glass (e.g., sodium ions) and contaminants that enter from the outside during use. Since depletion is likely to occur in the p-type region, leakage current increases and breakdown voltage deteriorates. Is it technically difficult to make a Manomesa-type semiconductor device into an inverted trapezoid? However, there was a problem that the chips could not be used efficiently.

[Purpose of the invention]

The present invention has been developed in consideration of the above circumstances.

SUMMARY OF THE INVENTION In order to achieve this object, a mesa semiconductor device according to the present invention has a pn The depth of the bonding surface from the substrate surface is made deeper in the vicinity of the substrate; It is characterized by heavy tar diffusion.

[Embodiments of the invention]

FIG. 2 shows a mesa-type semiconductor device according to an embodiment of the present invention. Depth of pn junction surface/substrate: ll1 plane, ? The substrate-1 side 3 is covered with resin,
Coat with a protective film such as glass.

A method for manufacturing such a mesa-type semiconductor device is shown in FIG.
Shown in l, (b) and (c). First, phosphorus (P) is diffused from the back side of an n-type substrate to form an n+ region 13 (FIG. 3(a)). Next, boron (B) is diffused over the entire surface /l, and then aluminum (Ga) or aluminum (i') '), which has a larger diffusion coefficient than boron (B), is
A1) is double diffused near the boundary mttt to be separated (
Figure 3 ('b)). Next, after electrodes are attached to this, the dicing element is separated by etching to obtain the desired mesa-type semiconductor element (FIG. 3(C)). For example, pressure resistance 1000
When making a diode of V, the thickness of the substrate is 2. TOμm
Using an n-type substrate with an impurity concentration of /×10 m , phosphorus (
P) has a surface density of 2 to 6 x 7020 cm from the back/co.
” to a depth of goμm to form an n region 13,
Boron (B) is 30αm at surface concentration/×1Otyn
, and gallium (Ga) is formed at a surface concentration J
/J'tM' to a depth of 35 μm.

In the mesa type semiconductor device # according to this embodiment, the electric field strength near the p-plane can be made smaller than the electric field strength inside. this thing? This will be explained using Figure ≠ and Figure J. Figure ≠ (a
) and Figure 5(a) are the center 2 of the mesa-shaped half-Chinese body.
This shows the internal impurity concentration near the μ side. Near the side surfaces, the impurity concentration curve has two stages due to double diffusion. The electric field strength E when a voltage is applied to this mesa-type semiconductor device is shown in Fig. 5 (b) and Fig. 5 ('b), and the maximum electric field strength 1! ! A is smaller than t large electric field strength at the center,
It can be seen that the breakdown voltage is high.In the above-mentioned specific example, the central depletion layer thickness W/a is approximately 1. ttm, w2a
is approximately //j Atn, and the depletion layer thickness w71) near the 'ti11 plane is approximately i0 μm.

W2b is 10 gμm, which is slightly thicker in the P type region. Therefore, the maximum electric field strength near the side surface is improved by approximately
According to the present example y#4, surface leakage current due to inversion or depletion of the P-type region can be suppressed to a small level by increasing the path of the leakage current and increasing the impurity concentration.

Furthermore, according to the manufacturing method according to this embodiment, a mesa-type semiconductor device with high I-breakdown voltage and high reliability can be easily manufactured by adding one diffusion process.

Although diodes have been described in the above embodiments, the same applies to mesa-type semiconductor devices such as transistors other than diodes.

Further, as for the impurity in double diffusion, it is desirable that the diffusion coefficient of the second impurity is larger than the diffusion coefficient of the first impurity as in the above-mentioned embodiment, but the same impurity may be used, and the diffusion coefficient of the second impurity is larger than that of the first impurity. [Effects of the Invention] As described above, according to the present invention, a mesa-type semiconductor device with high breakdown voltage and small leakage current can be realized, and such a highly reliable mesa-type semiconductor device can be realized. # can be easily manufactured.

[Brief explanation of the drawing]

The 1st stage (al, 1b, l base j2) is a light map of a conventional mesa type system, respectively. 2', -2'l is a mesa type semiconducting arrow according to an embodiment of Mikkyo Ming. Ryu's analytical drawing, No. 37(al, !'l)l, jCl are construction drawings showing a manufacturing method of a mesa-type semiconductor device according to an embodiment of the present invention.Tower≠Fig!al, fl ) is a graph showing impurity degree 2 and electric field strength at the center of the same device, and FIGS.
FIG. /-pn junction surface 2...Substrate surface, 3...Closing plate side surface. ≠・Protective film, //・・Top surface of substrate, /−・−・Back surface of substrate,
/J・n+territory area lda boundary line. Distributor agent Nagisa Mikiyo Figure 3 (0) Kayu J lff1 (C) Toki 4 Figure

Claims (1)

[Claims] / A mesa-type semiconductor device in which a pn junction surface is formed substantially parallel to a substrate surface, and the pn junction surface is exposed at a side surface of the substrate. The depth of the pn junction surface from the surface of the substrate is -
A mesa-type semiconductor device characterized by being formed deeper near one surface. A method for manufacturing a mesa-type semiconductor device, in which undeliverables are diffused on a surface of a substrate and separated at a separation boundary line on the substrate surface. 27) A method for manufacturing a mesa-type semiconductor device in which impurities are dispersed in a predetermined f''L annihilation region near the separation boundary line on the substrate surface. In the method described in Item 2 of Range No. 2. The diffusion coefficient i1 nj of the second impurity is greater than the diffusion coefficient of the first impurity.