JPS607763A - Semiconductor device - Google Patents

Abstract

PURPOSE:To improve a static dielectric breakdown function of a protecting diode by a method wherein, when the protecting diode with input and output terminals is connected to an IC containing an MOS transistor, the 1st conductive type semiconductor domains composing the protecting diode are formed on both sides of the 2nd conductive type domain. CONSTITUTION:A P<-> type well domain 2 is formed in a surface layer of an N<-> type semiconductor substrate 1 by diffusion and N<+> type domains 3 and 13 facing each other are formed in the domain 2 by diffusion. Then an annular P<+> type domain 4 surrounding the domains 3 and 13 is formed and the periphery of the domain 4 is surrounded by an N<+> type domain 5 and N<+> type domains are formed in the domain 5 by diffusion. Then the whole surface is covered with an insulating film and apertures are drilled. Al electrodes 7 connected to the domains 3 and 13 are extended onto the insulating film and connected to the domains 6 and an input terminal 11 and an output terminal 12 are drawn out from the domains 6. An Al source line 10 contacting the domain 2 is provided to the side facing them. With this constitution, a surge pulse applied to the terminal is absorbed by a transistor operation of the protecting diode.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a semiconductor device, and more particularly to an electrostatic breakdown prevention structure in an integrated circuit device having a MOS (metal oxide semiconductor) type transistor.

MOS type integrated circuit devices are generally susceptible to gate film breakdown due to static electricity. As the degree of integration has increased in recent years, the channel length of transistor elements has become shorter and the gate film thickness has become thinner, and the role of electrostatic damage prevention means has become even more important. Conventionally, static electricity I11! ! Various methods have been considered to prevent damage, but no means have been considered to prevent damage between input and output terminals.

In addition, Noyoshiki's concept of conventional electrostatic damage prevention means is based on P
-N protection diode junction is played and down to release the surge charge, zero static electricity intensity is determined by the current capacity of the diode junction, and if a surge exceeding the current capacity is applied, Destruction of the diode itself often occurred.

SUMMARY OF THE INVENTION An object of the present invention is to provide a semiconductor device that is equipped with strong destruction prevention means not only against power supply terminals but also against damage caused by static air between input and output terminals, applied surge charges, etc. .

The present invention provides a semiconductor device characterized in that semiconductor regions of a first conductivity type, each forming a protection diode for two input/output terminals, are formed on both sides of a semiconductor region of a second conductivity type. be.

Next, the present invention will be explained in detail using the drawings.

FIGS. 1 and 2 are a plan view and a sectional view taken along the line AA', respectively, illustrating a conventional complementary MO8 integrated circuit device. In these figures, N-semiconductor substrate 1 has P''' L
A P+ doped layer 4 is provided on the surface of this P-well 2.
, and at the same time, a P doped layer 6 is provided on the N − semiconductor substrate 1 . Then, Nl dose layers 3 and 5 are provided in the P-well 2 and around the doped layers 4 and 6. P+
The doped layer 4 is connected to a negative power source -Vss, and the Nl doped layer 4 is connected to a ground power source VDD. Also, N
The doped layer 3 and the P+ doped layer 6 are electrically connected to each other by an aluminum electrode 7 that crosses over the oxide film 8.

Now, the adjacent input/output terminal 1 with this electrostatic damage prevention means
When large pulses 1 and 12 are applied tl, they flow along the snowfield path 15 indicated by the arrow in FIG. 1, and the surge charges are absorbed. However, there is still a drawback that if a surge exceeding the current capacity of the diode junction is applied, the diode itself will be permanently destroyed.

However, the present invention eliminates these drawbacks,
It absorbs surge pulses applied to adjacent input/output terminals through transistor operation, and is equipped with an even stronger means for preventing damage caused by static electricity.

Figure 3 shows misfire 1! FIG. 4 is a plan view of the semiconductor device according to the embodiment of FIG. In this figure, the wooden body j W body 5 I'
I is provided with a P-well 2 on an N-semiconductor substrate 1;
) - input/output convergence touching 19°f in well 2: child 1],,
A protective diode 1'&JiS is provided on 12 (a doped layer 3 13 is provided), and a PI stand 14 is provided in the area where the topes 3 and 13 face each other. 7'12, this P-well 2 can be used as is for this P I = H4. Now, a surge pulse of +' is applied to the input/output terminal 11, and a surge pulse of II is applied to the input/output terminal 12. In this case, Nl-doped layer 3f; r: emitter, Nl-doped layer 3f;
:' 13=Lucta, P layer 147 base-based lateral NPN transistors are 4·p1′ and 9, P
- Since the well 2 is at the 70-ting potential, which is not supplied with the potential tl, it becomes a potential vF higher than the potential of the N+ dope j (43, and the emitter is 4. N'')'- doped layer 3 and the base PdI2. is forward biased. On the other hand,
Since the N-topped layer 13, which is the collector, and the P-topped layer 14, which is the base, are in a positive bias, this NPN transistor becomes conductive, and the applied surge? I - absorb. Conversely, when a surge pulse of "-1" is applied to the input/output terminal 11 and "+" is applied to the input/output terminal 12, the N-tope layer 3 collector.

The surge is absorbed by an NPN transistor having the N+ doped layer 13 as an emitter and the P layer 14 as a base.

In this way, the transistor operation absorbs surges, so that the conventional diode breakdown does not occur, and a semiconductor device that is highly resistant to electrostatic breakdown and is fully equipped with electrostatic breakdown prevention means can be obtained.

In the above embodiment description, the NP transistor is constructed with a protection diode formed on the P-well circle, but it is also possible to construct the transistor with a protection diode formed on the IN-half binary substrate. By forming a protection diode connected to two adjacent input/output terminals in one P-well circle, the chip size can be reduced. There is also. Incidentally, at 31371 in FIG. 1, a power source 10 necessary for obtaining a power source is formed and connected at the cylindrical membrane hole 9.

As described above, according to the present invention, the 7"L can be improved in detail without being destroyed by loading or loading, and the effect of a high-temperature structure can be obtained.

[Brief explanation of the drawing]

Fig. 1 shows the horizontal view of a semiconductor device having conventional layers (1, 2 and 1) and 10 steps to prevent destruction.
- Cross section 1 of line A', bump, and figure 3 are semi-iAi diagrams showing nine examples of semiconductor devices from Ming's book/I; I'm in agony. In the same figure, 1...
...N-type semiconductor substrate, 2...P-well, 3
゜13...V dopno F4.4.6...
・P todog layer, '5...N dope j so,
7...Kawa, Togoku A Reminium, 8...Oxidation, 9...Oxidation 4 friend part, 1o...Kawa, Power supply aluminum, 11, 12... ...Input/output terminal: child,
14...P-#'v, 15...'F
tf i lotus.

Claims (1)

[Claims] A semiconductor device characterized in that semiconductor regions of a first conductivity type forming protection diodes for two input/output terminals are formed on both sides of a semiconductor region of a second conductivity type.