JP5190283B2 - 半導体装置 - Google Patents
半導体装置 Download PDFInfo
- Publication number
- JP5190283B2 JP5190283B2 JP2008060357A JP2008060357A JP5190283B2 JP 5190283 B2 JP5190283 B2 JP 5190283B2 JP 2008060357 A JP2008060357 A JP 2008060357A JP 2008060357 A JP2008060357 A JP 2008060357A JP 5190283 B2 JP5190283 B2 JP 5190283B2
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- transistor
- voltage
- circuit
- signal
- gate
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- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2300/00—Aspects of the constitution of display devices
- G09G2300/04—Structural and physical details of display devices
- G09G2300/0404—Matrix technologies
- G09G2300/0408—Integration of the drivers onto the display substrate
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2300/00—Aspects of the constitution of display devices
- G09G2300/04—Structural and physical details of display devices
- G09G2300/0404—Matrix technologies
- G09G2300/0417—Special arrangements specific to the use of low carrier mobility technology
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2300/00—Aspects of the constitution of display devices
- G09G2300/04—Structural and physical details of display devices
- G09G2300/0421—Structural details of the set of electrodes
- G09G2300/0426—Layout of electrodes and connections
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2310/00—Command of the display device
- G09G2310/08—Details of timing specific for flat panels, other than clock recovery
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2330/00—Aspects of power supply; Aspects of display protection and defect management
- G09G2330/02—Details of power systems and of start or stop of display operation
- G09G2330/028—Generation of voltages supplied to electrode drivers in a matrix display other than LCD
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K50/00—Organic light-emitting devices
- H10K50/80—Constructional details
- H10K50/84—Passivation; Containers; Encapsulations
- H10K50/841—Self-supporting sealing arrangements
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/10—OLED displays
- H10K59/12—Active-matrix OLED [AMOLED] displays
- H10K59/131—Interconnections, e.g. wiring lines or terminals
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/80—Constructional details
- H10K59/87—Passivation; Containers; Encapsulations
- H10K59/871—Self-supporting sealing arrangements
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- Plasma & Fusion (AREA)
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
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- Control Of El Displays (AREA)
Description
YongSoon Lee、外6名、SID 06 DIGEST、16.2(p.1083−p.1086)(2006)
図1を用いて、本発明の表示装置の構成について説明する。図1(A)は本発明の表示装置のブロック図である。本発明の表示装置は、画素部100と、走査線駆動回路101と、電圧発生回路103とを有する。さらに本発明の表示装置は、信号線駆動回路を有していても良い。画素部100には複数の画素が設けられており、走査線駆動回路101によって該画素がラインごとに選択される。信号線駆動回路は、走査線駆動回路101によって選択されたラインの画素への、ビデオ信号の入力を制御する。
本実施の形態では、本発明の表示装置に用いられる電圧発生回路の具体的な構成について説明する。図2に示す電圧発生回路200は、判定回路201と、電圧設定回路220と、インピーダンス変換器207とを有している。さらに電圧設定回路220は、コントローラ202と、加算器203と、カウンタ204と、切替回路205と、デジタルアナログ(DA)変換回路206と、を有する。
本実施の形態では、本発明の表示装置に用いられる電圧発生回路の、実施の形態2とは異なる構成について説明する。図3に示す電圧発生回路300は、判定回路301と、電圧設定回路320と、インピーダンス変換器307とを有している。さらに電圧設定回路320は、コントローラ302と、加算器303と、カウンタ304と、デジタルアナログ(DA)変換回路306とを有する。
本実施の形態では、本発明の半導体装置が有する判定回路の、より詳しい構成とその動作について説明する。
本実施の形態では、本発明の半導体装置が有する走査線駆動回路の、より詳しい構成とその動作について説明する。
本実施の形態では、電圧発生回路及び走査線駆動回路を有する本発明の表示装置の、全体的な構成について説明する。図7に、本実施の形態の表示装置のブロック図を示す。図7に示す表示装置は、表示素子を備えた画素を複数有する画素部400と、各画素をラインごとに選択する走査線駆動回路410と、選択されたラインの画素へのビデオ信号の入力を制御する信号線駆動回路420と、電圧発生回路430とを有する。
101 走査線駆動回路
103 電圧発生回路
104 シフトレジスタ
105 出力回路
106 判定回路
107 電圧設定回路
108 トランジスタ
109 トランジスタ
200 電圧発生回路
201 判定回路
202 コントローラ
203 加算器
204 カウンタ
205 切替回路
206 DA変換回路
207 インピーダンス変換器
210 シフトレジスタ
211 出力回路
212 トランジスタ
220 電圧設定回路
300 電圧発生回路
301 判定回路
302 コントローラ
303 加算器
304 カウンタ
306 DA変換回路
307 インピーダンス変換器
310 シフトレジスタ
311 出力回路
312 トランジスタ
320 電圧設定回路
400 画素部
410 走査線駆動回路
411 シフトレジスタ
412 出力回路
420 信号線駆動回路
421 シフトレジスタ
422 ラッチ
423 ラッチ
430 電圧発生回路
440 基板
441 FPC
450 基板
451 FPC
460 基板
461 FPC
501 シフトレジスタ
502 ラッチ
503 ラッチ
504 レベルシフタ
505 バッファ
506 ディレイ型フリップフロップ(DFF)
507 記憶回路
508 記憶回路
601 画素部
602 画素
603 スイッチング用トランジスタ
604 駆動用トランジスタ
605 発光素子
606 保持容量
610 画素部
611 画素
612 トランジスタ
613 液晶セル
614 保持容量
700 基板
701 導電膜
703 ゲート絶縁膜
704 半導体膜
705 半導体膜
706 半導体膜
707 マスク
708 導電膜
709 マスク
710 配線
713 配線
714 絶縁膜
715 絶縁膜
716 絶縁膜
717 配線
718 陽極
719 隔壁
720 電界発光層
721 陰極
722 発光素子
800 判定回路
801 シフトレジスタ
802 出力回路
803 記憶回路
804 ExORゲート
805 スイッチング素子
806 スイッチング素子
807 インバータ
808 インバータ
809 インバータ
810 比較回路
811 記憶回路
900 パルス出力回路
910 走査方向切替回路
911 トランジスタ
912 トランジスタ
913 トランジスタ
914 トランジスタ
920 振幅補償回路
921 トランジスタ
922 トランジスタ
930 振幅補償回路
931 トランジスタ
932 トランジスタ
940 出力回路
941 トランジスタ
942 トランジスタ
2101 本体
2102 表示部
2103 音声入力部
2104 音声出力部
2105 操作キー
2401 筐体
2402 表示部
2403 スピーカー部
2601 本体
2602 表示部
2603 筐体
2604 外部接続ポート
2605 リモコン受信部
2606 受像部
2607 バッテリー
2608 音声入力部
2609 操作キー
2610 接眼部
3001 トランジスタ
3002 トランジスタ
4001 基板
4002 画素部
4003 信号線駆動回路
4004 走査線駆動回路
4005 電圧発生回路
4006 基板
4007 充填材
4008 トランジスタ
4009 駆動用トランジスタ
4010 スイッチング用トランジスタ
4011 発光素子
4012 対向電極
4013 電界発光層
4014 配線
4015 配線
4016 接続端子
4017 配線
4018 FPC
4019 異方性導電膜
4020 シール材
Claims (2)
- 第1の回路と、第2の回路と、第3の回路と、第4の回路と、第5の回路と、第6の回路と、第7の回路と、を有し、
前記第1の回路は、時間的に変化する第1の信号を出力することができる機能を有し、
前記第1の信号は、デジタル値を有し、
前記第2の回路は、前記第1の信号に従ってアナログ値である第1の電圧を出力することができる機能を有し、
前記第3の回路は、第1のトランジスタと、第2のトランジスタと、を有し、
前記第1のトランジスタのソース又はドレインの一方は、前記第2のトランジスタのソース又はドレインの一方と電気的に接続され、且つ第1の配線と電気的に接続され、
前記第1のトランジスタのソース又はドレインの他方は、第2の配線と電気的に接続され、
前記第2のトランジスタのソース又はドレインの他方は、第3の配線と電気的に接続され、
前記第2の配線は、第1の電位を供給することができる機能を有し、
前記第3の配線は、クロック信号を供給することができる機能を有し、
前記第1のトランジスタは、前記第2のトランジスタと同じ極性であり、
前記第7の回路は、前記第2のトランジスタのゲートに前記第1の電位又は第2の電位を供給することができる機能を有し、
前記第2の電位は、前記第1の電位よりも高い値を有し、
前記第3の回路は、前記第1のトランジスタのゲートに前記第1の電圧に応じた電圧を与えることで、前記第1の配線に第2の電圧を出力することができる機能を有し、
前記第4の回路は、前記第2の電圧が前記第1のトランジスタがオンであるときの値か否かを判断することができる機能を有し、
前記第5の回路は、前記第1のトランジスタがオンであるときの前記第1の電圧に第3の電圧を加算した電圧の情報を含む第2の信号を出力することができる機能を有し、
前記第2の信号は、デジタル値を有し、
前記第2の回路は、前記第2の信号に従ってアナログ値である第4の電圧を出力することができる機能を有し、
前記第3の回路は、前記第1のトランジスタのゲートに前記第4の電圧に応じた電圧を与えることができる機能を有し、
前記第6の回路は、前記第4の回路が前記第2の電圧が前記第1のトランジスタがオンであるときの値であると判断した場合、前記第2の回路への信号の出力を前記第1の信号から前記第2の信号に切り替えることができる機能を有することを特徴とする半導体装置。 - 請求項1において、
前記第1のトランジスタは、Nチャネル型であり、
前記第1の電圧は、低い値から高い値に変化することを特徴とする半導体装置。
Priority Applications (1)
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JP2008060357A JP5190283B2 (ja) | 2007-03-21 | 2008-03-11 | 半導体装置 |
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JP2008060357A JP5190283B2 (ja) | 2007-03-21 | 2008-03-11 | 半導体装置 |
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JP2008262178A JP2008262178A (ja) | 2008-10-30 |
JP2008262178A5 JP2008262178A5 (ja) | 2011-04-14 |
JP5190283B2 true JP5190283B2 (ja) | 2013-04-24 |
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US (1) | US8730220B2 (ja) |
JP (1) | JP5190283B2 (ja) |
KR (1) | KR101482536B1 (ja) |
TW (1) | TWI453711B (ja) |
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JP2010266490A (ja) * | 2009-05-12 | 2010-11-25 | Sony Corp | 表示装置 |
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- 2008-03-11 JP JP2008060357A patent/JP5190283B2/ja not_active Expired - Fee Related
- 2008-03-13 US US12/047,518 patent/US8730220B2/en not_active Expired - Fee Related
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KR20080086366A (ko) | 2008-09-25 |
US20080231617A1 (en) | 2008-09-25 |
TW200903412A (en) | 2009-01-16 |
TWI453711B (zh) | 2014-09-21 |
US8730220B2 (en) | 2014-05-20 |
JP2008262178A (ja) | 2008-10-30 |
KR101482536B1 (ko) | 2015-01-14 |
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