JP5109080B2 - 基準電圧回路 - Google Patents
基準電圧回路 Download PDFInfo
- Publication number
- JP5109080B2 JP5109080B2 JP2007542392A JP2007542392A JP5109080B2 JP 5109080 B2 JP5109080 B2 JP 5109080B2 JP 2007542392 A JP2007542392 A JP 2007542392A JP 2007542392 A JP2007542392 A JP 2007542392A JP 5109080 B2 JP5109080 B2 JP 5109080B2
- Authority
- JP
- Japan
- Prior art keywords
- reference voltage
- module
- electronic circuit
- tunable
- output
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Images
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C27/00—Electric analogue stores, e.g. for storing instantaneous values
- G11C27/005—Electric analogue stores, e.g. for storing instantaneous values with non-volatile charge storage, e.g. on floating gate or MNOS
Landscapes
- Semiconductor Integrated Circuits (AREA)
- Control Of Electrical Variables (AREA)
- Analogue/Digital Conversion (AREA)
- Oscillators With Electromechanical Resonators (AREA)
- Continuous-Control Power Sources That Use Transistors (AREA)
Description
102 較正モジュール
104 EEPROMモジュール
106 等価キャパシタ
108 スイッチ
110 スイッチ
112 可調式電流源
114 バツフア
116 比較器
118 高精度電圧源
120 導体
122 導体
200 基準電圧回路
202 較正モジュール
204 EPROMモジュール
206 等価キャパシタ
208 スイッチ
210 電圧源
212 チューニング可能な変換モジュール
214 演算増幅器
216 比較器
218 高精度電圧源
220 導体
222 導体
224 チューニング可能な抵抗器
226 チューニング可能な抵抗器
Claims (9)
- 基準電圧電子回路であって、
定電荷の不揮発性且つ変更不可記憶のためのフローティングゲートを備えた容量性素子を有し、
前記容量性素子に結合された入力を備えていて、前記定電荷に対応した定電圧をもたらすチューニング可能な変換モジュールを有し、前記変換モジュールは、出力基準電圧への前記定電圧のチューニング可能な変換を行い、
高精度基準電圧源を利用した外部較正モジュールによって前記変換モジュールをチューニングする制御ループを有することを特徴とする基準電圧電子回路。 - 前記チューニング可能な変換モジュールは、フィードバックループを形成する演算増幅器並びに少なくとも第1及び第2の抵抗器を有し、前記第1および/または前記第2の抵抗器の抵抗は、前記外部較正モジュールによってチューニング可能であることを特徴とする請求項1に記載の基準電圧電子回路。
- 前記容量性素子は、消去及びプログラム可能読み出し専用メモリ(EPROM)モジュールから成ることを特徴とする請求項1に記載の基準電圧電子回路。
- 前記第1および/または前記第2の抵抗器は各々、1組の抵抗器及び1組の金属酸化膜半導体型スイッチの回路から成り、前記第1および/または前記第2の抵抗器の抵抗は、前記1組の金属酸化膜半導体型スイッチの構成によって定められることを特徴とする請求項2に記載の基準電圧電子回路。
- 前記第1および/または前記第2の抵抗器の抵抗は、前記較正モジュールによって定められ、前記スイッチ構成は、EPROMモジュールによって記憶されることを特徴とする請求項4に記載の基準電圧電子回路。
- 基準電圧電子回路を較正する方法であって、
定電荷を電荷の不揮発性且つ変更不可記憶のためのフローティングゲートを備えた容量性素子によって蓄えるステップと、
前記定電荷に対応した定電圧をチューニング可能な変換モジュールの入力に与えるステップと、
前記定電圧を前記チューニング可能な変換モジュールによって出力基準電圧に変換するステップと、
前記変換モジュールを高精度基準電圧源を利用した外部較正モジュールからの制御信号の受信に応答してチューニングすることによって前記基準電圧電子回路を較正するステップとを有することを特徴とする方法。 - 請求項1〜5のうちいずれか一に記載の基準電圧電子回路を有するシステムであって、前記システムは、前記基準電圧電子回路と結合され、且つ、前記基準電圧電子回路を較正する較正モジュールを備え、
前記較正モジュールは、
高精度基準電圧源と、
前記基準電圧電子回路の出力と前記高精度基準電圧源の出力を比較するようにされた比較器モジュールとを有し、前記比較器モジュールは、前記基準電圧電子回路の前記チューニング可能な変換モジュールをチューニングするようになっていることを特徴とするシステム。 - 請求項1〜5のうちいずれか一に記載の基準電圧電子回路を利用した電圧調整器を有する電池式携帯型電子デバイス。
- 請求項1〜5のうちいずれか一に記載の基準電圧電子回路を有する携帯電話。
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
EP04105871.0 | 2004-11-18 | ||
EP04105871 | 2004-11-18 | ||
PCT/IB2005/053723 WO2006054217A2 (en) | 2004-11-18 | 2005-11-11 | Reference voltage circuit |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2008521235A JP2008521235A (ja) | 2008-06-19 |
JP5109080B2 true JP5109080B2 (ja) | 2012-12-26 |
Family
ID=36407514
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2007542392A Expired - Fee Related JP5109080B2 (ja) | 2004-11-18 | 2005-11-11 | 基準電圧回路 |
Country Status (7)
Country | Link |
---|---|
US (1) | US8125209B2 (ja) |
EP (1) | EP1815303B1 (ja) |
JP (1) | JP5109080B2 (ja) |
CN (1) | CN101061449B (ja) |
AT (1) | ATE420395T1 (ja) |
DE (1) | DE602005012310D1 (ja) |
WO (1) | WO2006054217A2 (ja) |
Families Citing this family (31)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8149048B1 (en) | 2000-10-26 | 2012-04-03 | Cypress Semiconductor Corporation | Apparatus and method for programmable power management in a programmable analog circuit block |
US6724220B1 (en) | 2000-10-26 | 2004-04-20 | Cyress Semiconductor Corporation | Programmable microcontroller architecture (mixed analog/digital) |
US8176296B2 (en) | 2000-10-26 | 2012-05-08 | Cypress Semiconductor Corporation | Programmable microcontroller architecture |
US8103496B1 (en) | 2000-10-26 | 2012-01-24 | Cypress Semicondutor Corporation | Breakpoint control in an in-circuit emulation system |
US8160864B1 (en) | 2000-10-26 | 2012-04-17 | Cypress Semiconductor Corporation | In-circuit emulator and pod synchronized boot |
US7406674B1 (en) | 2001-10-24 | 2008-07-29 | Cypress Semiconductor Corporation | Method and apparatus for generating microcontroller configuration information |
US8078970B1 (en) | 2001-11-09 | 2011-12-13 | Cypress Semiconductor Corporation | Graphical user interface with user-selectable list-box |
US8042093B1 (en) | 2001-11-15 | 2011-10-18 | Cypress Semiconductor Corporation | System providing automatic source code generation for personalization and parameterization of user modules |
US8069405B1 (en) | 2001-11-19 | 2011-11-29 | Cypress Semiconductor Corporation | User interface for efficiently browsing an electronic document using data-driven tabs |
US6971004B1 (en) | 2001-11-19 | 2005-11-29 | Cypress Semiconductor Corp. | System and method of dynamically reconfiguring a programmable integrated circuit |
US7844437B1 (en) | 2001-11-19 | 2010-11-30 | Cypress Semiconductor Corporation | System and method for performing next placements and pruning of disallowed placements for programming an integrated circuit |
US8103497B1 (en) | 2002-03-28 | 2012-01-24 | Cypress Semiconductor Corporation | External interface for event architecture |
US7295049B1 (en) | 2004-03-25 | 2007-11-13 | Cypress Semiconductor Corporation | Method and circuit for rapid alignment of signals |
US7332976B1 (en) * | 2005-02-04 | 2008-02-19 | Cypress Semiconductor Corporation | Poly-phase frequency synthesis oscillator |
US7400183B1 (en) | 2005-05-05 | 2008-07-15 | Cypress Semiconductor Corporation | Voltage controlled oscillator delay cell and method |
US8067948B2 (en) | 2006-03-27 | 2011-11-29 | Cypress Semiconductor Corporation | Input/output multiplexer bus |
WO2008131137A2 (en) * | 2007-04-17 | 2008-10-30 | Cypress Semiconductor Corporation | Programmable floating gate reference |
US8040266B2 (en) | 2007-04-17 | 2011-10-18 | Cypress Semiconductor Corporation | Programmable sigma-delta analog-to-digital converter |
US8130025B2 (en) | 2007-04-17 | 2012-03-06 | Cypress Semiconductor Corporation | Numerical band gap |
US8026739B2 (en) | 2007-04-17 | 2011-09-27 | Cypress Semiconductor Corporation | System level interconnect with programmable switching |
US9720805B1 (en) | 2007-04-25 | 2017-08-01 | Cypress Semiconductor Corporation | System and method for controlling a target device |
US8049569B1 (en) | 2007-09-05 | 2011-11-01 | Cypress Semiconductor Corporation | Circuit and method for improving the accuracy of a crystal-less oscillator having dual-frequency modes |
CN101515183B (zh) * | 2009-03-30 | 2012-11-21 | 艾默生网络能源有限公司 | 一种输出过压调节电路 |
CN102096383A (zh) * | 2010-12-28 | 2011-06-15 | 重庆长安汽车股份有限公司 | 一种高精度信号采样电路 |
FR3052271B1 (fr) * | 2016-06-06 | 2020-06-05 | STMicroelectronics (Alps) SAS | Dispositif d'asservissement de tension |
CN108508957A (zh) * | 2018-04-12 | 2018-09-07 | 淮安信息职业技术学院 | 一种低温度系数参考电压产生电路及检测装置 |
US10930339B1 (en) | 2019-09-30 | 2021-02-23 | International Business Machines Corporation | Voltage bitline high (VBLH) regulation for computer memory |
US10943647B1 (en) | 2019-09-30 | 2021-03-09 | International Business Machines Corporation | Bit-line mux driver with diode header for computer memory |
US10832756B1 (en) | 2019-09-30 | 2020-11-10 | International Business Machines Corporation | Negative voltage generation for computer memory |
GB2591297B (en) * | 2020-01-27 | 2022-06-08 | Thermo Fisher Scient Bremen Gmbh | Voltage supply |
CN114967813A (zh) * | 2022-06-30 | 2022-08-30 | 珠海泰芯半导体有限公司 | 基准电压的校准方法、装置及存储介质 |
Family Cites Families (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0274067A (ja) * | 1988-09-09 | 1990-03-14 | Nec Kyushu Ltd | 半導体装置 |
JPH05315870A (ja) * | 1992-05-07 | 1993-11-26 | Mitsubishi Electric Corp | 情報処理装置 |
JP3185698B2 (ja) * | 1997-02-20 | 2001-07-11 | 日本電気株式会社 | 基準電圧発生回路 |
JP3278765B2 (ja) * | 1997-11-17 | 2002-04-30 | 日本電気株式会社 | 負電圧生成回路 |
JP2000150799A (ja) * | 1998-11-17 | 2000-05-30 | Matsushita Electric Ind Co Ltd | 半導体集積回路装置 |
KR100301817B1 (ko) * | 1999-06-29 | 2001-11-01 | 김영환 | 레퍼런스 메모리셀의 초기화 회로 및 그를 이용한 초기화 방법 |
JP2002368107A (ja) * | 2001-06-07 | 2002-12-20 | Ricoh Co Ltd | 基準電圧発生回路とそれを用いた電源装置 |
US6898123B2 (en) * | 2003-01-07 | 2005-05-24 | Intersil Americas Inc. | Differential dual floating gate circuit and method for programming |
US6829164B2 (en) * | 2003-02-14 | 2004-12-07 | Xicor Corporation | Differential floating gate circuit and method for programming |
JP4643954B2 (ja) * | 2004-09-09 | 2011-03-02 | ルネサスエレクトロニクス株式会社 | 階調電圧生成回路及び階調電圧生成方法 |
-
2005
- 2005-11-11 US US11/719,743 patent/US8125209B2/en not_active Expired - Fee Related
- 2005-11-11 CN CN2005800391733A patent/CN101061449B/zh not_active Expired - Fee Related
- 2005-11-11 WO PCT/IB2005/053723 patent/WO2006054217A2/en active Application Filing
- 2005-11-11 DE DE602005012310T patent/DE602005012310D1/de active Active
- 2005-11-11 AT AT05802337T patent/ATE420395T1/de not_active IP Right Cessation
- 2005-11-11 EP EP05802337A patent/EP1815303B1/en not_active Not-in-force
- 2005-11-11 JP JP2007542392A patent/JP5109080B2/ja not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
EP1815303A2 (en) | 2007-08-08 |
US8125209B2 (en) | 2012-02-28 |
DE602005012310D1 (de) | 2009-02-26 |
EP1815303B1 (en) | 2009-01-07 |
WO2006054217A3 (en) | 2006-10-05 |
WO2006054217A2 (en) | 2006-05-26 |
JP2008521235A (ja) | 2008-06-19 |
ATE420395T1 (de) | 2009-01-15 |
CN101061449A (zh) | 2007-10-24 |
US20090322305A1 (en) | 2009-12-31 |
CN101061449B (zh) | 2010-08-11 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JP5109080B2 (ja) | 基準電圧回路 | |
KR101027304B1 (ko) | 저전압 cmos 밴드갭 레퍼런스 | |
US7332904B1 (en) | On-chip resistor calibration apparatus and method | |
US10190922B2 (en) | Method and apparatus for calibrating a sensor | |
US20030227756A1 (en) | Temperature characteristic compensation apparatus | |
US11221638B2 (en) | Offset corrected bandgap reference and temperature sensor | |
Serrano et al. | A precision low-TC wide-range CMOS current reference | |
CN113168200B (zh) | 利用修整调节的精确带隙参考 | |
KR101813833B1 (ko) | 크로스 포인트 메모리에 대한 고도 분산형 전류 기준들을 위한 저 전력, 고 정밀 전류 기준 | |
TWI571723B (zh) | 用於具有可編程溫度斜率之電流的電路 | |
US10367518B2 (en) | Apparatus and method for single temperature subthreshold factor trimming for hybrid thermal sensor | |
US20160126898A1 (en) | Apparatus and methods for reducing input bias current of an electronic circuit | |
US20110298642A1 (en) | Current trimming circuit and a/d converter including current trimming circuit | |
US7915950B2 (en) | Method and algorithm of high precision on-chip global biasing using integrated resistor calibration circuits | |
US6873143B2 (en) | On-chip reference current and voltage generating circuits | |
US9600014B2 (en) | Voltage reference circuit | |
US10296025B2 (en) | Apparatus for electric current measurement or calibration and associated methods | |
US7956588B2 (en) | Voltage regulator | |
US8013668B1 (en) | Bias current compensation device and method | |
US10720919B2 (en) | Apparatus and methods for reducing charge injection mismatch in electronic circuits | |
CN112835409B (zh) | 带隙基准电压生成电路 | |
CN111751693A (zh) | 一种检测双极型晶体管电流放大倍数的方法和电路 | |
JP2000089843A (ja) | 基準電圧源用半導体装置 | |
EP1271549A1 (en) | Eeprom circuit, voltage reference circuit and method for providing a low temperature-coefficient voltage reference | |
US12007358B2 (en) | Potentiostat with offset calibration |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A711 | Notification of change in applicant |
Free format text: JAPANESE INTERMEDIATE CODE: A711 Effective date: 20080626 |
|
A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20081110 |
|
A977 | Report on retrieval |
Free format text: JAPANESE INTERMEDIATE CODE: A971007 Effective date: 20120215 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20120217 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20120425 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20120525 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20120713 |
|
TRDD | Decision of grant or rejection written | ||
A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20120817 |
|
A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 |
|
A711 | Notification of change in applicant |
Free format text: JAPANESE INTERMEDIATE CODE: A711 Effective date: 20120907 |
|
A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20120907 |
|
FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20151019 Year of fee payment: 3 |
|
R150 | Certificate of patent or registration of utility model |
Ref document number: 5109080 Country of ref document: JP Free format text: JAPANESE INTERMEDIATE CODE: R150 Free format text: JAPANESE INTERMEDIATE CODE: R150 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
LAPS | Cancellation because of no payment of annual fees |