JP5094756B2 - Semiconductor device manufacturing method and semiconductor package deformation correcting device used therefor - Google Patents

Description

  The present invention relates to a method and apparatus for manufacturing a semiconductor device, and more particularly, to a semiconductor package of a type in which a semiconductor element and a bonding wire portion are sealed with a resin and a conductor portion such as an external terminal or die pad on the back surface of the semiconductor package is separated from a lead frame by re-etching. It relates to deformation correction technology.

  In an ordinary resin-encapsulated semiconductor device, a semiconductor element is mounted at the center of a lead frame, and a bonding pad of the semiconductor element and an internal lead of the lead frame are connected by a bonding wire such as a gold wire and then resin-sealed. . After this resin sealing step, heat aging (mold cure) is performed to accelerate and complete the curing of the resin, then the external leads are plated, and the external leads are cut into a predetermined shape and bent into a product.

When the resin is cured in this process, the semiconductor package is deformed due to a difference in the constituent material of the semiconductor package, a curing shrinkage of the resin, a difference in thickness of the package, and the like.
This deformation causes jamming in the cutting / molding process of the external lead in the next process, leading to a decrease in yield, and also causes a soldering failure when the semiconductor device is mounted on the printed board.

  In order to solve this problem, Patent Document 1 discloses that semiconductor packages in which semiconductor elements are sealed with resin and metal flat plates (insertion plates) are alternately stacked and housed in a cylindrical metal container. A method is disclosed in which a semiconductor package is heated to a temperature exceeding the glass transition temperature with a heat-resistant weight placed on the uppermost stack of interposing plates, and then slowly cooled to correct deformation in the semiconductor package. ing.

  On the other hand, the structure of the semiconductor device package is QFP (Quad Flat Package) in which external input / output pins are arranged on four sides, and QFN (Quad Flat Non-leaded Package) in which external input / output pins are not exposed to the outside. There are types such as BGA (Ball Grid Array) and LGA (Land Grid Array) in which pads for external input / output are arranged on the bottom surface of the package. The pin arrangement is limited, and the latter two are suitable for higher integration and other pin arrangements, but have the conflicting problem of increased manufacturing costs.

  As a structure of a semiconductor device capable of meeting the needs for high integration of semiconductors and a multi-pin arrangement in recent years and reducing the manufacturing cost, there is one described in Patent Document 2. As shown in FIG. 5 (E), a semiconductor element 51 is arranged at the center, an area array is formed around the semiconductor element 51, the surface side is a wire bonding part 52, and the back side is an external connection terminal part 53. A certain conductor terminal 54 is arranged, the wire bonding portion 52 and each electrode pad of the semiconductor element 51 are electrically connected by a bonding wire 56, and the semiconductor element 51, the bonding wire 52, and the surface half of the conductor terminal 54 are encapsulating resin. The semiconductor device 50 is sealed with a resin 58.

This semiconductor device manufacturing method includes the following steps.
As shown in FIG. 5A, a wire bonding portion 52 formed on the surface side of the plate-like lead frame material 61 so as to surround the semiconductor element 51 to be mounted in the center, and corresponds to the wire bonding portion 52. Then, the gold plating layers 62 and 63 are formed on the front and back surfaces of the external connection terminal portion 53 formed on the back surface side and the lead frame to be formed in the semiconductor element mounting portion 50 (first step).

  Next, as shown in FIG. 5B, after forming an etching resistant resist film 64 on the back surface side of the lead frame material 61, the lead frame is formed from the front surface side using the gold plating layer 62 formed on the front surface side as a resist mask. Etching (half etching) is performed on the material 61 at a predetermined depth. Thereby, the semiconductor element mounting part 50 and the wire bonding part 52 are protruded (second step).

  Then, as shown in FIG. 5C, after the semiconductor element 51 is mounted on the surface side center of the half-etched lead frame material 61 via an adhesive made of silver / epoxy resin, the electrode of the semiconductor element 51 The pad portions 55 and the corresponding wire bonding portions 52 are connected by bonding wires 56 to form an electrical conduction circuit (third step).

  Thereafter, as shown in FIG. 5D, the surface side of the lead frame material 61 including the semiconductor element 51 and the bonding wire 56 is resin-sealed with a sealing resin 58 (fourth step).

  After the above processing is completed, the etching resistant resist film 64 adhered to the back side of the lead frame material 61 is removed. Furthermore, as shown in FIG. 5E, the external connection terminal portion 53 and the semiconductor element are re-etched on the back side of the lead frame material 61 using the gold plating layer 63 formed on the back side as a resist mask. The rear surface side of the mounting portion 50 is projected, and the adjacent external connection terminal portions 53 are electrically independent (fifth step). Thereafter, a dividing operation for dividing into pieces is performed, and an independent semiconductor device 50 is obtained.

  As described above, in this semiconductor device, stand-off (terminals held by the sealing resin and independent of the lead frame) can be formed by performing re-etching after resin sealing. By providing standoffs for the mounting terminals, high mountability and mounting reliability in the semiconductor device are ensured.

JP-A-9-17816 Japanese Patent No. 3947750

Also in the semiconductor device of the type described in the above-mentioned Patent Document 2 (hereinafter referred to as “hybrid type semiconductor device”), as in the case of a normal QFP type, QFN type, BGA type, and LGA type semiconductor device, resin sealing is performed. After the stop step (fourth step: see FIG. 5D), after the etching resistant resist film 64 is removed, mold curing is performed to accelerate and complete the curing of the resin. Deformation of the semiconductor package occurs due to causes such as differences in materials, resin curing shrinkage, and differences in the upper and lower thicknesses of the package.
Then, like the manufacturing method of the semiconductor device described in the above-mentioned Patent Document 1, insert curing plates are inserted between packages, or the packages are directly stacked, and mold curing is performed in a state of being pressurized with a weight. , Have corrected the deformation.

However, in a package in which external terminals are made independent by etching after resin sealing, as in the hybrid semiconductor device described above, foreign matter such as resin debris attached to the insertion plate is exposed on the surface of the conductor part such as external terminals and die pads. The plating surface that contacts the plating surface and scratches the plating surface that performs the resist function at the time of re-etching, and this scratched portion is eroded by the etching solution, causing pit defects and causing a decrease in yield. .
Accordingly, an object of the present invention is to prevent the occurrence of product defects in a mold curing process of a sealing resin for a package of a resin-encapsulated semiconductor device.

  In order to solve the above-described problem, the first configuration of the present invention includes a semiconductor package in which a semiconductor element is sealed with resin and an insertion plate made of a heat-resistant flat plate, which are alternately stacked and placed on a base. In a method for manufacturing a semiconductor device, the method includes a step of heating the semiconductor package to a predetermined temperature in a state where the semiconductor package is pressed by a pressing means provided on the insertion plate, and then slowly cooling to correct deformation generated in the semiconductor package. The insertion plate is provided with a counterbore or a through-hole corresponding to the outline of the external terminal of the semiconductor package that contacts the insertion plate on the surface.

  In the first configuration, when pressurizing each semiconductor package via the insertion plate during the mold curing process, a counterbore or a through hole is provided at a portion of the insertion plate that contacts the external terminal of the semiconductor package. Therefore, the external terminals of the semiconductor package do not directly contact the insertion plate, and scratches and foreign substances do not adhere to the plated surface of the external terminals. This eliminates product defects such as scratches caused by erosion of external terminals due to defective resist functions during subsequent re-etching, and can improve yield.

  According to a second configuration of the present invention, in the first configuration, the insertion plate is further provided with a counterbore or a through hole corresponding to the contour of the die pad of the semiconductor package. And In this second configuration, by providing a counterbore or a through-hole corresponding to the contour of the die pad on the insertion plate, scratches and foreign matter do not occur on the die pad surface, thereby preventing product defects. it can. Moreover, the load applied to the die pad surface during pressurization can be eliminated, and the deformation of the sealing resin portion can be efficiently corrected.

  The third configuration of the present invention includes a base, an insertion plate inserted between a plurality of semiconductor packages stacked on the base, and a pressing means provided on the uppermost insertion plate. In the semiconductor package deformation correction device, the insertion plate is provided with a counterbore or a through-hole corresponding to the contour of the external terminal of the semiconductor package in contact with the insertion plate. Features.

  In the third configuration, since the counterbore or the through hole is provided in the portion of the insertion plate that contacts the external terminal of the semiconductor package, the external terminal of the semiconductor package does not directly contact the insertion plate, No scratches or foreign matter adhere to the plated surface of the external terminals. This eliminates product defects such as scratches caused by erosion of external terminals due to defective resist functions during subsequent re-etching, and can improve yield.

  According to a fourth configuration of the present invention, in the third configuration, the insertion plate is further provided with a counterbore or a through-hole corresponding to the outline of the die pad of the semiconductor package. . In the fourth configuration, by providing a counterbore or a through-hole corresponding to the contour of the die pad in the insertion plate, scratches and foreign matter do not occur on the die pad surface, thereby preventing product defects. it can. Moreover, the load applied to the die pad surface during pressurization can be eliminated, and the deformation of the sealing resin portion can be efficiently corrected.

  According to the present invention, when a conductor part such as an external terminal or die pad of the product is in contact with the insertion plate during mold curing, a product scratch is generated due to resin residue, foreign matter, etc. adhering to the surface of the insertion plate. Although it causes a decrease in yield due to a defect, the structure in which the insertion plate is not in contact with the conductor portion reduces scratches and foreign matters generated during mold curing, thereby improving the yield.

  The effect of the insertion plate of the configuration of the present invention is not limited to a hybrid type semiconductor device, but also a product that performs single-side molding such as BGA and QFN and a product that performs mold curing using pressure means such as weight. Can be expected.

1 is a partially exploded perspective view of a semiconductor package deformation correction device according to an embodiment of the present invention. It is a front view of the deformation correction apparatus of the semiconductor package which concerns on embodiment of this invention. (A) is a surface view of the semiconductor package according to the embodiment of the present invention, (b) is a surface view of the upper surface of the insertion plate according to the embodiment of the present invention, and (c) is a lower surface of the insertion plate. FIG. (A), (b), (c) is a surface view which shows the other example of the insertion plate which concerns on embodiment of this invention, respectively. It is explanatory drawing which shows the manufacturing process of a hybrid type semiconductor device.

Hereinafter, embodiments of the present invention will be described with reference to the drawings.
As shown in FIGS. 1 and 2, the semiconductor package deformation correction device according to the embodiment of the present invention includes a base 1, a guide bar 2 erected from the base 1, and a weight 3. ing. The upper surface of the base 1 and the lower surface of the weight 3 are flat, and the interposing plates 5 and the semiconductor packages 6 are alternately stacked therebetween. The base 1, the guide rod 2, and the weight 3 are made of a heat-resistant member that can withstand the temperature during mold curing (about 180 ° C. to 200 ° C.), and in this example, is made of an aluminum alloy.

  The guide bar 2 has a function of restricting the position when the insertion plate 5 and the semiconductor package 6 are stacked on the base 1 so that the outer periphery is in contact with the inner side of the six guide bars 2 without a gap. The insertion plate 5, the semiconductor package 6, and the weight 3 are installed.

  On the upper and lower surfaces of the insertion plate 5, counterbore portions or through-hole portions according to the arrangement and shape of external terminals and die pads in the semiconductor package 6 sandwiched therebetween are formed. For example, when the conductive portion on the back surface of the semiconductor package 6 is in the form of the external terminal 6a and the die pad 6b shown in FIG. 3A, the upper surface of the insertion plate 5 is the counterbore portion shown in FIG. Through-hole portions) 5a and 5b. If the upper surface of the semiconductor package 6 is flat, the lower surface of the insertion plate 5 is flat as shown in FIG. The depth of the spot facing portions 5a and 5b is set to be deeper than the height of the external terminal 6a and die pad 6b of the semiconductor package so that the external terminal 6a and die pad 6b do not contact the spot facing portions 5a and 5b.

  The counterbore 5a, 5b or the through hole formed on the upper surface or the lower surface of the insertion plate 5 is configured to include the entire external terminal array in addition to the shape corresponding to each external terminal. You can also. Examples are shown in FIGS. 4 (a), 4 (b) and 4 (c). 4A shows a case where the spot facing portion 5c includes the entire four semiconductor packages shown in FIG. 3A, and FIG. 4B shows a case where the spot facing portion 5d includes the entire semiconductor package. FIG. 4 (c) shows a case where the spot facing 5e does not contact only the external terminal.

  As described above, mold curing is performed in a state where the interposing plates 5 and the semiconductor packages 6 are alternately stacked on the base 1 and the weights 3 are placed on the base plate 1. Thereby, the deformation of the semiconductor package 6 is corrected. In the case of a hybrid semiconductor device, after the deformation is corrected, re-etching is performed to form a standoff of the external terminal.

  This semiconductor package deformation correction device changes the flat insertion plate used in the conventional mold cure to an insertion plate having a structure in which the die pad of the semiconductor package and the external terminal do not contact, thereby making the conventional mold cure. In the same process, product defects due to scratches and foreign matter can be eliminated. That is, by changing only the insertion plate, the same procedure can be applied to obtain the effects of the present invention.

  The present invention can be applied not only to a manufacturing process of a hybrid semiconductor device but also to a manufacturing process of a product that performs single-sided molding such as normal BGA and QFN. In addition to using a weight as the pressurizing means, the present invention can also be applied to a deformation correcting apparatus using another pressurizing means such as a spring or a press.

DESCRIPTION OF SYMBOLS 1 Base 2 Guide rod 3 Weight 5 Insertion plate 5a-5e Counterbore part 6 Semiconductor package 6a External terminal 6b Die pad

Claims (4)

A semiconductor package in which a semiconductor element is sealed with resin and an insertion plate made of a heat-resistant flat plate are alternately stacked and placed on a base and pressed by a pressing means provided on the uppermost insertion plate In the method of manufacturing a semiconductor device, including the step of heating the semiconductor package to a predetermined temperature and then slowly cooling to correct the deformation generated in the semiconductor package.
The method of manufacturing a semiconductor, wherein the insertion plate is provided with a counterbore or a through hole corresponding to the contour of an external terminal of a semiconductor package that contacts the insertion plate on the surface thereof. .   2. The semiconductor manufacturing method according to claim 1, wherein the insertion plate is further provided with a counterbore or a through hole corresponding to the contour of the die pad of the semiconductor package. In a semiconductor package deformation correction apparatus having a base, an insertion plate inserted between a plurality of semiconductor packages stacked on the base, and a pressing means provided on the uppermost insertion plate,
The insertion plate is provided with a counterbore or a through-hole corresponding to the contour of the external terminal of the semiconductor package that contacts the insertion plate on the surface thereof. apparatus.   4. The semiconductor package deformation correction device according to claim 3, wherein the insertion plate further includes a counterbore or a through hole corresponding to a contour of a die pad of the semiconductor package.