JP5467506B2 - Resin-sealed semiconductor device and manufacturing method thereof - Google Patents

Resin-sealed semiconductor device and manufacturing method thereof Download PDF

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JP5467506B2
JP5467506B2 JP2009231140A JP2009231140A JP5467506B2 JP 5467506 B2 JP5467506 B2 JP 5467506B2 JP 2009231140 A JP2009231140 A JP 2009231140A JP 2009231140 A JP2009231140 A JP 2009231140A JP 5467506 B2 JP5467506 B2 JP 5467506B2
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resin
frame
lead
terminal
terminal portion
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JP2010004080A (en
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知加雄 池永
幸治 冨田
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Dai Nippon Printing Co Ltd
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Dai Nippon Printing Co Ltd
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93—Batch processes
    • H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Description

本発明は、リードフレーム上に半導体素子を搭載し、その外囲、特に半導体素子の上面側をモールド樹脂で封止した樹脂封止型半導体装置の技術分野に属するものである。   The present invention belongs to the technical field of a resin-encapsulated semiconductor device in which a semiconductor element is mounted on a lead frame and its outer periphery, in particular, the upper surface side of the semiconductor element is sealed with a mold resin.

近年、基板実装の高密度化に伴い、基板実装される半導体製品の小型化・薄型化が要求されている。ＬＳＩも、高集積化によるチップ数の削減とパッケージの小型・軽量化が厳しく要求され、いわゆるＣＳＰ（Chip Size Package)の普及が急速に進んでいる。特に、リードフレームを用いた薄型の半導体製品の開発においては、リードフレームに半導体素子を搭載し、その搭載面をモールド樹脂で封止する片面封止タイプの樹脂封止型半導体装置が開発されている。   In recent years, with the increase in the density of board mounting, there has been a demand for downsizing and thinning of semiconductor products mounted on the board. LSIs are also required to reduce the number of chips due to high integration and to reduce the size and weight of packages, and so-called CSP (Chip Size Package) is rapidly spreading. In particular, in the development of thin semiconductor products using lead frames, a single-side sealed type resin-sealed semiconductor device has been developed in which a semiconductor element is mounted on a lead frame and the mounting surface is sealed with a mold resin. Yes.

図１は樹脂封止型半導体装置の一例を示す断面図、図２はその平面図である。これらの図に示される樹脂封止型半導体装置は、リードフレーム１の吊りリード２で支持されたダイパッド３に搭載された半導体素子４と、この半導体素子４の上面の電極とリードフレーム１の端子部５とを電気的に接続した金属細線６と、半導体素子４の上側とダイパッド３の下側とを含む半導体素子４の外囲領域を封止した封止樹脂７とを備えている。この樹脂封止型半導体装置は、いわゆるアウターリードが突き出ておらず、インナーリードとアウターリードの両者が端子部５として一体となったノンリードタイプである。また、用いられているリードフレーム１は、ダイパッド３が端子部より上方に位置するようにハーフエッチングされている。このように段差を有しているので、ダイパッド３の下側にも封止樹脂７を存在させることができ、ダイパッド非露出型であっても薄型を実現している。   FIG. 1 is a sectional view showing an example of a resin-encapsulated semiconductor device, and FIG. 2 is a plan view thereof. The resin-encapsulated semiconductor device shown in these drawings includes a semiconductor element 4 mounted on a die pad 3 supported by suspension leads 2 of a lead frame 1, electrodes on the upper surface of the semiconductor element 4, and terminals of the lead frame 1. A metal thin wire 6 that is electrically connected to the portion 5 and a sealing resin 7 that seals an outer region of the semiconductor element 4 including the upper side of the semiconductor element 4 and the lower side of the die pad 3 are provided. This resin-encapsulated semiconductor device is a non-lead type in which a so-called outer lead does not protrude and both the inner lead and the outer lead are integrated as the terminal portion 5. The lead frame 1 used is half-etched so that the die pad 3 is positioned above the terminal portion. Since there is such a step, the sealing resin 7 can be present under the die pad 3, and a thin shape is realized even if the die pad is not exposed.

上記のようなノンリードタイプの樹脂封止型半導体装置は、半導体素子のサイズが小型であるため、１枚のフレームの幅方向に複数列配列して製造するマトリックスタイプが主流である。そして、最近では、コストダウンの要求から、図３に示すような個別にモールドするタイプから、図４に示すような一括してモールドするタイプへ移行することが考えられている。   Since the non-lead type resin-encapsulated semiconductor device as described above has a small semiconductor element size, a matrix type manufactured by arranging a plurality of rows in the width direction of one frame is mainly used. Recently, it has been considered to shift from the individual molding type as shown in FIG. 3 to the batch molding type as shown in FIG.

個別モールドタイプは、図３（Ａ）に示すように、１枚のフレームＦ内に小さなサイズの個々のモールドキャビティＣを分かれた状態で設けるようにし、モールド後は金型により個別に打ち抜いて図３（Ｂ）に示す半導体装置Ｓを得るものである。すなわち、半導体素子を銀ペースト等によりリードフレームのダイパッド上に搭載し、ワイヤーボンディングを実施した後、個々の半導体素子を個別にモールドしてから、金型により個々の半導体装置として打ち抜くのである。   In the individual mold type, as shown in FIG. 3A, individual mold cavities C having a small size are provided separately in one frame F, and after molding, the mold is individually punched by a mold. The semiconductor device S shown in 3 (B) is obtained. That is, a semiconductor element is mounted on a die pad of a lead frame with silver paste or the like, wire bonding is performed, individual semiconductor elements are individually molded, and then punched as individual semiconductor devices with a mold.

一括モールドタイプは、図４（Ａ）に示すように、１枚のフレームＦ内に大きなサイズの幾つかのモールドキャビティＣを設けるようにし、その一つ一つのモールドキャビティＣ内には多数の半導体素子をマトリックス状に配列し、それらの半導体素子を一括してモールドした後、各リードフレームのグリッドリードＬのところをダイシングソーで切断して図４（Ｂ）に示す半導体装置Ｓを得るものである。すなわち、半導体素子を銀ペースト等によりリードフレームのダイパッド上に搭載し、ワイヤーボンディングを実施した後、複数個配列されている半導体素子を所定のキャビティサイズで一括モールドしてから、ダイシングにより個片化するのである。   In the collective mold type, as shown in FIG. 4A, several mold cavities C having a large size are provided in one frame F, and each of the mold cavities C has a large number of semiconductors. The elements are arranged in a matrix, the semiconductor elements are molded together, and the grid leads L of each lead frame are cut with a dicing saw to obtain the semiconductor device S shown in FIG. is there. In other words, a semiconductor element is mounted on a die pad of a lead frame with silver paste or the like, and after wire bonding, a plurality of arrayed semiconductor elements are collectively molded with a predetermined cavity size and then separated by dicing. To do.

上記したように、一括モールドタイプの製造工程では、マトリックス状に配列した複数の半導体素子を一括してモールドし、その後でダイシングにより個片化する。この場合、グリッドリードのところをダイシングソーで切断するが、それと同時に端子部をグリッドリードから切り離すようになっている。   As described above, in the collective mold type manufacturing process, a plurality of semiconductor elements arranged in a matrix are molded together and then separated into pieces by dicing. In this case, the grid lead is cut with a dicing saw, and at the same time, the terminal portion is cut off from the grid lead.

一般に、エッチング加工で製品を製造する場合、設計で直角にデザインされた箇所は、エッチング工程を経た仕上がり状態においてどうしても丸みを帯びた形状（Ｒ形状）となる。上記した一括モールドタイプの半導体装置用のフレームにおいても、図５に示す如く、グリッドリードＬと端子部５との接続部分を直角に設計してあっても、エッチング加工はこの設計通りにはできず、点線のような丸みを持ったＲ形状になる。そして、端子部５の付け根のところでＲ形状が大きくなると、カットラインαでのダイシングにより個片化した際、図６に示すように、個片化された半導体装置における封止樹脂７のカット面に露出する端子部５の切断面が点線で示すように拡大して互いに近接するため、基板搭載時に半田ブリッジによる短絡事故が発生しかねないといった問題を生じる。   Generally, when a product is manufactured by etching, a portion designed at a right angle by design has a rounded shape (R shape) in the finished state after the etching process. Even in the above-mentioned frame for a collective mold type semiconductor device, even if the connecting portion between the grid lead L and the terminal portion 5 is designed at a right angle as shown in FIG. Instead, it has a rounded shape like a dotted line. When the R shape becomes large at the base of the terminal portion 5, when cut into pieces by dicing at the cut line α, as shown in FIG. 6, the cut surface of the sealing resin 7 in the separated semiconductor device Since the cut surfaces of the terminal portions 5 exposed to the surface are enlarged as shown by dotted lines and close to each other, there is a problem that a short circuit accident due to a solder bridge may occur when the board is mounted.

本発明は、このような事情に鑑みてなされたものであり、その目的とするところは、一括モールドタイプの半導体装置であって、基板搭載時に半田ブッリジ等の事故を起こさないようにした樹脂封止型半導体装置及びその製造方法を提供することにある。   The present invention has been made in view of such circumstances, and an object of the present invention is a collective mold type semiconductor device, which is a resin encapsulant that prevents an accident such as a solder bridge when mounting a substrate. An object of the present invention is to provide a stationary semiconductor device and a manufacturing method thereof.

上記の目的を達成するため、本発明に係る樹脂封止型半導体装置は、複数のリードフレームが端子部を突設したグリッドリードを介してマトリックス状に配列されたフレームを用い、その各リードフレームにおける吊りリードで支持されたダイパッド上にそれぞれ半導体素子を配列し、それらの半導体素子を一括してモールドした後、各リードフレームの端子部を残すようにしてグリッドリードのところをダイシングソーで切断して個片化することにより製造されるノンリードタイプの樹脂封止型半導体装置であって、用いるフレームが、各端子部の付け根付近に表面又は裏面からハーフエッチング加工を施して端子部の幅方向全体にわたる薄肉部を形成したものであり、封止樹脂のカット面及び封止樹脂下面の端部に前記端子部が複数隣接して形成され、封止樹脂のカット面に露出する端子部の面積が端子部内部の断面より小さく形成され、隣接する端子部同士の間隔が近接しない状態に保たれていることを特徴とする。 In order to achieve the above object, a resin-encapsulated semiconductor device according to the present invention uses a frame in which a plurality of lead frames are arranged in a matrix through grid leads provided with projecting terminal portions. After arranging the semiconductor elements on the die pads supported by the suspension leads in, and molding them all together, the grid leads are cut with a dicing saw so that the terminal portions of each lead frame remain. A non-lead type resin-encapsulated semiconductor device manufactured by dividing into individual pieces, and the frame to be used is half-etched from the front surface or the back surface near the base of each terminal portion, and the width direction of the terminal portion A thin-walled portion is formed over the entire surface, and a plurality of the terminal portions are adjacent to the cut surface of the sealing resin and the end portion of the lower surface of the sealing resin. Formed Te, the area of the terminal portion exposed to the cut surface of the sealing resin is formed smaller than the cross-section of the inner ends of the terminal portion, characterized in that it is maintained in a state where the interval between the terminal portions adjacent does not close .

上記の樹脂封止型半導体装置の製造方法は、 複数のリードフレームが端子部を突設したグリッドリードを介してマトリックス状に配列されたフレームを用い、その各リードフレームにおける吊りリードで支持されたダイパッド上にそれぞれ半導体素子を配列し、それらの半導体素子を一括してモールドした後、各リードフレームの端子部を残すようにしてグリッドリードのところをダイシングソーで切断して個片化するノンリードタイプの樹脂封止型半導体装置を製造する方法において、各端子部の付け根付近に表面又は裏面からハーフエッチング加工を施して端子部の幅方向全体にわたる薄肉部を形成したフレームを用い、封止樹脂のカット面及び封止樹脂下面の端部に前記端子部が複数隣接して形成され、封止樹脂のカット面に露出する端子部の面積が端子部内部の断面より小さく形成され、隣接する端子部同士の間隔が近接しない状態に保たれているようにすることを特徴とする。 The manufacturing method of the above resin-encapsulated semiconductor device uses a frame in which a plurality of lead frames are arranged in a matrix via grid leads with protruding terminal portions, and is supported by suspension leads in each lead frame. Non-lead which arranges each semiconductor element on the die pad, molds these semiconductor elements together, then cuts the grid leads with a dicing saw so as to leave the terminal part of each lead frame. Type resin-encapsulated semiconductor device, in the method of manufacturing a resin-encapsulated semiconductor device, using a frame in which a thin portion extending across the entire width direction of the terminal portion is formed by half-etching from the front surface or the back surface near the base of each terminal portion. A plurality of the terminal portions are formed adjacent to the cut surface and the end portion of the lower surface of the sealing resin, and are exposed to the cut surface of the sealing resin. The area of the terminal portion is smaller than the cross-section of the inner ends of the terminal portion, characterized in that the so that have been kept in a state where the interval between the terminal portions adjacent does not close.

以上説明したように、本発明は、複数のリードフレームが端子部を突設したグリッドリードを介してマトリックス状に配列されたフレームを用い、その各リードフレームにおける吊りリードで支持されたダイパッド上にそれぞれ半導体素子を配列し、それらの半導体素子を一括してモールドした後、各リードフレームの端子部を残すようにしてグリッドリードのところをダイシングソーで切断して個片化することで製造されるノンリードタイプの樹脂封止型半導体装置であって、用いるフレームが、各端子部の付け根付近に表面又は裏面からハーフエッチング加工を施して端子部の幅方向全体にわたる薄肉部を形成したものであり、封止樹脂のカット面及び封止樹脂下面の端部に前記端子部が複数隣接して形成され、封止樹脂のカット面に露出する端子部の面積が端子部内部の断面より小さく形成され、隣接する端子部同士の間隔が近接しない状態に保たれていることから、基板搭載時に半田ブリッジ等の事故が発生することがない。 As described above, the present invention uses a frame in which a plurality of lead frames are arranged in a matrix via grid leads provided with projecting terminal portions, on a die pad supported by the suspension leads in each lead frame. It is manufactured by arranging semiconductor elements and molding them all together, and then cutting the grid leads with a dicing saw so as to leave the terminal portions of each lead frame. A non-lead type resin-encapsulated semiconductor device, in which the frame used is formed by thin etching over the entire width of the terminal portion by performing half-etching processing from the front or back surface near the base of each terminal portion. A plurality of the terminal portions are formed adjacent to the cut surface of the sealing resin and the end portion of the lower surface of the sealing resin, and are exposed to the cut surface of the sealing resin. The area of the terminal portion is smaller than the cross-section of the inner ends of the terminal portion, from the adjacent Tei Rukoto interval is kept in a state that does not close the between the terminal portion, an accident such as a solder bridge is not generated when the substrate is mounted to .

樹脂封止型半導体装置の一例を示す断面図である。It is sectional drawing which shows an example of a resin sealing type semiconductor device. 図１に示す樹脂封止型半導体装置の平面図である。FIG. 2 is a plan view of the resin-encapsulated semiconductor device shown in FIG. 1. 個別モールドタイプの説明図である。It is explanatory drawing of an individual mold type. 一括モールドタイプの説明図である。It is explanatory drawing of a collective mold type. エッチングにより生ずるＲ形状の説明図である。It is explanatory drawing of R shape produced by an etching. カット面に露出する端子部を示す説明図である。It is explanatory drawing which shows the terminal part exposed to a cut surface. 本発明に係る樹脂封止型半導体装置の製造に用いるフレームの一例を示す平面図である。It is a top view which shows an example of the flame | frame used for manufacture of the resin sealing type semiconductor device which concerns on this invention. 図７に示すフレームの一部拡大平面図である。FIG. 8 is a partially enlarged plan view of the frame shown in FIG. 7. 図８のＡ−Ａ断面図である。It is AA sectional drawing of FIG.

次に、本発明の実施の形態を図面を参照して説明する。図７は本発明に係る樹脂封止型半導体装置の製造に用いるフレームの一例を示す平面図、図８は図７に示すフレームの一部拡大平面図、図９は図８のＡ−Ａ断面図である。   Next, embodiments of the present invention will be described with reference to the drawings. 7 is a plan view showing an example of a frame used for manufacturing a resin-encapsulated semiconductor device according to the present invention, FIG. 8 is a partially enlarged plan view of the frame shown in FIG. 7, and FIG. 9 is a cross-sectional view taken along line AA in FIG. FIG.

これらの図においてＦはリードフレーム用の１枚の金属フレームで、３×４個のリードフレーム１０がグリッドリードＬを介してマトリックス状に配置されている。グリッドリードＬは、隣接するリードフレーム１０の端子部５を接続しているところである。そして、図８及び図９に示すように、グリッドリードＬと端子部５の付け根付近を含む領域に、表面からのハーフエッチングにより薄肉部１１が設けられ、この薄肉部１１はダイシングソーによるカットラインαより外側まで形成されている。したがって、フレームＦのエッチング時に端子部５の付け根のところにＲ形状が発生したとしても、ハーフエッチング無しと比較し板厚が薄くなった分Ｒが小さくなり、カットラインαのところでは端子部５の断面積が大きくなることがない。   In these drawings, F is one metal frame for a lead frame, and 3 × 4 lead frames 10 are arranged in a matrix through grid leads L. The grid lead L is where the terminal portions 5 of the adjacent lead frames 10 are connected. As shown in FIGS. 8 and 9, a thin portion 11 is provided by half etching from the surface in a region including the vicinity of the base of the grid lead L and the terminal portion 5, and this thin portion 11 is cut by a dicing saw. It is formed outside α. Therefore, even when an R shape is generated at the base of the terminal portion 5 during the etching of the frame F, the R is reduced as the plate thickness is reduced as compared with the case where there is no half etching, and the terminal portion 5 is present at the cut line α. The cross-sectional area does not increase.

このフレームＦを用いて樹脂封止型半導体装置を製造する手順は次のようである。まず、フレームＦの各リードフレーム１０におけるダイパッド３の上にそれぞれ半導体素子を銀ペーストにより搭載し、端子部５と半導体素子の上面の電極との間にワイヤーボンディングを実施した後、１２個配列されている半導体素子を所定のキャビティサイズで一括モールドしてから、各リードフレームの端子部５を残すようにしてダイシングラインαのところをダイシングソーで切断して個片化する。   The procedure for manufacturing a resin-encapsulated semiconductor device using the frame F is as follows. First, a semiconductor element is mounted on the die pad 3 in each lead frame 10 of the frame F with silver paste, and after wire bonding is performed between the terminal portion 5 and the electrode on the upper surface of the semiconductor element, twelve are arranged. The semiconductor elements are collectively molded with a predetermined cavity size, and then the dicing line α is cut into pieces by dicing saw so as to leave the terminal portions 5 of the lead frames.

このように個片化して製造された樹脂封止型半導体装置は、封止樹脂のカット面に露出する端子部５の面積が大きくならず、隣接する端子部５同士の間隔が充分保たれた状態になるので、基板搭載時に半田ブリッジ等の事故が発生することがない。   In the resin-encapsulated semiconductor device manufactured in this way, the area of the terminal portion 5 exposed on the cut surface of the sealing resin is not increased, and the interval between the adjacent terminal portions 5 is sufficiently maintained. As a result, an accident such as a solder bridge does not occur when the board is mounted.

なお、上記の例では、グリッドリードと端子部の付け根付近における表側に薄肉部１１を設けたが、裏面からのハーフエッチングで裏側に薄肉部を設けても同様な効果が得られる。   In the above example, the thin portion 11 is provided on the front side near the base of the grid lead and the terminal portion, but the same effect can be obtained even if the thin portion is provided on the back side by half etching from the back surface.

１ リードフレーム
２ リード
３ ダイパッド
４ 半導体素子
５ 端子部
６ 金属細線
７ 封止樹脂
１０ リードフレーム
１１ 薄肉部
Ｃ モールドキャビティ
Ｆ フレーム
Ｌ グリッドリード
Ｓ 半導体装置
α カットライン DESCRIPTION OF SYMBOLS 1 Lead frame 2 Lead 3 Die pad 4 Semiconductor element 5 Terminal part 6 Metal thin wire 7 Sealing resin 10 Lead frame 11 Thin part C Mold cavity F Frame L Grid lead S Semiconductor device α Cut line

Claims (2)

複数のリードフレームが端子部を突設したグリッドリードを介してマトリックス状に配列されたフレームを用い、その各リードフレームにおける吊りリードで支持されたダイパッド上にそれぞれ半導体素子を配列し、それらの半導体素子を一括してモールドした後、各リードフレームの端子部を残すようにしてグリッドリードのところをダイシングソーで切断して個片化することにより製造されるノンリードタイプの樹脂封止型半導体装置であって、用いるフレームが、各端子部の付け根付近に表面又は裏面からハーフエッチング加工を施して端子部の幅方向全体にわたる薄肉部を形成したものであり、封止樹脂のカット面及び封止樹脂下面の端部に前記端子部が複数隣接して形成され、封止樹脂のカット面に露出する端子部の面積が端子部内部の断面より小さく形成され、隣接する端子部同士の間隔が近接しない状態に保たれていることを特徴とする樹脂封止型半導体装置。 Using a frame in which a plurality of lead frames are arranged in a matrix via grid leads with protruding terminal portions, semiconductor elements are arranged on die pads supported by suspension leads in each lead frame, and the semiconductors A non-lead type resin-encapsulated semiconductor device manufactured by molding the elements in a lump and then cutting the grid leads with a dicing saw so as to leave the terminal portions of each lead frame. The frame to be used is formed by performing a half etching process from the front surface or the back surface near the base of each terminal part to form a thin part over the entire width direction of the terminal part. the terminal portion is formed by a plurality adjacent the end portion of the resin lower surface, the end terminal part area of the terminal portion exposed to the cut surface of the sealing resin Parts are smaller than the cross-section of, the interval between the adjacent terminal portions are kept without close resin-sealed semiconductor device according to claim. 複数のリードフレームが端子部を突設したグリッドリードを介してマトリックス状に配列されたフレームを用い、その各リードフレームにおける吊りリードで支持されたダイパッド上にそれぞれ半導体素子を配列し、それらの半導体素子を一括してモールドした後、各リードフレームの端子部を残すようにしてグリッドリードのところをダイシングソーで切断して個片化するノンリードタイプの樹脂封止型半導体装置を製造する方法において、各端子部の付け根付近に表面又は裏面からハーフエッチング加工を施して端子部の幅方向全体にわたる薄肉部を形成したフレームを用い、封止樹脂のカット面及び封止樹脂下面の端部に前記端子部が複数隣接して形成され、封止樹脂のカット面に露出する端子部の面積が端子部内部の断面より小さく形成され、隣接する端子部同士の間隔が近接しない状態に保たれているようにすることを特徴とする樹脂封止型半導体装置の製造方法。 Using a frame in which a plurality of lead frames are arranged in a matrix via grid leads with protruding terminal portions, semiconductor elements are arranged on die pads supported by suspension leads in each lead frame, and the semiconductors In a method of manufacturing a non-lead type resin-encapsulated semiconductor device in which elements are molded in a lump, and then a grid lead is cut with a dicing saw so as to leave a terminal portion of each lead frame. In addition, using a frame in which a thin portion over the entire width direction of the terminal portion is formed by performing half etching processing from the front surface or the back surface near the base of each terminal portion, the cut surface of the sealing resin and the end portion of the lower surface of the sealing resin terminal portion is formed by a plurality adjacent area of the terminal portion exposed to the cut surface of the sealing resin is smaller than the cross-section of the inner ends of the terminal portion Made that method of manufacturing a resin-sealed semiconductor device which is characterized in that the so that have been kept in a state where the interval between the terminal portions adjacent does not close.
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