JP5093076B2 - Mold package and manufacturing method thereof - Google Patents

Mold package and manufacturing method thereof Download PDF

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JP5093076B2
JP5093076B2 JP2008307297A JP2008307297A JP5093076B2 JP 5093076 B2 JP5093076 B2 JP 5093076B2 JP 2008307297 A JP2008307297 A JP 2008307297A JP 2008307297 A JP2008307297 A JP 2008307297A JP 5093076 B2 JP5093076 B2 JP 5093076B2
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circuit board
terminal
mold
mold resin
joint
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JP2010135373A (en
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典久 今泉
祐紀 眞田
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Denso Corp
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Denso Corp
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93—Batch processes
    • H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
    • H01L21/565—Moulds
    • H—ELECTRICITY
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    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/93—Batch processes
    • H01L2224/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L2224/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/73—Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits
    • H—ELECTRICITY
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    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/153—Connection portion
    • H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/156—Material
    • H01L2924/15786—Material with a principal constituent of the material being a non metallic, non metalloid inorganic material
    • H01L2924/15787—Ceramics, e.g. crystalline carbides, nitrides or oxides
    • H—ELECTRICITY
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    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation
    • H01L2924/1815—Shape
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/191—Disposition
    • H01L2924/19101—Disposition of discrete passive components
    • H01L2924/19105—Disposition of discrete passive components in a side-by-side arrangement on a common die mounting substrate

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)

Description

本発明は、回路基板とリードフレームの端子が直接に接合された回路基板を、モールド樹脂によって封止してなるモールドパッケージ、および、そのようなモールドパッケージの製造方法に関する。   The present invention relates to a mold package formed by sealing a circuit board in which a circuit board and terminals of a lead frame are directly bonded with a mold resin, and a method for manufacturing such a mold package.

従来より、この種のモールドパッケージとしては、回路基板の一面に電子部品を搭載し、導電性接続材料によりリードフレームの端子を回路基板に直接、接合した後、これら回路基板、電子部品、端子を、モールド樹脂によって封止してなるものが提案されている（たとえば、特許文献１参照）。   Conventionally, as this type of mold package, an electronic component is mounted on one surface of a circuit board, and the terminals of the lead frame are directly joined to the circuit board with a conductive connecting material, and then the circuit board, the electronic component, and the terminal are joined. The one formed by sealing with a mold resin has been proposed (for example, see Patent Document 1).

このものでは、リードフレームのリード端子と回路基板とを直接に接合し、電気的・機械的に接続する構造となっているため、パッケージの小型化およびワイヤボンディングを不要にして低コスト化を実現することが可能である。   With this structure, the lead terminals of the lead frame and the circuit board are directly joined and electrically and mechanically connected, so the package is downsized and wire bonding is not required, reducing costs. Is possible.

しかしながら、この構造では、回路基板と端子とを接合した後にモールド成型するために、モールド成型するまでの途中工程で工程内の振動などの外乱により、回路基板と端子との接合部へのダメージが懸念される。   However, in this structure, since the molding is performed after the circuit board and the terminal are joined, damage to the joint between the circuit board and the terminal is caused by disturbance such as vibration in the process in the middle of the molding process. Concerned.

この対策として、端子の先端に貫通スルーホールを設けて接合部の強度を上げたり（たとえば特許文献２参照）、回路基板に切り欠け部を設けた構成としたり（たとえば特許文献３参照）することなどが提案されている。
特開昭６３−１１４１５０号公報 特開昭６３−２０９１５２号公報 特開昭６３−２３６３５２号公報 As countermeasures, a through-through hole is provided at the tip of the terminal to increase the strength of the joint (for example, see Patent Document 2), or a circuit board is provided with a notch (for example, see Patent Document 3). Etc. have been proposed.
JP 63-114150 A JP-A-63-209152 JP-A 63-236352

しかしながら、上記特許文献２や特許文献３に記載されている構成を実施した場合でも、モールド成型などのストレスが、回路基板と端子との接合部に加わることは回避されず、当該接合部の品質低下が懸念される。   However, even when the configurations described in Patent Literature 2 and Patent Literature 3 are implemented, it is not avoided that stress such as molding is applied to the joint portion between the circuit board and the terminal, and the quality of the joint portion is not avoided. There is concern about the decline.

本発明は、上記問題に鑑みてなされたものであり、回路基板とリードフレームの端子が直接に接合された回路基板を、モールド樹脂によって封止してなるモールドパッケージにおいて、モールド成型後にリードフレームの端子と回路基板とを電気的に接合できるようにすることを目的とする。   The present invention has been made in view of the above problems, and in a mold package formed by sealing a circuit board in which a terminal of a circuit board and a lead frame are directly bonded with a molding resin, the lead frame is molded after molding. An object is to enable electrical connection between a terminal and a circuit board.

上記目的を達成するため、請求項１に記載の発明では、一面に電子部品（２０）が搭載された回路基板（１０）における他面に、端子（４０）を接合し、モールド樹脂（５０）は、回路基板（１０）の他面における端子（４０）と回路基板（１０）との接合部（６０）が当該モールド樹脂（５０）より露出する形状に成型されたものとし、このモールド樹脂（５０）より露出する接合部（６０）にて、端子（４０）と回路基板（１０）とを電気的および機械的に接続したことを特徴とする。   In order to achieve the above object, in the first aspect of the present invention, the terminal (40) is joined to the other surface of the circuit board (10) on which the electronic component (20) is mounted, and the mold resin (50). Is formed into a shape in which the joint (60) between the terminal (40) and the circuit board (10) on the other surface of the circuit board (10) is exposed from the mold resin (50). 50) The terminal (40) and the circuit board (10) are electrically and mechanically connected to each other at the joint (60) exposed from 50).

それによれば、モールド樹脂（５０）を、回路基板（１０）の他面における端子（４０）と回路基板（１０）との接合部（６０）が当該モールド樹脂（５０）より露出する形状に成型した後に、当該接合部（６０）にて、端子（４０）と回路基板（１０）とを電気的に接合することができる。   According to this, the molding resin (50) is molded into a shape in which the joint (60) between the terminal (40) and the circuit board (10) on the other surface of the circuit board (10) is exposed from the molding resin (50). After that, the terminal (40) and the circuit board (10) can be electrically joined at the joint (60).

ここで、請求項２に記載の発明のように、接合部（６０）では、導電性を有する導電性接合材（７０）により端子（４０）と回路基板（１０）とが電気的および機械的に接続されているものとしたとき、回路基板（１０）の他面のうち接合部（６０）に位置する部位に、当該回路基板（１０）の厚さ方向の一部が凹んだ凹部（１１）を設け、導電性接合材（７０）を、凹部（１１）に食い込んで設けたものとしてもよい。   Here, as in the invention described in claim 2, in the joint portion (60), the terminal (40) and the circuit board (10) are electrically and mechanically connected by the conductive joint material (70) having conductivity. When a part of the other surface of the circuit board (10) is located at the joint (60), a part of the circuit board (10) in the thickness direction is recessed (11). ) And the conductive bonding material (70) may be provided by biting into the recess (11).

それによれば、接合部（６０）における端子（４０）と回路基板（１０）との機械的な接合強度が向上する。   According to this, the mechanical joint strength between the terminal (40) and the circuit board (10) at the joint (60) is improved.

また、請求項３に記載の発明では、モールド樹脂（５０）は、接合部（６０）が当該モールド樹脂（５０）より露出するとともに、さらに回路基板（１０）の他面のうちの接合部（６０）以外の部位が露出する形状に成型されており、当該回路基板（１０）の他面のうちの接合部（６０）以外の部位には、回路基板（１０）の一面に設けられている電子部品（２０）とは別に、他の電子部品（３０）が搭載されていてもよい。それによれば、高密度の部品実装に適したモールドパッケージが提供される。   In the invention according to claim 3, the mold resin (50) has the joint portion (60) exposed from the mold resin (50), and further the joint portion ( 60) is formed in a shape that exposes a portion other than the joint portion (60) of the other surface of the circuit board (10), and is provided on one surface of the circuit board (10). Apart from the electronic component (20), another electronic component (30) may be mounted. According to this, a mold package suitable for high-density component mounting is provided.

また、請求項４に記載の発明のように、回路基板（１０）の他面側にて、端子（４０）のうちの接合部（６０）以外の部位がモールド樹脂（５０）で封止されているものにすれば、端子（４０）が、導電性接合材（７０）以外にもモールド樹脂（５０）によって機械的に支持されるので、接合部（６０）の補強がなされる。   Further, as in the fourth aspect of the invention, on the other surface side of the circuit board (10), the portion other than the joint portion (60) of the terminals (40) is sealed with the mold resin (50). Since the terminal (40) is mechanically supported by the mold resin (50) in addition to the conductive bonding material (70), the bonding portion (60) is reinforced.

また、請求項５に記載の発明のように、端子（４０）のうちの接合部（６０）以外の部位には、当該接合部（６０）以外の部位における他の部位よりも細い部位（４３）が設けられていてもよい。   Further, as in the invention described in claim 5, a portion (43) of the terminal (40) other than the joint portion (60) is thinner than other portions in the portion other than the joint portion (60). ) May be provided.

それによれば、接合部（６０）に加わる応力を、この細い部位（４３）にて緩和して低減することができる。結果、接合部（６０）の接合信頼性の向上が図れる。   According to this, the stress applied to the joint portion (60) can be relaxed and reduced at the thin portion (43). As a result, the joint reliability of the joint portion (60) can be improved.

また、請求項６に記載の発明は、回路基板（１０）の一面に電子部品（２０）を搭載し、回路基板（１０）とリードフレーム（４１）の端子（４０）とを直接に電気的に接合するとともに、回路基板（１０）、電子部品（２０）、端子（４０）をモールド樹脂（５０）で封止するようにしたモールドパッケージの製造方法において、以下の工程を行うことを特徴とするものである。   According to the sixth aspect of the present invention, the electronic component (20) is mounted on one surface of the circuit board (10), and the circuit board (10) and the terminal (40) of the lead frame (41) are directly electrically connected. In the mold package manufacturing method in which the circuit board (10), the electronic component (20), and the terminal (40) are sealed with the mold resin (50), the following steps are performed. To do.

まず、回路基板（１０）として、モールド樹脂（５０）による封止後にモールド樹脂（５０）より突出する部位である耳部（１２）を、当該回路基板（１０）の外周部に有するものを用意し、リードフレーム（４１）として、端子（４０）の外周部に、当該端子（４０）に連結された部位であってモールド樹脂（５０）による封止後にモールド樹脂（５０）より突出する部位である外側フレーム部（４２）を有するものを用意し、そして、回路基板（１０）の一面に電子部品（２０）を搭載する。   First, a circuit board (10) having an ear (12) that protrudes from the mold resin (50) after sealing with the mold resin (50) on the outer periphery of the circuit board (10) is prepared. The lead frame (41) is a part connected to the terminal (40) on the outer peripheral portion of the terminal (40) and protruding from the mold resin (50) after sealing with the mold resin (50). A device having an outer frame portion (42) is prepared, and the electronic component (20) is mounted on one surface of the circuit board (10).

そして、回路基板（１０）の他面に端子（４０）が重なるように、回路基板（１０）とリードフレーム（４１）とを重ねて、耳部（１２）と外側フレーム部（４２）とを機械的に接合することにより、回路基板（１０）とリードフレーム（４１）とを一体化する。   Then, the circuit board (10) and the lead frame (41) are overlapped so that the terminal (40) overlaps the other surface of the circuit board (10), and the ear part (12) and the outer frame part (42) are formed. The circuit board (10) and the lead frame (41) are integrated by mechanical joining.

続いて、一体化された回路基板（１０）とリードフレーム（４１）に対してモールド樹脂（５０）による封止を行うとともに、この封止においては、回路基板（１０）の他面と端子（４０）との重なり部をモールド樹脂（５０）より露出させるようにし、次に、モールド樹脂（５０）より突出する耳部（１２）および外側フレーム部（４２）を、カットして除去し、しかる後、回路基板（１０）の他面と端子（４０）との重なり部にて、端子（４０）と回路基板（１０）とを電気的・機械的に接続する。   Subsequently, the integrated circuit board (10) and the lead frame (41) are sealed with the mold resin (50). In this sealing, the other surface of the circuit board (10) and the terminals ( 40) is exposed from the mold resin (50), and then the ear portion (12) and the outer frame portion (42) protruding from the mold resin (50) are cut and removed. Thereafter, the terminal (40) and the circuit board (10) are electrically and mechanically connected at an overlapping portion between the other surface of the circuit board (10) and the terminal (40).

このような本発明の製造方法によれば、モールド樹脂（５０）を、回路基板（１０）の他面のうち端子（４０）と回路基板（１０）との接合部（６０）が当該モールド樹脂（５０）より露出する形状に成型した後に、当該接合部（６０）にて、端子（４０）と回路基板（１０）とを電気的に接合することができる。   According to such a manufacturing method of the present invention, the mold resin (50) is formed such that the joint (60) between the terminal (40) and the circuit board (10) on the other surface of the circuit board (10) is the mold resin. (50) After shape | molding in the shape exposed more, a terminal (40) and a circuit board (10) can be electrically joined in the said junction part (60).

ここで、請求項７に記載の発明のように、回路基板（１０）の他面と端子（４０）との重なり部に、導電性を有する導電性接合材（７０）を供給することによって、端子（４０）と回路基板（１０）とを電気的・機械的に接続するようにしてもよい。   Here, as in the invention described in claim 7, by supplying a conductive bonding material (70) having conductivity to the overlapping portion of the other surface of the circuit board (10) and the terminal (40), The terminal (40) and the circuit board (10) may be electrically and mechanically connected.

なお、特許請求の範囲およびこの欄で記載した各手段の括弧内の符号は、後述する実施形態に記載の具体的手段との対応関係を示す一例である。   In addition, the code | symbol in the bracket | parenthesis of each means described in the claim and this column is an example which shows a corresponding relationship with the specific means as described in embodiment mentioned later.

以下、本発明の実施形態について図に基づいて説明する。なお、以下の各実施形態相互において、互いに同一もしくは均等である部分には、説明の簡略化を図るべく、図中、同一符号を付してある。   Hereinafter, embodiments of the present invention will be described with reference to the drawings. In the following embodiments, parts that are the same or equivalent to each other are given the same reference numerals in the drawings in order to simplify the description.

（第１実施形態）
図１は、本発明の第１実施形態に係るモールドパッケージＳ１の概略断面構成を示す図であり、図２は図１中の上方から見たときの同パッケージＳ１における回路基板１０の一面を示す概略平面図、図３は図１中の下方から見たときのモールドパッケージＳ１を示す概略平面図である。 (First embodiment)
FIG. 1 is a diagram showing a schematic cross-sectional configuration of a mold package S1 according to the first embodiment of the present invention, and FIG. 2 shows one surface of a circuit board 10 in the package S1 when viewed from above in FIG. FIG. 3 is a schematic plan view showing a mold package S1 when viewed from below in FIG.

本実施形態のモールドパッケージＳ１は、大きくは、回路基板１０と、回路基板１０の一面、他面にそれぞれ搭載された電子部品２０、３０と、回路基板１０と直接に電気的に接合されたリードフレームの端子４０と、回路基板１０の一面側にてこれら回路基板１０、電子部品２０および端子４０を封止するモールド樹脂５０と、を備えて構成されたものである。   The mold package S1 of the present embodiment is roughly divided into a circuit board 10, electronic components 20 and 30 mounted on one side and the other side of the circuit board 10, respectively, and leads that are directly electrically joined to the circuit board 10. A frame terminal 40 and a mold resin 50 for sealing the circuit board 10, the electronic component 20, and the terminal 40 on one surface side of the circuit board 10 are configured.

回路基板１０は、一面（図１中の上面）および他面（図１中の下面）に部品実装可能な基板である。すなわち、回路基板１０においては、一面に電子部品２０が搭載可能な図示しないランド、他面に他の電子部品３０が搭載可能な図示しないランドが設けられ、また、これら両面には当該各ランドに電気的に接続された図示しない配線パターンが設けられており、さらに、回路基板１０の内部には、当該両面の配線パターンを導通するための図示しない内層配線が設けられている。   The circuit board 10 is a board that can be mounted on one surface (upper surface in FIG. 1) and the other surface (lower surface in FIG. 1). That is, the circuit board 10 is provided with a land (not shown) on which the electronic component 20 can be mounted on one surface, and a land (not shown) on which the other electronic component 30 can be mounted on the other surface. An electrically connected wiring pattern (not shown) is provided, and an inner layer wiring (not shown) is provided inside the circuit board 10 for conducting the wiring patterns on both sides.

このように回路基板１０は、両面に電子部品２０、３０が実装可能なものであり、セラミック基板、樹脂基板を問わない。また、図１においては、回路基板１０は多層基板とされているが、スルーホールなどにより両面が電気的に接続されている単層基板であってもかまわない。   Thus, the circuit board 10 can mount the electronic components 20 and 30 on both sides, and it does not matter whether it is a ceramic substrate or a resin substrate. In FIG. 1, the circuit board 10 is a multilayer board, but it may be a single-layer board whose both surfaces are electrically connected by through holes or the like.

回路基板１０の一面に搭載されている電子部品２０としては、ＩＣ素子や受動素子などである。これら一面側の電子部品２０は、導電性接着剤やはんだなどにより当該一面に接合固定されている。また、ＩＣ素子については、ボンディングワイヤ等により回路基板１０と電気的に接続されている。   The electronic component 20 mounted on one surface of the circuit board 10 is an IC element or a passive element. These electronic components 20 on one side are bonded and fixed to the one side with a conductive adhesive, solder, or the like. The IC element is electrically connected to the circuit board 10 by a bonding wire or the like.

また、端子４０は、一般的な銅や鉄や４２アロイなどよりなるリードフレームの端子として構成されている。この端子４０は、回路基板１０の他面側に設けられ、回路基板１０の他面と直接に電気的に接合されている。具体的には、図１、図３に示されるように、端子４０は、細長の矩形板状、いわゆる短冊形状をなしており、その端子４０の一端が回路基板１０の他面と重ね合わされ、他端は回路基板１０の端部から突出している。   The terminal 40 is configured as a lead frame terminal made of general copper, iron, 42 alloy, or the like. The terminal 40 is provided on the other surface side of the circuit board 10 and is directly electrically connected to the other surface of the circuit board 10. Specifically, as shown in FIGS. 1 and 3, the terminal 40 has an elongated rectangular plate shape, a so-called strip shape, and one end of the terminal 40 is overlapped with the other surface of the circuit board 10. The other end protrudes from the end of the circuit board 10.

また、モールド樹脂５０は、回路基板１０の一面に設けられており、当該回路基板１０の一面、当該一面側の電子部品２０、および、端子４０のうち回路基板１０の一面側に臨む面を封止している。このモールド樹脂５０は、エポキシ樹脂などの一般的なモールド材料よりなり、後述するように金型を用いたトランスファーモールド法により成型されたものである。   The mold resin 50 is provided on one surface of the circuit board 10, and seals one surface of the circuit board 10, the electronic component 20 on the one surface side, and the terminal 40 facing the one surface side of the circuit board 10. It has stopped. The mold resin 50 is made of a general mold material such as an epoxy resin, and is molded by a transfer mold method using a mold as will be described later.

ここでは、モールド樹脂５０は、回路基板１０の他面における端子４０と回路基板１０との接合部６０がモールド樹脂５０より露出する形状に成型されたものである。この接合部６０とは、端子４０と回路基板１０の他面とが重なって電気的・機械的に接合されている部位であり、この接合部６０は、モールド樹脂５０で封止されずにモールド樹脂５０より露出している。   Here, the mold resin 50 is molded into a shape in which the joint portion 60 between the terminal 40 and the circuit board 10 on the other surface of the circuit board 10 is exposed from the mold resin 50. The joint portion 60 is a portion where the terminal 40 and the other surface of the circuit board 10 overlap and are electrically and mechanically joined. The joint portion 60 is not sealed with the mold resin 50 and is molded. It is exposed from the resin 50.

そして、この接合部においては、端子４０と回路基板１０との電気的および機械的な接続は、導電性を有する導電性接合材７０により、なされている。この導電性接合材７０としては、たとえば樹脂に導電性フィラーが含有された一般的な導電性接着剤やはんだなどが、挙げられる。   And in this junction part, the electrical and mechanical connection of the terminal 40 and the circuit board 10 is made | formed by the electroconductive joining material 70 which has electroconductivity. Examples of the conductive bonding material 70 include a general conductive adhesive or solder in which a conductive filler is contained in a resin.

また、ここでは、接合部６０においては、端子４０に貫通穴４０ａを設けている。この貫通穴４０ａは、端子４０のうち回路基板６０の他面に接する面とは反対側の面から当該他面に接する面まで貫通する穴である。この貫通穴４０ａは、たとえばプレス加工やエッチングなどにより形成される。   Here, in the joint portion 60, a through hole 40 a is provided in the terminal 40. The through hole 40a is a hole that penetrates from the surface of the terminal 40 opposite to the surface that contacts the other surface of the circuit board 60 to the surface that contacts the other surface. The through hole 40a is formed by, for example, pressing or etching.

ここでは、図３に示されるように、貫通穴４０ａは開口形状が円形の穴であるが、多角形の穴などであってもよい。そして、貫通穴４０ａを介して回路基板１０の他面は露出したこの貫通穴４０ａに導電性接合部材７０を充填することによって、導電性接合部材７０は、端子４０と回路基板１０の他面との両方に跨って接触した状態となる。それによって、端子４０と回路基板１０とが電気的および機械的に接続されている。   Here, as shown in FIG. 3, the through hole 40 a is a hole having a circular opening shape, but may be a polygonal hole or the like. Then, the conductive bonding member 70 is connected to the terminal 40 and the other surface of the circuit board 10 by filling the through hole 40a with the conductive bonding member 70 exposed through the through hole 40a. It will be in the state which contacted across both. Thereby, the terminal 40 and the circuit board 10 are electrically and mechanically connected.

この導電性接合部材７０は、端子４０と回路基板１０の他面とを重なって接触させた後、この状態で、貫通穴４０ａに塗布などにより充填される。その後、加熱硬化やリフローなどの適切な熱処理を施されることにより、導電性接合部材７０による接続がなされるようになっている。   The conductive bonding member 70 is filled with the through hole 40a by coating or the like after the terminals 40 and the other surface of the circuit board 10 are brought into contact with each other. Then, the connection by the electroconductive joining member 70 is made | formed by performing appropriate heat processing, such as heat hardening and reflow.

さらに、本実施形態では、接合部６０における回路基板１０の他面に、凹部１１が設けられている。この凹部１１は、回路基板１０の厚さ方向の全体を貫通する穴ではなく、回路基板１０の厚さ方向の一部が凹んだ窪みである。   Further, in the present embodiment, the concave portion 11 is provided on the other surface of the circuit board 10 in the joint portion 60. The recess 11 is not a hole that penetrates the entire circuit board 10 in the thickness direction, but is a recess in which a part of the circuit board 10 in the thickness direction is recessed.

このような凹部１１は、プレスやエッチングなどにより形成されたものや、また、回路基板１０が多層基板の場合には、たとえば回路基板１０の他面側の表層に当該表層を貫通する穴を設けたりすることで、形成されたものであってもよい。そして、この凹部１１の内面には、図示しない導電性のメッキなどよりなる電極が設けられており、導電性接合材７０は、この凹部１１に食い込んだ状態で回路基板１０に接している。   Such a recess 11 is formed by pressing or etching, or when the circuit board 10 is a multilayer board, for example, a hole penetrating the surface layer is provided in the surface layer on the other surface side of the circuit board 10. Or may be formed. An electrode made of conductive plating or the like (not shown) is provided on the inner surface of the recess 11, and the conductive bonding material 70 is in contact with the circuit board 10 while being in the recess 11.

このように凹部１１に導電性接合材７０を食い込ませることによって、接合部６０における端子４０と回路基板１０との機械的な接合強度が向上する。特に、回路基板１０の他面に沿った方向への端子４０の機械的な接合強度が向上し、同方向へ端子４０が位置ずれしにくくなる。   In this way, by causing the conductive bonding material 70 to bite into the recess 11, the mechanical bonding strength between the terminal 40 and the circuit board 10 at the bonding portion 60 is improved. In particular, the mechanical joint strength of the terminal 40 in the direction along the other surface of the circuit board 10 is improved, and the terminal 40 is less likely to be displaced in the same direction.

また、本実施形態では、モールド樹脂５０は、さらに回路基板１０の他面のうちの上記接合部６０以外の部位が露出する形状に成型されている。ここでは、図１、図３に示されるように、回路基板１０の他面の実質的に全体が、モールド樹脂５０に封止されずにモールド樹脂５０より露出している。   Further, in the present embodiment, the mold resin 50 is molded into a shape in which a portion other than the joint portion 60 on the other surface of the circuit board 10 is exposed. Here, as shown in FIGS. 1 and 3, substantially the entire other surface of the circuit board 10 is exposed from the mold resin 50 without being sealed by the mold resin 50.

そして、本実施形態では、回路基板１０の他面においてモールド樹脂５０から露出する部位に、電子部品が搭載可能な図示しないランドが設けられている。そして、図１、図３に示されるように、このモールド樹脂５０から露出しているランドには、回路基板１０の一面側の電子部品２０とは別に、他の電子部品３０が搭載されている。   In the present embodiment, a land (not shown) on which an electronic component can be mounted is provided at a portion exposed from the mold resin 50 on the other surface of the circuit board 10. As shown in FIGS. 1 and 3, another electronic component 30 is mounted on the land exposed from the mold resin 50 in addition to the electronic component 20 on the one surface side of the circuit board 10. .

言い換えれば、本実施形態では、回路基板１０の他面には、上記接合部６０以外に他の電子部品３０が搭載される部位が設けてあり、モールド樹脂５０は、接合部６０がモールド樹脂５０より露出するとともに、さらに回路基板１０の他面のうちの他の電子部品３０が搭載される部位が露出する形状に成型されたものである。   In other words, in the present embodiment, the other surface of the circuit board 10 is provided with a portion on which the other electronic component 30 is mounted in addition to the joint portion 60. In addition to being more exposed, it is molded into a shape in which a portion on which the other electronic component 30 is mounted on the other surface of the circuit board 10 is exposed.

この他面側の他の電子部品３０は、モールド成型の圧力や温度に対して弱い電子部品が挙げられ、具体的には電解コンデンサやコンダクタンスなどが適用される。もちろん、他の電子部品３０と回路基板１０の一面側の電子部品２０とが同じ種類の電子部品であってもよい。また、回路基板１０の他面のうち上記接合部６０以外のモールド樹脂５０から露出する部位には、回路機能を検査する検査端子を設けてもよい。   Examples of the other electronic component 30 on the other side include electronic components that are weak against the molding pressure and temperature. Specifically, an electrolytic capacitor, conductance, or the like is applied. Of course, the other electronic component 30 and the electronic component 20 on the one surface side of the circuit board 10 may be the same type of electronic component. Moreover, you may provide the test | inspection terminal which test | inspects a circuit function in the site | part exposed from mold resin 50 other than the said junction part 60 among the other surfaces of the circuit board 10. FIG.

ここで、他の電子部品３０は、導電性接着剤やはんだなどにより回路基板１０の他面に電気的・機械的に接合される。また、他の電子部品３０は、図３に示されるように、回路基板１０の端部より平面的にはみ出してもよいが、平面的に回路基板１０の端部よりも内側におさまっていてもよい。   Here, the other electronic component 30 is electrically and mechanically joined to the other surface of the circuit board 10 with a conductive adhesive, solder, or the like. Further, as shown in FIG. 3, the other electronic component 30 may protrude from the end portion of the circuit board 10 in a plan view, but may be disposed inside the end portion of the circuit board 10 in a plan view. Good.

次に、本実施形態のモールドパッケージＳ１の製造方法について、図４〜図１０を参照して述べる。図４はモールド前のリードフレーム４１単体の構成を示す概略平面図、図５はモールド前の回路基板１０単体の他面側の構成を示す概略平面図、図６は、図４に示されるリードフレーム４１と図５に示される回路基板１０との組み付け工程を示す概略断面図、図７は、図６に示されるリードフレーム４１と回路基板１０との接合工程を示す概略平面図である。   Next, a method for manufacturing the mold package S1 of the present embodiment will be described with reference to FIGS. 4 is a schematic plan view showing the configuration of the lead frame 41 before molding, FIG. 5 is a schematic plan view showing the configuration of the other surface side of the circuit board 10 before molding, and FIG. 6 is the lead shown in FIG. FIG. 7 is a schematic cross-sectional view showing a process of assembling the frame 41 and the circuit board 10 shown in FIG. 5, and FIG. 7 is a schematic plan view showing a process of joining the lead frame 41 and the circuit board 10 shown in FIG.

また、図８、図９は、モールド工程を示す概略断面図であり、図８は、金型１００内のワークを端子４０にて切断した断面を示し、図９は、同ワークを端子４０と端子４０との間にて切断した断面を示している。また、図１０は、モールド工程後のワークを示す概略断面図である。   8 and 9 are schematic cross-sectional views showing the molding process. FIG. 8 shows a cross-section of the work in the mold 100 cut by the terminal 40. FIG. The cross section cut | disconnected between the terminals 40 is shown. FIG. 10 is a schematic cross-sectional view showing the work after the molding process.

まず、図４に示されるリードフレーム４１、および、図５に示される回路基板１０を用意する。図４に示されるリードフレーム４１は、多連状態のリードフレーム４１であり、端子４０の外周部に、端子４０に連結された部位である外側フレーム部４２を有する。この外側フレーム部４２は、モールド樹脂５０による封止後にカットされて除去される部位である。   First, the lead frame 41 shown in FIG. 4 and the circuit board 10 shown in FIG. 5 are prepared. A lead frame 41 shown in FIG. 4 is a multiple lead frame 41, and has an outer frame portion 42 that is a portion connected to the terminal 40 on the outer periphery of the terminal 40. The outer frame portion 42 is a portion that is cut and removed after sealing with the mold resin 50.

つまり、複数の端子４０は、貫通穴４０ａが形成されている方の端部とは反対側の端部にて外側フレーム部４２に一体に連結され、当該外側フレーム部４２に保持されている。そして、この外側フレーム部４２は、モールド樹脂５０による封止後にモールド樹脂５０より突出する部位である。このような形状のリードフレーム４１は、エッチングやプレス加工などにより容易に形成される。   In other words, the plurality of terminals 40 are integrally connected to the outer frame portion 42 at the end opposite to the end where the through hole 40 a is formed, and are held by the outer frame portion 42. The outer frame portion 42 is a portion protruding from the mold resin 50 after sealing with the mold resin 50. The lead frame 41 having such a shape is easily formed by etching or press working.

図５に示される回路基板１０は、多連状態の回路基板１０であり、複数の回路基板１０が、その外周に設けられた耳部１２によって一体に連結されている。つまり、用意される回路基板１０としては、モールド樹脂５０による封止後にモールド樹脂５０より突出する部位である耳部１２を、回路基板１０の外周部に有するものとなる。この耳部１２は、モールド樹脂５０による封止後にカットされて除去される部位である。   A circuit board 10 shown in FIG. 5 is a circuit board 10 in a multiple state, and a plurality of circuit boards 10 are integrally connected by ear portions 12 provided on the outer periphery thereof. In other words, the prepared circuit board 10 has the ear 12 that is a portion protruding from the mold resin 50 after sealing with the mold resin 50 on the outer periphery of the circuit board 10. The ear 12 is a part that is cut and removed after sealing with the mold resin 50.

そして、この回路基板１０の一面に電子部品２０を搭載する。図５では、回路基板１０の他面が示されており、当該一面側は示されていないが、この図５の状態にて、回路基板１０の一面に、上記図１や図２に示されるように、電子部品２０を搭載する。   Then, the electronic component 20 is mounted on one surface of the circuit board 10. In FIG. 5, the other surface of the circuit board 10 is shown and the one surface side is not shown, but in the state of FIG. 5, the one surface of the circuit board 10 is shown in FIG. 1 and FIG. Thus, the electronic component 20 is mounted.

次に、図６に示されるように、回路基板１０とリードフレーム４１とを重ねて組み付ける。この組み付けにおいては、回路基板１０の他面に端子４０が重なるとともに、耳部１２と外側フレーム部４２とが重なる。   Next, as shown in FIG. 6, the circuit board 10 and the lead frame 41 are assembled in an overlapping manner. In this assembly, the terminal 40 overlaps the other surface of the circuit board 10, and the ear portion 12 and the outer frame portion 42 overlap.

次に、図７に示されるように、耳部１２と外側フレーム部４２とを機械的に接合することにより、回路基板１０とリードフレーム４１とを一体化する。この接合においては、図７では、一般的な樹脂などよりなる接着剤８０を介して耳部１２と外側フレーム部４２とを接合しているが、それ以外にも、はんだ、あるいは、かしめなどにより当該両部１２、４２の接合を行ってもよい。   Next, as shown in FIG. 7, the circuit board 10 and the lead frame 41 are integrated by mechanically joining the ear part 12 and the outer frame part 42. In this joining, in FIG. 7, the ear portion 12 and the outer frame portion 42 are joined via an adhesive 80 made of a general resin or the like, but other than that, by soldering or caulking or the like. The both parts 12 and 42 may be joined.

なお、図７には、後述するモールド工程において、モールド樹脂５０で封止される領域を破線Ｋにて示してあるが、この図７に示されるように、機械的に接合された耳部１２および外側フレーム部４２は、モールド樹脂５０より突出する位置にあることが示されている。   In FIG. 7, a region sealed with the mold resin 50 in a molding process to be described later is indicated by a broken line K. As shown in FIG. 7, the mechanically joined ear portion 12 is shown. It is shown that the outer frame portion 42 and the outer frame portion 42 are in positions protruding from the mold resin 50.

続いて、一体化された回路基板１０とリードフレーム４１に対してモールド樹脂５０による封止を行う（モールド工程）。ここでは、図８、図９に示されるように、一体化された回路基板１０およびリードフレーム４１を、金型１００に設置する。この金型１００は、一般的なモールド成形用のもので、上型１１０と下型１２０とを合致させることで、これら上下型１１０、１２０の間にキャビティを形成するものである。   Subsequently, the integrated circuit board 10 and the lead frame 41 are sealed with a molding resin 50 (molding process). Here, as shown in FIGS. 8 and 9, the integrated circuit board 10 and the lead frame 41 are installed in the mold 100. The mold 100 is for general molding, and a cavity is formed between the upper and lower molds 110 and 120 by matching the upper mold 110 and the lower mold 120.

また、上型１１０には、回路基板１０を押さえつける突起１１１が設けられている。また、金型１００においては、端子４０を押さえつけるとともに（図８参照）、端子４０と端子４０の間においては（図９参照）、上下型１１０、１２０を密着させて、モールド樹脂５０が端子４０の間から回路基板１０の他面に入り込まないようにしている。そのため、上記突起１１１は無いものであってもよい。   Further, the upper mold 110 is provided with a protrusion 111 that presses down the circuit board 10. Further, in the mold 100, the terminal 40 is pressed (see FIG. 8), and the upper and lower molds 110 and 120 are brought into close contact with each other between the terminal 40 and the terminal 40 (see FIG. 9). The other surface of the circuit board 10 is prevented from entering between the gaps. Therefore, the protrusion 111 may not be provided.

この状態で、金型１００のキャビティ内にモールド樹脂５０を注入、充填することにより、回路基板１０の一面にて当該一面、当該一面側の電子部品２０、および、端子４０のうち回路基板１０の一面側に臨む面が、モールド樹脂５０にて封止されるが、回路基板１０の他面は封止されない。そして、回路基板１０の他面と端子４０との重なり部、および他の電子部品３０の搭載部分は、モールド樹脂５０より露出する。   In this state, the mold resin 50 is injected and filled in the cavity of the mold 100, so that the one surface of the circuit board 10, the electronic component 20 on the one surface side, and the terminal 40 have the circuit board 10. The surface facing the one surface side is sealed with the mold resin 50, but the other surface of the circuit board 10 is not sealed. The overlapping portion of the other surface of the circuit board 10 and the terminal 40 and the mounting portion of the other electronic component 30 are exposed from the mold resin 50.

こうして、モールド工程が完了した後、ワークを金型１００より取り出し、次に、一般的なダイシングカットなどによって、ワークを個々のパッケージ単位に個片化する。このとき、モールド樹脂５０より突出する耳部１２および外側フレーム部４２を、カットして除去する。ここまでの状態のワークが図１０に示される。   Thus, after the molding process is completed, the workpiece is taken out from the mold 100, and then the workpiece is divided into individual package units by general dicing cut or the like. At this time, the ear 12 and the outer frame 42 protruding from the mold resin 50 are cut and removed. The workpiece up to this point is shown in FIG.

そして、回路基板１０の他面にて、他の電子部品３０を搭載した後、回路基板１０の他面と端子４０との重なり部に、導電性接合材７０を供給する。ここでは、上記貫通穴４０ａに導電性接合部材７０を充填する。この導電性接合部材４０の供給によって、端子４０と回路基板１０とを電気的・機械的に接続する。   Then, after mounting the other electronic component 30 on the other surface of the circuit board 10, the conductive bonding material 70 is supplied to the overlapping portion between the other surface of the circuit board 10 and the terminal 40. Here, the conductive bonding member 70 is filled in the through hole 40a. By supplying the conductive bonding member 40, the terminal 40 and the circuit board 10 are electrically and mechanically connected.

こうして、上記図１に示される本実施形態のモールドパッケージＳ１ができあがる。なお、端子４０と回路基板１０とを電気的・機械的に接続した後に、回路基板１０の他面に他の電子部品３０を搭載するようにしてもよい。   Thus, the mold package S1 of the present embodiment shown in FIG. 1 is completed. In addition, after the terminal 40 and the circuit board 10 are electrically and mechanically connected, another electronic component 30 may be mounted on the other surface of the circuit board 10.

ところで、本実施形態によれば、モールド樹脂５０を、回路基板１０の他面のうち端子４０と回路基板１０との接合部６０がモールド樹脂５０より露出する形状に成型したものとしているので、モールド樹脂５０の封止後に、当該接合部６０にて、端子４０と回路基板１０とを電気的に接合することができる。   By the way, according to the present embodiment, the mold resin 50 is molded into a shape in which the joint 60 between the terminal 40 and the circuit board 10 is exposed from the mold resin 50 on the other surface of the circuit board 10. After sealing the resin 50, the terminal 40 and the circuit board 10 can be electrically bonded at the bonding portion 60.

なお、図１、図３では、回路基板１０の他面に他の電子部品３０が搭載されているが、この他の電子部品３０は無いものであってもよい。つまり、回路基板１０の他面には、端子４０が接続されているのみの構成であってもよい。   In FIG. 1 and FIG. 3, another electronic component 30 is mounted on the other surface of the circuit board 10, but the other electronic component 30 may not be provided. That is, a configuration in which only the terminal 40 is connected to the other surface of the circuit board 10 may be employed.

（第２実施形態）
図１１は、本発明の第２実施形態に係るモールドパッケージの概略断面構成を示す図である。図１１に示されるように、端子４０におけるアウターリード部に、電子部品３１を搭載してもよい。 (Second Embodiment)
FIG. 11 is a diagram showing a schematic cross-sectional configuration of a mold package according to the second embodiment of the present invention. As shown in FIG. 11, the electronic component 31 may be mounted on the outer lead portion of the terminal 40.

この電子部品３１としては、コンデンサ、抵抗素子、ミニモールド素子などが挙げられ、電子部品３１と端子４０とは、導電性接着剤やはんだ、あるいはボンディングワイヤなどにより電気的・機械的に接続される。   Examples of the electronic component 31 include a capacitor, a resistance element, and a mini-mold element. The electronic component 31 and the terminal 40 are electrically and mechanically connected by a conductive adhesive, solder, a bonding wire, or the like. .

（第３実施形態）
図１２は、本発明の第３実施形態に係るモールドパッケージの概略断面構成を示す図である。本実施形態は、上記第１及び第２の各実施形態に組み合わせて適用が可能であるが、ここでは、上記第１実施形態との相違点を中心に述べる。 (Third embodiment)
FIG. 12 is a diagram showing a schematic cross-sectional configuration of a mold package according to the third embodiment of the present invention. Although this embodiment can be applied in combination with the first and second embodiments described above, here, differences from the first embodiment will be mainly described.

図１２に示されるように、本実施形態のモールドパッケージでは、回路基板１０の他面側にて、端子４０のうちの接合部６０以外の部位がモールド樹脂５０で封止されている。この回路基板１０の他面における端子４０のモールドについては、金型の形状を変更することにより容易に行える。   As shown in FIG. 12, in the mold package of the present embodiment, the part other than the joint portion 60 of the terminals 40 is sealed with the mold resin 50 on the other surface side of the circuit board 10. The molding of the terminals 40 on the other surface of the circuit board 10 can be easily performed by changing the shape of the mold.

そして、本実施形態によれば、端子４０が、導電性接合材７０以外にもモールド樹脂５０によって機械的に支持されるので、接合部５０の補強がなされ、端子４０の接合信頼性の向上が期待できる。   According to this embodiment, since the terminal 40 is mechanically supported by the mold resin 50 in addition to the conductive bonding material 70, the bonding portion 50 is reinforced, and the bonding reliability of the terminal 40 is improved. I can expect.

（第４実施形態）
図１３は、本発明の第４実施形態に係るモールドパッケージの概略断面構成を示す図である。本実施形態は、上記第１〜第３の各実施形態に組み合わせて適用が可能であるが、ここでは、上記第１実施形態との相違点を中心に述べる。 (Fourth embodiment)
FIG. 13 is a diagram showing a schematic cross-sectional configuration of a mold package according to the fourth embodiment of the present invention. Although this embodiment can be applied in combination with the first to third embodiments, here, differences from the first embodiment will be mainly described.

図１３に示されるように、本実施形態のモールドパッケージでは、端子４０のうちの接合部６０以外の部位に、当該接合部６０以外の部位における他の部位よりも細い部位４３が設けられている。   As shown in FIG. 13, in the mold package of the present embodiment, a portion 43 of the terminal 40 other than the joint portion 60 is provided with a portion 43 that is narrower than other portions of the portion other than the joint portion 60. .

つまり、端子４０のうちの接合部６０は、導電性接合材７０が配置されている部位であり、端子４０のうちの接合部６０以外の部位とは、導電性接合材７０から外れた位置にある端子４０の部位である。そして、この細い部位４３は、端子４０のうちの接合部６０以外の部位の中で最も細くなっている部位である。   That is, the joint portion 60 of the terminal 40 is a portion where the conductive bonding material 70 is disposed, and a portion other than the joint portion 60 of the terminal 40 is at a position away from the conductive bonding material 70. This is a part of a certain terminal 40. The thin portion 43 is the thinnest portion of the terminals 40 other than the joint portion 60.

さらに、当該細い部位４３とは、端子４０の厚さ方向に薄くなっているものでもよいし、端子４０の幅方向に細くなっているものであってもよい。このような細い部位４３は、エッチングやプレス加工などにより容易に形成できる。   Further, the thin portion 43 may be thin in the thickness direction of the terminal 40 or may be thin in the width direction of the terminal 40. Such a thin portion 43 can be easily formed by etching or pressing.

本実施形態によれば、端子４０を介して接合部６０に加わる応力が、この細い部位４３にて緩和され低減される。その結果として、接合部６０における接合信頼性の向上が期待できる。つまり、当該細い部位４３は、端子４０における応力緩和部４３として構成されている。   According to the present embodiment, the stress applied to the joint portion 60 via the terminal 40 is relaxed and reduced at the thin portion 43. As a result, an improvement in bonding reliability at the bonding portion 60 can be expected. That is, the thin portion 43 is configured as the stress relaxation portion 43 in the terminal 40.

なお、上記図１１、図１２、図１３では、上記図１に示されるように、回路基板１０の他面に他の電子部品３０が搭載されていないが、これら図１１〜１３においても、回路基板１０の他面に、上記同様の他の電子部品３０が搭載されていてもよい。   11, 12, and 13, as shown in FIG. 1, no other electronic component 30 is mounted on the other surface of the circuit board 10. Another electronic component 30 similar to the above may be mounted on the other surface of the substrate 10.

（第５実施形態）
図１４は、本発明の第５実施形態に係るモールドパッケージの概略断面構成を示す図である。本実施形態は、上記の各実施形態に組み合わせて適用が可能であるが、ここでは、上記第１実施形態との相違点を中心に述べる。 (Fifth embodiment)
FIG. 14 is a diagram showing a schematic cross-sectional configuration of a mold package according to the fifth embodiment of the present invention. Although this embodiment can be applied in combination with each of the above-described embodiments, here, differences from the first embodiment will be mainly described.

図１４に示されるように、本実施形態のモールドパッケージでは、回路基板１０の他面に搭載されている他の電子部品３０の信頼性向上を図るため、エポキシ樹脂などよりなる保護材９０で、他の電子部品３０を封止している。この保護材９０は、他の電子部品９０の搭載後に、ポッティングなどにより配置できる。   As shown in FIG. 14, in the mold package of the present embodiment, in order to improve the reliability of other electronic components 30 mounted on the other surface of the circuit board 10, a protective material 90 made of epoxy resin or the like is used. Other electronic components 30 are sealed. The protective material 90 can be disposed by potting after mounting the other electronic component 90.

（他の実施形態）
なお、上記各実施形態では、モールド樹脂５０より露出する端子４０と回路基板１０との接合部６０では、端子４０に貫通穴４０ａを設け、その貫通穴４０ａに導電性接合部材７０を充填して、端子４０と回路基板１０とを電気的および機械的に接続していたが、この貫通穴４０ａは無いものであってもよい。たとえば、単純に、互いに接触して対向する端子４０と回路基板１０とを導電性接合材７０で封止することで当該両部１０、４０の接続を行ってもよい。 (Other embodiments)
In each of the above embodiments, in the joint portion 60 between the terminal 40 exposed from the mold resin 50 and the circuit board 10, the terminal 40 is provided with a through hole 40 a and the through hole 40 a is filled with the conductive joint member 70. The terminal 40 and the circuit board 10 are electrically and mechanically connected, but the through hole 40a may be omitted. For example, the terminals 10 and 40 may be simply connected by sealing the terminal 40 and the circuit board 10 facing each other and contacting each other with the conductive bonding material 70.

また、上記各実施形態では、回路基板１０の他面のうち接合部６０に位置する部位に、上記凹部１１を設け、この凹部１１に導電性接合材７０を食い込ませることで、接合部６０の機械的強度の向上を図っていたが、当該機械的強度が確保されるならば、この凹部１１は省略してもよい。   Moreover, in each said embodiment, the said recessed part 11 is provided in the site | part located in the junction part 60 among the other surfaces of the circuit board 10, and the electrically conductive joining material 70 bites into this recessed part 11, Therefore Although the mechanical strength has been improved, the concave portion 11 may be omitted if the mechanical strength is ensured.

さらに、接合部６０における端子４０と回路基板１０との電気的および機械的な接続は、上記導電性接合材７０に限定されるものではなく、たとえば、端子４０と回路基板１０の図示しない電極と溶接などにより接合することで行ってもよい。   Furthermore, the electrical and mechanical connection between the terminal 40 and the circuit board 10 at the joint 60 is not limited to the conductive joint material 70. For example, the terminal 40 and an electrode (not shown) of the circuit board 10 may be connected. You may carry out by joining by welding etc.

また、回路基板１０の他面のうちモールド樹脂５０より露出する部位に、他の電子部品３０が搭載されていたが、他の電子部品３０に代えて、当該部位には、ヒートシンクに代表される放熱板などが接続されていてもよい。   In addition, the other electronic component 30 is mounted on a portion of the other surface of the circuit board 10 that is exposed from the mold resin 50. Instead of the other electronic component 30, the portion is represented by a heat sink. A heat sink or the like may be connected.

また、回路基板１０として、ビルドアップ基板を用いてもよい。この場合、層間接続のビアの凹みをアンカーとして利用することができ、回路基板１０とモールド樹脂５０との密着性の向上が期待できる。   Further, a build-up board may be used as the circuit board 10. In this case, the recess of the interlayer connection via can be used as an anchor, and improvement in adhesion between the circuit board 10 and the mold resin 50 can be expected.

また、上記第１実施形態では、多連のリードフレーム４１および多連の回路基板１０を組み付け、これを一括して樹脂封止した後にカットして個片化するというコスト的に有利なＭＡＰ（Ｍｏｌｄ Ａｒｒａｙ Ｐａｃｋａｇｅ）成形技術によりパッケージを製造したが、これに限定するものではなく、たとえば樹脂封止は予め１個のパッケージ単位に個片化されたワークについて行うようにしてもよい。   Further, in the first embodiment, the multiple lead frames 41 and the multiple circuit boards 10 are assembled, collectively sealed with resin, and then cut and separated into individual pieces. Although the package is manufactured by the Mold Array Package) molding technique, the present invention is not limited to this. For example, the resin sealing may be performed on a work piece separated in advance into one package unit.

また、上記実施形態では、モールド樹脂５０の成形時に回路基板１０の一面を、金型１００の上記突起１１１で押さえつけるため、成形後には当該突起１１１に対応した凹部がモールド樹脂５０に形成される。ここにおいて、当該突起の位置を変更することにより、モールド樹脂５０の凹部を無くすようにしてもよい。   In the above embodiment, since one surface of the circuit board 10 is pressed by the projection 111 of the mold 100 when the mold resin 50 is molded, a recess corresponding to the projection 111 is formed in the mold resin 50 after molding. Here, you may make it eliminate the recessed part of the mold resin 50 by changing the position of the said protrusion.

また、回路基板１０がその内部に内層配線を有するものである場合、回路基板１０の他面のうち端子４０と重なる部位において、基板の厚さ方向の一部まで凹んだ溝を形成し、その溝に端子４０を挿入してもよい。この場合、当該溝内にて端子４０と回路基板１０の内層配線とを導電性接合部材によって接続するようにする。また、このとき、当該溝の深さと端子４０の厚さとをほぼ同一にすれば、端子４０の保持性が向上し、また、モールド樹脂５０の成形において、回路基板１０の他面側への樹脂漏れを抑制できる。   Further, when the circuit board 10 has an inner layer wiring inside thereof, a groove that is recessed to a part in the thickness direction of the board is formed in a portion overlapping the terminal 40 on the other surface of the circuit board 10, The terminal 40 may be inserted into the groove. In this case, the terminal 40 and the inner layer wiring of the circuit board 10 are connected by the conductive bonding member in the groove. At this time, if the depth of the groove and the thickness of the terminal 40 are substantially the same, the holding property of the terminal 40 is improved, and the resin to the other surface side of the circuit board 10 is formed in the molding of the molding resin 50. Leakage can be suppressed.

本発明の第１実施形態に係るモールドパッケージの概略断面図である。It is a schematic sectional drawing of the mold package which concerns on 1st Embodiment of this invention. 図１中のモールドパッケージにおける回路基板の一面を示す概略平面図である。It is a schematic plan view which shows one surface of the circuit board in the mold package in FIG. 図１中のモールドパッケージの下視概略平面図である。FIG. 2 is a schematic plan view of the mold package in FIG. 1 as viewed from below. モールド前の多連状態のリードフレーム単体の構成を示す概略平面図である。It is a schematic plan view which shows the structure of the lead frame single-piece | unit of the multiple state before a mold. モールド前の多連状態の回路基板単体における他面側の構成を示す概略平面図である。It is a schematic plan view which shows the structure of the other surface side in the circuit board single-piece | unit of the multiple state before a mold. リードフレームと回路基板との組み付け工程を示す概略断面図である。It is a schematic sectional drawing which shows the assembly | attachment process of a lead frame and a circuit board. リードフレームと回路基板との接合工程を示す概略平面図である。It is a schematic plan view which shows the joining process of a lead frame and a circuit board. 金型内のワークを端子にて切断した断面によってモールド工程を示す概略断面図である。It is a schematic sectional drawing which shows a mold process by the cross section which cut | disconnected the workpiece | work in a metal mold | die with a terminal. 金型内のワークを端子間にて切断した断面によってモールド工程を示す概略断面図である。It is a schematic sectional drawing which shows a mold process by the cross section which cut | disconnected the workpiece | work in a metal mold | die between terminals. モールド工程後のワークを示す概略断面図である。It is a schematic sectional drawing which shows the workpiece | work after a molding process. 本発明の第２実施形態に係るモールドパッケージの概略断面図である。It is a schematic sectional drawing of the mold package which concerns on 2nd Embodiment of this invention. 本発明の第３実施形態に係るモールドパッケージの概略断面図である。It is a schematic sectional drawing of the mold package which concerns on 3rd Embodiment of this invention. 本発明の第４実施形態に係るモールドパッケージの概略断面図である。It is a schematic sectional drawing of the mold package which concerns on 4th Embodiment of this invention. 本発明の第５実施形態に係るモールドパッケージの概略断面図である。It is a schematic sectional drawing of the mold package which concerns on 5th Embodiment of this invention.

符号の説明Explanation of symbols

１０ 回路基板
１１ 凹部
１２ 耳部
２０ 電子部品
３０ 他の電子部品
４０ 端子
４０ａ 貫通穴
４１ リードフレーム
４２ 外側フレーム部
４３ 細い部位
５０ モールド樹脂
６０ 接合部
７０ 導電性接合材
９０ 保護材 DESCRIPTION OF SYMBOLS 10 Circuit board 11 Recessed part 12 Ear part 20 Electronic component 30 Other electronic parts 40 Terminal 40a Through hole 41 Lead frame 42 Outer frame part 43 Narrow part 50 Mold resin 60 Joining part 70 Conductive joining material 90 Protective material

Claims (7)

回路基板（１０）と、
前記回路基板（１０）の一面に搭載された電子部品（２０）と、
前記回路基板（１０）と直接に電気的に接合されたリードフレームの端子（４０）と、
前記回路基板（１０）、前記電子部品（２０）、前記端子（４０）を封止するモールド樹脂（５０）と、を備えるモールドパッケージにおいて、
前記端子（４０）は前記回路基板（１０）の他面に接合されており、
前記モールド樹脂（５０）は、前記回路基板（１０）の前記他面における前記端子（４０）と前記回路基板（１０）との接合部（６０）が当該モールド樹脂（５０）より露出する形状に成型されたものであり、
このモールド樹脂（５０）より露出する前記接合部（６０）では、前記端子（４０）と前記回路基板（１０）とが電気的および機械的に接続されていることを特徴とするモールドパッケージ。 A circuit board (10);
An electronic component (20) mounted on one surface of the circuit board (10);
A lead frame terminal (40) directly electrically joined to the circuit board (10);
In a mold package comprising the circuit board (10), the electronic component (20), and a mold resin (50) for sealing the terminal (40),
The terminal (40) is bonded to the other surface of the circuit board (10),
The mold resin (50) is shaped so that the joint (60) between the terminal (40) and the circuit board (10) on the other surface of the circuit board (10) is exposed from the mold resin (50). Is molded,
The mold package, wherein the terminal (40) and the circuit board (10) are electrically and mechanically connected at the joint (60) exposed from the mold resin (50). 前記接合部（６０）では、導電性を有する導電性接合材（７０）により前記端子（４０）と前記回路基板（１０）とが電気的および機械的に接続されており、
前記回路基板（１０）の前記他面のうち前記接合部（６０）に位置する部位には、当該回路基板（１０）の厚さ方向の一部が凹んだ凹部（１１）が設けられており、前記導電性接合材（７０）は、前記凹部（１１）に食い込んで設けられていることを特徴とする請求項１に記載のモールドパッケージ。 In the joint portion (60), the terminal (40) and the circuit board (10) are electrically and mechanically connected by a conductive joint material (70) having conductivity,
A portion of the other surface of the circuit board (10) located at the joint (60) is provided with a recess (11) in which a part of the circuit board (10) in the thickness direction is recessed. The mold package according to claim 1, wherein the conductive bonding material (70) is provided so as to bite into the recess (11). 前記モールド樹脂（５０）は、前記接合部（６０）が当該モールド樹脂（５０）より露出するとともに、さらに前記回路基板（１０）の前記他面のうちの前記接合部（６０）以外の部位が露出する形状に成型されており、
当該回路基板（１０）の前記他面のうちの前記接合部（６０）以外の部位には、前記回路基板（１０）の前記一面に設けられている前記電子部品（２０）とは別に、他の電子部品（３０）が搭載されていることを特徴とする請求項１または２に記載のモールドパッケージ。 In the mold resin (50), the joint portion (60) is exposed from the mold resin (50), and a portion other than the joint portion (60) on the other surface of the circuit board (10) is further provided. It is molded into an exposed shape,
Apart from the electronic component (20) provided on the one surface of the circuit board (10), the other surface of the circuit board (10) other than the joint (60) The mold package according to claim 1, wherein the electronic component is mounted. 前記回路基板（１０）の前記他面側にて、前記端子（４０）のうちの前記接合部（６０）以外の部位が前記モールド樹脂（５０）で封止されていることを特徴とする請求項１ないし３のいずれか１つに記載のモールドパッケージ。   A part of the terminal (40) other than the joint (60) is sealed with the mold resin (50) on the other surface side of the circuit board (10). Item 4. The mold package according to any one of Items 1 to 3. 前記端子（４０）のうちの前記接合部（６０）以外の部位には、当該接合部（６０）以外の部位における他の部位よりも細い部位（４３）が設けられていることを特徴とする請求項１ないし４のいずれか１つに記載のモールドパッケージ。   Of the terminal (40), a portion other than the joint portion (60) is provided with a portion (43) that is thinner than other portions in the portion other than the joint portion (60). The mold package according to any one of claims 1 to 4. 回路基板（１０）の一面に電子部品（２０）を搭載し、前記回路基板（１０）とリードフレーム（４１）の端子（４０）とを直接に電気的に接合するとともに、前記回路基板（１０）、前記電子部品（２０）、前記端子（４０）をモールド樹脂（５０）で封止するようにしたモールドパッケージの製造方法において、
前記回路基板（１０）として、前記モールド樹脂（５０）による封止後に前記モールド樹脂（５０）より突出する部位である耳部（１２）を、当該回路基板（１０）の外周部に有するものを用意し、
前記リードフレーム（４１）として、前記端子（４０）の外周部に、当該端子（４０）に連結された部位であって前記モールド樹脂（５０）による封止後に前記モールド樹脂（５０）より突出する部位である外側フレーム部（４２）を有するものを用意し、
前記回路基板（１０）の前記一面に前記電子部品（２０）を搭載し、
前記回路基板（１０）の他面に前記端子（４０）が重なるように、前記回路基板（１０）と前記リードフレーム（４１）とを重ねて、前記耳部（１２）と前記外側フレーム部（４２）とを機械的に接合することにより、前記回路基板（１０）と前記リードフレーム（４１）とを一体化し、
続いて、前記一体化された回路基板（１０）と前記リードフレーム（４１）に対して前記モールド樹脂（５０）による封止を行うとともに、この封止においては、前記回路基板（１０）の前記他面と前記端子（４０）との重なり部を前記モールド樹脂（５０）より露出させるようにし、
次に、前記モールド樹脂（５０）より突出する前記耳部（１２）および前記外側フレーム部（４２）を、カットして除去し、
しかる後、前記回路基板（１０）の前記他面と前記端子（４０）との重なり部にて、前記端子（４０）と前記回路基板（１０）とを電気的・機械的に接続することを特徴とするモールドパッケージの製造方法。 The electronic component (20) is mounted on one surface of the circuit board (10), and the circuit board (10) and the terminal (40) of the lead frame (41) are directly electrically connected, and the circuit board (10). ), In the mold package manufacturing method in which the electronic component (20) and the terminal (40) are sealed with a mold resin (50).
The circuit board (10) has an ear part (12) that protrudes from the mold resin (50) after sealing with the mold resin (50) on the outer peripheral part of the circuit board (10). Prepare
As the lead frame (41), the outer periphery of the terminal (40) is a portion connected to the terminal (40) and protrudes from the mold resin (50) after sealing with the mold resin (50). Prepare an outer frame part (42) that is a part,
Mounting the electronic component (20) on the one surface of the circuit board (10);
The circuit board (10) and the lead frame (41) are overlapped so that the terminal (40) overlaps the other surface of the circuit board (10), and the ear part (12) and the outer frame part ( 42) and mechanically joining the circuit board (10) and the lead frame (41),
Subsequently, the integrated circuit board (10) and the lead frame (41) are sealed with the mold resin (50), and in this sealing, the circuit board (10) of the circuit board (10) is sealed. An overlapping portion between the other surface and the terminal (40) is exposed from the mold resin (50),
Next, the ear portion (12) and the outer frame portion (42) protruding from the mold resin (50) are cut and removed,
Thereafter, the terminal (40) and the circuit board (10) are electrically and mechanically connected at an overlapping portion between the other surface of the circuit board (10) and the terminal (40). A method for manufacturing a molded package. 前記回路基板（１０）の前記他面と前記端子（４０）との重なり部に、導電性を有する導電性接合材（７０）を供給することによって、前記端子（４０）と前記回路基板（１０）とを電気的・機械的に接続することを特徴とする請求項６に記載のモールドパッケージの製造方法。   By supplying a conductive bonding material (70) having conductivity to the overlapping portion between the other surface of the circuit board (10) and the terminal (40), the terminal (40) and the circuit board (10) are supplied. The method for manufacturing a mold package according to claim 6, wherein the method is electrically and mechanically connected.
JP2008307297A 2008-12-02 2008-12-02 Mold package and manufacturing method thereof Expired - Fee Related JP5093076B2 (en)

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