JPH0927583A - Semiconductor integrated circuit device and its manufacture - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor integrated circuit device which enhances a sealing property, standardizes a lead frame and lowers costs and to provide its manufacturing method. SOLUTION: A semiconductor integrated circuit device is composed of a printed-circuit board 2 which comprises wiring parts 2a on which terminal parts 2e are formed so as to be arranged at outer circumferential parts 2a on at least one face out of the surface 2b or the rear 2c, of a semiconductor chip 1 which is mounted on the printed-circuit board 2 so as to leave the terminal parts 2e, of a resin member 3 which resin-seals its peripheral part 1a and of outer leads 4a whose surface is plated in advance and which are connected to the terminal parts 2e. The semiconductor chip 1 is resin-sealed on the printed- circuit board 2, and the outer leads 4a are then connected to the printed-circuit board 2.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor integrated circuit device and a manufacturing technique thereof, and more particularly to a semiconductor integrated circuit device sealed with resin and a manufacturing method thereof.

[0002]

2. Description of the Related Art The technology described below studies the present invention,
The present invention was studied by the present inventors upon completion, and its outline is as follows.

In electronic equipment, computers, and the like, there is a demand for higher speed and higher integration of semiconductor integrated circuit devices as they become smaller, lighter, and more sophisticated.

As an example of a semiconductor integrated circuit device that meets the above requirements, a resin-sealed semiconductor integrated circuit device called QFP (Quad Flat Package) is known. This Q
In the FP, the lead frame has a gull wing shape.

Here, the main manufacturing method of the semiconductor integrated circuit device will be described. First, a semiconductor element is mounted on a lead frame, then resin sealing is performed, and then,
The outer leads of the lead frame are externally plated, and finally the outer leads are cut and formed.

Regarding QFP, for example, 199
May 31, 2013, published by Nikkei BP, Shin Kayama, Kunihiko Naruse (Director) "Practical course VLSI packaging technology (above)"
82-84.

[0007]

However, in the above-mentioned technique, there is a problem that the number of types of lead frames increases because the size of the semiconductor element, the wire bonding technique, or the resin sealing technique is limited. As a result, there is a problem that the price of the lead frame is improved.

Therefore, an object of the present invention is to provide a semiconductor integrated circuit device which improves the sealing property, standardizes the lead frame and reduces the cost, and a manufacturing method thereof.

The above and other objects and novel features of the present invention will become apparent from the description of the present specification and the accompanying drawings.

[0010]

SUMMARY OF THE INVENTION Among the inventions disclosed in the present application, the outline of a representative one will be briefly described.
It is as follows.

That is, the semiconductor integrated circuit device according to the present invention has an insulating substrate having a wiring portion and provided with a terminal portion arranged on the outer peripheral portion of at least one of the front and back surfaces, and the terminal portion remaining. A semiconductor element mounted on the insulating substrate and a peripheral member for sealing the semiconductor element, and an external lead having a surface plated in advance and connected to the terminal portion, and the semiconductor on the insulating substrate. After sealing the element, the external lead is connected to the insulating substrate.

Further, the semiconductor integrated circuit device according to the present invention has an insulating substrate having a wiring portion and provided with a terminal portion arranged on the outer peripheral portion of at least one of the front and back surfaces, and the terminal portion remaining. A semiconductor element mounted on the insulating substrate and a resin member for sealing the peripheral portion thereof with a resin, and an external lead having a surface plated in advance and connected to the terminal portion, and the semiconductor on the insulating substrate. After the element is sealed with resin, the external leads are connected to the insulating substrate.

Further, in the semiconductor integrated circuit device according to the present invention, the insulating substrate has at least one through hole at a sealing portion thereof and is formed in a multiple frame shape.

The external leads of the semiconductor integrated circuit device according to the present invention are lead frames whose surfaces are preliminarily plated with a conductive material such as solder.

In the method for manufacturing a semiconductor integrated circuit device according to the present invention, after mounting the semiconductor element on the insulating substrate, the electrodes on the semiconductor element and the wiring portion are electrically connected by a conductive member, After arranging the insulating substrate at a predetermined position of a mold for resin-sealing the semiconductor element and its peripheral portion, resin-sealing is performed on the insulating substrate except for the portion where the terminal portion is left, After the completion, the external lead having the surface plated in advance is connected to the terminal portion and the external lead is cut and formed.

[0016]

According to the above-mentioned means, since the semiconductor element is mounted on the insulating substrate and the sealing is performed on the insulating substrate, movement of the sealing member at the time of sealing, especially at the time of resin sealing. The flow of the resin can be rectified. Thereby, the deformation of the bonding wire can be suppressed,
Further, the position movement of the semiconductor element can be prevented.

As a result, the sealing property, particularly the resin sealing property, can be improved.

Further, since the wiring portion can be bonded on the insulating substrate having rigidity, the bondability can be improved.

Since the resin sealing property and the bonding property can be improved, and the insulating substrate is formed in a multi-frame shape, standardization of the pattern of the insulating substrate and its wiring portion and cost reduction are achieved. Can be achieved.

Further, since the lead frame is formed only by the outer leads which are external leads, the number of types of lead frames can be reduced.

Further, since the insulating substrate is a composite laminated board formed of epoxy-based or polyimide-based resin or ceramic, when the semiconductor integrated circuit device is mounted on a resin- or ceramic-based mounting substrate, the insulating substrates are mutually The material can be a resin or ceramic material.

Further, since at least the surface of the external lead in the lead frame is pre-plated, the exterior plating step of the lead frame after sealing can be eliminated.

During resin sealing, a gap is formed by the step between the wiring portion and the portion of the insulating substrate where the wiring portion is not formed, at the portion where the mold is clamped to the insulating substrate. As a result, an air vent effect of letting air in the resin member to be sealed escape is created, and it is possible to reduce internal voids and improve the yield.

[0024]

Embodiments of the present invention will be described below in detail with reference to the drawings.

FIG. 1 is a sectional view showing an embodiment of the structure of a semiconductor integrated circuit device according to the present invention, FIG. 2 is a plan view showing an embodiment of the structure of a semiconductor integrated circuit device according to the present invention, and FIG. 5 is a partial plan view showing an embodiment of the structure of the insulating substrate in the semiconductor integrated circuit device of FIG. 4, FIG. 4 is a partial plan view showing the embodiment of the structure of the lead frame in the semiconductor integrated circuit device of the present invention, and FIG. 6 is a partial sectional view showing an embodiment of a method for manufacturing a semiconductor integrated circuit device according to the present invention, and FIG. 6 is a partial sectional view showing an embodiment of a method for manufacturing a semiconductor integrated circuit device according to the present invention.

The structure of the semiconductor integrated circuit device according to the present embodiment will be described. The front surface 2b or the back surface 2c having the wiring portion 2a (in this embodiment, the mounting substrate side on which the semiconductor integrated circuit device is mounted is the back surface 2c, and vice versa). The printed board 2 is an insulating board provided with a terminal portion 2e disposed on the outer peripheral portion 2d of at least one of the surfaces 2b) and the printed circuit board 2 except for the terminal portion 2e. Semiconductor chip 1 which is a semiconductor element and its peripheral portion 1
The semiconductor chip 1 is resin-sealed on the printed circuit board 2, which is composed of a resin member 3 for resin-sealing a and an outer lead 4a which is an external lead whose surface is plated in advance and which is connected to the terminal portion 2e. After that, the outer leads 4a are connected to the printed circuit board 2.

Here, the printed board 2 which is an insulating board
Is also called a PCB (Printed Circuited Board), and as shown in FIGS. 1 to 3, a tab 2g for mounting the semiconductor chip 1 is provided in the vicinity of the center of the printed circuit board body 2f, and further around it. Is a wiring part 2 such as a wiring pattern
a is formed.

The wiring portion 2a has an inner lead terminal 2h at the tip near the tab 2g, and a terminal portion 2e for connecting the outer lead 4a at the tip near the outer peripheral portion 2d.

Here, the terminal portion 2e is plated with solder or the like, and the thickness of the wiring portion 2a is 30 to 40 μm.
m.

The wiring portion 2a and the inner lead terminal 2h
Alternatively, the terminal portion 2e may be provided on both the front surface 2b and the back surface 2c of the printed board 2. in this case,
The wiring portions 2a on both the front and back surfaces can be electrically connected through the through-hole portion 2i provided in the wiring portion 2a and having a wiring pattern formed therein.

Further, as shown in FIG. 3, the printed circuit board 2 of the present embodiment has a plurality of printed circuit board body portions 2f formed in a multi-frame shape. That is, the plurality of printed circuit board main body portions 2f are arranged in a continuous manner with the slit portions 2k provided around the printed circuit board main body portions 2f as boundaries.

Further, the printed board 2 has at least one through hole 2j at a sealing portion sealed by the resin member 3 (see FIG. 1). The through hole 2j is provided as a passage of the resin member 3 so that the resin member 3 is spread over both front and back surfaces of the printed circuit board 2 at the time of resin sealing, and preferably a plurality of through holes 2j are provided. .

Further, the printed board 2 is a composite laminated board formed of a resin such as an epoxy type or a polyimide type or a ceramic.

Further, the lead frame 4 of this embodiment has only outer leads 4a which are external leads, as shown in FIG. Therefore, the plurality of outer leads 4a are formed in a multiple frame shape.

Although at least the outer leads 4a of the lead frame 4 are externally plated with solder or Pd in advance, the entire lead frame 4 may be externally plated.

Furthermore, the lead frame 4 of this embodiment is
The outer lead 4a is cut and bent after it is connected to the printed circuit board 2.
It is also possible to use the lead frame 4 that has been previously bent and formed into a desired shape.

Further, in the semiconductor integrated circuit device of this embodiment, the semiconductor chip 1 is the tab 2g on the printed board 2.
It is fixed to a conductive or non-conductive adhesive or the like.

Further, the electrode 1b on the semiconductor chip 1 is
It is electrically connected to the inner lead terminal 2h of the wiring portion 2a by a bonding wire 5 which is a conductive member made of gold or aluminum.

Further, the semiconductor chip 1 and its peripheral portion 1
That is, a, that is, the semiconductor chip 1, the bonding wires 5, the inner lead terminals 2h, and the local portions of the wiring portions 2a are resin-sealed by the thermosetting resin member 3.

However, in the outer peripheral portion 2d of the printed circuit board 2, the terminal portion 2e arranged at the tip of the wiring portion 2a is not resin-sealed.

The inner lead terminal 2h arranged at the other end of the wiring portion 2a may be electrically connected to an external device (for example, a mounting board on which a semiconductor integrated circuit device is mounted or another measuring device). Good.

Next, a method of manufacturing the semiconductor integrated circuit device of this embodiment will be described.

First, a printed board 2 is prepared which is an insulating board on which a wiring pattern, that is, a wiring portion 2a is formed by etching or the like, and whose outer shape is processed by a press or a router.

Further, the semiconductor chip 1 is mounted on the tab 4 of the printed board 2 and fixed by an adhesive or the like, and subsequently, the electrode 1b on the semiconductor chip 1 and the inner lead terminal 2h of the wiring portion 2a are bonded to each other by the bonding wire 5. To connect electrically.

After that, the printed circuit board 2 is placed on a predetermined portion of a mold 6 for resin-sealing the semiconductor chip 1 and its peripheral portion 1a.
Place.

At this time, the mold 6 is such that the inside of the mold 6 into which the resin member 3 is injected is such that no resin is formed on the terminal portion 2e on the printed circuit board 2.

As a result, the mold 6 is inserted through the gate portion 6a.
The resin member 3 is injected into the inside, and the other portions of the printed circuit board 2 where the terminal portions 2e are left are sealed with resin.

Here, since the printed circuit board 2 has at least one through hole 2j at the position where the sealing is performed, the resin member 3 passes through this and reaches both sides of the printed circuit board 2. As a result, both front and back sides of the printed circuit board 2 can be resin-sealed.

As shown in FIGS. 5 and 6, when the mold 6 is clamped, a gap (mold) is formed by a step 7 between the wiring part 2a and a portion of the printed board 2 where the wiring part 2a is not formed. By forming a gap created by the step 7 between the printed circuit board 2 and the printed circuit board 6, it is possible to create an air vent effect of letting air in the resin member 3 injected into the mold 6 escape.

Subsequently, the resin member 3 is thermoset and the resin sealing is completed.

Thereafter, the printed circuit board 2 is taken out from the mold 6, and the outer leads 4a which are externally plated in advance are connected to the terminal portions 2e of the printed circuit board 2 by thermocompression bonding or the like.

At this time, for example, when the terminals 2e are formed on both front and back surfaces of the printed circuit board 2, the outer leads 4 are formed.
It is possible to connect a to the terminal portion 2e on either the front or back surface.

Further, in the lead frame 4, the outer leads 4a are cut. At this time, the printed board 2 is also cut at the same time.

Then, the outer leads 4a are bent and formed into a desired shape. Although the semiconductor integrated circuit device of this embodiment is of the QFP type in which the outer lead 4a is bent and formed into a gull wing shape, it may be a semiconductor integrated circuit device other than QFP.

When the lead frame 4 that has been bent and formed into a desired shape in advance is used, the bending and forming (bending process) after cutting the outer leads 4a and the printed circuit board 2 can be omitted.

Next, the function and effect obtained by the semiconductor integrated circuit device and the method of manufacturing the same of this embodiment will be described.

That is, since the semiconductor chip 1 is mounted on the printed board 2 and the resin is sealed on the printed board 2, the flow of the resin member 3 at the time of resin sealing can be rectified. Thereby, the deformation of the bonding wire 5 can be suppressed, and further, the position movement of the semiconductor chip 1 can be prevented.

As a result, the resin sealing property can be improved.

Further, since the wiring portion 2a formed on the printed board 2 has a thickness of about 30 to 40 μm, the wiring portion 2a can have a fine pitch (fine patterning).

As a result, the printed circuit board 2 having rigidity
Since the wiring portion 2a can be bonded in the above, the bondability can be improved.

Since the resin sealing property and the bonding property can be improved and the printed circuit board 2 is formed in the form of multiple frames, standardization of the pattern of the printed circuit board 2 and its wiring portion 2a can be realized. And the cost can be reduced.

Further, since the lead frame 4 is formed only by the outer leads 4a which are external leads,
The number of types of the lead frame 4 can be reduced, and as a result, standardization of the lead frame 4 and cost reduction can be achieved.

Further, since the printed board 2 is a composite laminated board formed of a resin such as an epoxy type or a polyimide type or a ceramic, when the semiconductor integrated circuit device is mounted on a mounting board of a resin or a ceramic base, they are mutually connected. The material can be a resin or ceramic material.

As a result, it is possible to improve the yield against thermal fatigue during or after mounting the semiconductor integrated circuit device, and also to improve the reliability of the connection portion.

Since at least the surface of the outer lead 4a in the lead frame 4 is preliminarily subjected to the exterior plating, the exterior plating process of the lead frame 4 after resin sealing can be omitted.

As a result, the throughput in the manufacturing process of the semiconductor integrated circuit device can be improved, and
Manufacturing costs can be reduced.

At the point where the mold 6 is clamped to the printed circuit board 2 during the resin sealing, a gap is formed by the step 7 between the position where the wiring section 2a of the printed circuit board 2 is not formed and the wiring section 2a. To be done.

As a result, the air vent effect of letting air in the resin member 3 escape can be produced, and the internal voids can be reduced and the yield can be improved.

Here, the resin member 3 flowing out from the gap
Has good adhesiveness to the resin portion which is the base of the printed circuit board 2, so that the resin member 3 that has flowed out can be prevented from falling or dropping off.

As a result, it is possible to reduce the occurrence of defects during the cutting and molding of the outer leads 4a.

Further, since the resin member 3 to be sealed has good adhesion to the resin portion which is the base of the printed circuit board 2, the reliability at the time of mounting the semiconductor integrated circuit device can be improved.

The invention made by the present inventor has been specifically described above based on the embodiments, but the present invention is not limited to the embodiments, and various modifications can be made without departing from the scope of the invention. Needless to say.

For example, in the semiconductor integrated circuit device described in the above embodiment, both sides of the printed circuit board on which the semiconductor element is mounted are resin-sealed, but at least the semiconductor element and its peripheral portion are sealed. If so, only one side may be sealed.

Further, in the semiconductor integrated circuit device, the semiconductor element and its peripheral portion are resin-sealed by the mold, but the sealing is not limited to the resin-sealing using the mold, but the gel-like structure. The sealing may be performed by potting the sealing member, or may be sealing using a cap member made of aluminum or the like.

Although the terminal portion provided on the outer peripheral portion of the printed circuit board is formed by thermocompression bonding the outer lead, it may be a pin insertion type in which a pin is inserted when the outer lead is joined. As a result, the outer leads can be bent into various shapes.

Further, although the semiconductor integrated circuit device of the above-described embodiment has one semiconductor element mounted on the printed board, as shown in the semiconductor integrated circuit device of another embodiment of FIG. It is also possible to realize a hybrid configuration on the two, that is, to mount a plurality of semiconductor chips 1 on both front and back surfaces of the printed circuit board 2 and seal the same.

Further, as shown in the semiconductor integrated circuit device of another embodiment of FIG. 8, by providing the terminal portions 2e on both the front and back surfaces of the outer peripheral portion 2d of the printed board 2, the outer leads 4a are provided on the terminal portions 2e on both the front and back surfaces. Can also be joined.

As a result, a hybrid type semiconductor integrated circuit device in which a plurality of semiconductor chips 1 are vertically stacked can be realized.

[0079]

Advantageous effects obtained by typical ones of the inventions disclosed in the present application will be briefly described.
It is as follows.

(1). Since the semiconductor element is mounted on the insulating substrate and is sealed on the insulating substrate,
The movement of the sealing member at the time of sealing, especially the flow of resin at the time of resin sealing can be rectified. Thereby, the deformation of the bonding wire can be suppressed, and further, the position movement of the semiconductor element can be prevented.

As a result, the sealing property, especially the resin sealing property can be improved.

(2). The wiring part formed on the insulating substrate is
Since the thickness is about 30 to 40 μm, it is possible to make the wiring portion fine pitch (fine pattern).

As a result, since the wiring portion can be bonded on the insulating substrate having rigidity, the bonding property can be improved.

(3). Since the resin sealing property and the bonding property can be improved, and the insulating substrate is formed in a multiple frame shape, it is possible to standardize the pattern of the insulating substrate and its wiring portion and reduce the cost. .

(4). Since the lead frame is formed only by the outer leads which are external leads, the number of types of lead frames can be reduced, and as a result, standardization of lead frames and cost reduction can be achieved.

(5). Since the insulating substrate is a composite laminated board formed of resin or ceramic such as epoxy or polyimide, when the semiconductor integrated circuit device is mounted on a resin or ceramic base mounting substrate, the materials thereof are mutually resin or ceramic. It can be a material.

As a result, it is possible to improve the yield against thermal fatigue during or after mounting the semiconductor integrated circuit device, and also to improve the reliability of the connection portion.

(6). Since at least the surfaces of the external leads in the lead frame are pre-plated, the plating step of the lead frame after sealing can be omitted. As a result, the throughput in the manufacturing process of the semiconductor integrated circuit device can be improved, and
Manufacturing costs can be reduced.

(7). During resin encapsulation, a gap is formed by a step between the wiring portion of the insulating substrate and a portion where the wiring portion of the insulating substrate is not clamped at the portion where the die clamps the insulating substrate. As a result, an air vent effect of letting air in the resin member to be sealed escape is created, and it is possible to reduce internal voids and improve the yield.

(8). The resin member that flows out from the gap described in (7) has good adhesion to the resin portion that is the base of the insulating substrate, so it is possible to reduce the falling or dropping of the resin member that has flowed out. As a result, it is possible to reduce the occurrence of defects during the cutting and molding of the external leads.

(9). Since the resin member to be sealed has good adhesion to the resin portion which is the base of the insulating substrate, the reliability at the time of mounting the semiconductor integrated circuit device can be improved.

[Brief description of drawings]

FIG. 1 is a sectional view showing an embodiment of the structure of a semiconductor integrated circuit device according to the present invention.

FIG. 2 is a plan view showing an embodiment of the structure of a semiconductor integrated circuit device according to the present invention.

FIG. 3 is a partial plan view showing an example of the structure of the insulating substrate in the semiconductor integrated circuit device of the present invention.

FIG. 4 is a partial plan view showing an embodiment of the structure of a lead frame in the semiconductor integrated circuit device of the present invention.

FIG. 5 is a partial cross-sectional view showing one embodiment of a method for manufacturing a semiconductor integrated circuit device according to the present invention.

FIG. 6 is a partial cross-sectional view showing an embodiment of a method for manufacturing a semiconductor integrated circuit device according to the present invention.

FIG. 7 is a sectional view showing an example of the structure of a semiconductor integrated circuit device which is another embodiment of the present invention.

FIG. 8 is a sectional view showing an example of a structure of a semiconductor integrated circuit device which is another embodiment of the present invention.

[Explanation of symbols]

 1 semiconductor chip (semiconductor element) 1a peripheral part 1b electrode 2 printed circuit board (insulating substrate) 2a wiring part 2b front surface 2c back surface 2d outer peripheral part 2e terminal part 2f printed circuit board body part 2g tab 2h inner lead terminal 2i through hole part 2j through hole 2k slit part 3 resin member (sealing member) 4 lead frame 4a outer lead (external lead) 5 bonding wire (conductive member) 6 mold 6a gate part 7 step

Claims (6)

[Claims] 1. A semiconductor integrated circuit device having a semiconductor element and an insulating substrate to which external leads are connected, the semiconductor integrated circuit device having a wiring portion and being arranged on an outer peripheral portion of at least one of the front and back surfaces. An insulating substrate provided with a terminal portion for sealing, a sealing member for sealing the semiconductor element and its peripheral portion while leaving the terminal portion, and an external lead having a surface plated in advance and connected to the terminal portion. The semiconductor integrated circuit device according to claim 1, further comprising: after encapsulating the semiconductor element on the insulating substrate, the external lead is connected to the insulating substrate. 2. A semiconductor integrated circuit device having a semiconductor element mounted thereon and an insulating substrate to which external leads are connected, the semiconductor integrated circuit device having a wiring portion and being arranged on an outer peripheral portion of at least one of the front and back surfaces. An insulating substrate provided with a terminal portion, a resin member for sealing the semiconductor element and its peripheral portion with a resin leaving the terminal portion, and an external lead having a surface plated in advance and connected to the terminal portion. A semiconductor integrated circuit device, comprising: the external lead being connected to the insulating substrate after the semiconductor element is resin-sealed on the insulating substrate. 3. The semiconductor integrated circuit device according to claim 1, wherein the insulating substrate has at least one through hole at a sealing portion and is formed in a multiple frame shape. A characteristic semiconductor integrated circuit device. 4. The semiconductor integrated circuit device according to claim 1, 2 or 3, wherein the insulating substrate is a composite laminated plate formed of a resin such as an epoxy resin or a polyimide resin or a ceramic. Semiconductor integrated circuit device. 5. The semiconductor integrated circuit device according to claim 1, 2, 3, or 4, wherein the external leads are lead frames whose surfaces are pre-plated with a conductive material such as solder. Integrated circuit device. 6. The method of manufacturing a semiconductor integrated circuit device according to claim 1, 2, 3, 4 or 5, wherein after mounting the semiconductor element on the insulating substrate, the electrode on the semiconductor element and the wiring. Part is electrically connected by a conductive member, and after the insulating substrate is arranged at a predetermined position of a mold for resin-sealing the semiconductor element and its peripheral portion, the terminal part is left on the insulating substrate. A method for manufacturing a semiconductor integrated circuit device, characterized by encapsulating resin in a portion other than .