KR20110092779A - Semiconductor power module pakage and methods of fabricating the same - Google Patents

Abstract

PURPOSE: A semiconductor power module package and a manufacturing method thereof are provided to eliminate a separate area for soldering and wire bonding for connecting a lead frame with an external circuit board, thereby minimizing the size of the package. CONSTITUTION: One or more semiconductor chips are formed on a substrate. A sealing member(710) seals the semiconductor chips. The sealing member is made of an upper sealing member(711) and a lower sealing member(712). A plurality of leads(120) is electrically connected to the semiconductor chips. The end part of a lead is made of a pressurization connecting terminal.

Description

Semiconductor power module package and method for manufacturing the same {Semiconductor power module pakage and methods of fabricating the same}

The present invention relates to a semiconductor power module package and a method for manufacturing the semiconductor power module package. In particular, the present invention relates to a semiconductor power module package and a method for manufacturing the semiconductor power module package including a half including a lead formed to be coupled to an external circuit board. It is about.

The semiconductor power module package affixed a semiconductor chip on a lead frame, and sealed the semiconductor chip using the sealing member. As the semiconductor chip is highly integrated, the number of bonding pads for connecting the semiconductor chip to the outside increases, so that the lead number of the lead frame also increases. Leads of the semiconductor power module package are connected to the external circuit board by soldering or wire bonding.

The semiconductor power module package requires an additional area for soldering or wire bonding to connect the external circuit board to the lead frame, thereby increasing the size of the package. Soldered or wire bonded leads are also vulnerable to physical vibration or impact.

An object of the present invention is to provide a semiconductor power module package excellent in bonding force with an external circuit board while minimizing the package size.

In addition, another technical problem to be achieved by the present invention is to provide a method of manufacturing a semiconductor power module package excellent in bonding force with an external circuit board while minimizing the package size.

A semiconductor power module package of one embodiment of the present invention for achieving the above technical problem is provided.

The semiconductor power module package includes one or more semiconductor chips on a substrate; A sealing member for sealing the semiconductor chip; And a plurality of leads electrically connected to the semiconductor chip and exposed from the sealing member, wherein the at least one lead is formed as a press fit terminal at an end thereof.

According to another aspect of the present invention, there is provided a semiconductor power module package. The semiconductor power module package may further include an external circuit board coupled to the press-fit connection terminal. It may have a through-hole penetrating the circuit board, and the press-fit connection terminal may be inserted into the through-hole and combined with the external circuit board. The press-fit connection terminal may include deformable parts that sandwich the connection hole, and the deformable parts may be deformed by being fitted into the through hole. It is preferable that the width between the deformable portions sandwiching the connection hole before being inserted into the through hole and deformed is smaller than the diameter of the through hole. The deformation parts may be inserted into the through holes and deformed to be in close contact with each other.

In the semiconductor power module package according to another aspect of one embodiment of the present invention for achieving the above another technical problem, the press-fit terminal may be configured to include a conductive material having elasticity. Preferably, the press-fit terminal may be composed of a copper alloy, for example, the press-fit terminal may be made of a material selected from the group consisting of CuSn5 and CuSn5.

In the semiconductor power module package according to another aspect of one embodiment of the present invention for achieving the another technical problem, the lead whose end portion is constituted by the press-fit connection terminal is bent to extend from the sealing member, and the bent lead And the sealing member are formed to be spaced apart from each other by a first distance, and the first distance is such that a stress applied to the sealing member when the press-fit connection terminal is fitted into the through hole is smaller than a design allowable stress of the sealing member. Can be set.

In the semiconductor power module package according to another aspect of an embodiment of the present invention for achieving the above another technical problem, the plurality of leads comprises a power lead and a signal lead, and the signal Leads may be composed of the press-fit connection terminal, each end of which is coupled to an external circuit board. Each of the power leads may be coupled to the application terminal by welding each end portion thereof. The power leads may comprise a copper alloy having an electrical conductivity of at least 75% IACS (International Annealed Copper Standard).

The power leads may be electrically connected to the substrate by soldering or wire bonding, and the signal leads may be electrically connected to the substrate by soldering or wire bonding.

The substrate may be a substrate selected from the group consisting of a direct bonding copper (DBC) substrate, a printed circuit board (PCB), a flexible printed circuit board (FPCB), and an insulating metal substrate (IMS).

The manufacturing method of the semiconductor power module package of one embodiment of the present invention for achieving the above another technical problem is provided.

The method of manufacturing a semiconductor power module package includes mounting at least one semiconductor chip on a substrate; Preparing a lead frame including a plurality of leads; Electrically connecting the lead frame and the semiconductor chip; And sealing the semiconductor chip, wherein the at least one lead may be configured as a press-fit connection terminal at an end thereof to be coupled to an external circuit board.

The preparing of the lead frame may include preparing a signal lead frame including a first inner lead, a first bent portion, and a first outer lead; Preparing a power lead frame including a second inner lead, a second bent portion, and a second outer lead; And coupling the signal lead frame and the power lead frame, and the first outer lead may be configured by the press-fit connection terminal.

After the sealing of the semiconductor chip, bending the first bent portion such that the first outer lead extends and bends from the first inner lead; And bending the second bent portion such that the second outer lead extends and bends from the second inner lead.

The first outer lead and the sealing member bend the first bent portion to be spaced apart from each other by a first distance, and the first distance is the sealing when the press-fit connection terminal is fitted into a through hole formed in the external circuit board. It can be set so that the stress applied to the member is smaller than the designed allowable stress of the sealing member.

According to the semiconductor power module package and the manufacturing method thereof according to the present invention, a separate area for soldering or wire bonding is not required to connect the external circuit board to the lead frame, thereby minimizing the size of the package. In addition, it has excellent bonding force with external circuit boards and is relatively stable from physical vibration and impact.

1 to 8 are plan views sequentially illustrating a method of manufacturing a semiconductor power module package according to an embodiment of the present invention;
FIG. 9 is a side view illustrating a side surface of the first external lead 120 exposed in the semiconductor power module package of FIG. 8; FIG.
FIG. 10 is a side view illustrating an exposed side of the second external lead 230 in the semiconductor power module package of FIG. 8;
FIG. 11 is a side view illustrating a configuration in which the first bent portion 150 and the second external lead 230 are bent in the semiconductor power module package 800 of FIG. 8;
12 is a side cross-sectional view illustrating a configuration in which the first bent portion 150 and the second outer lead 230 are bent in the semiconductor power module package 800 of FIG. 8;
FIG. 13 is a cross-sectional view illustrating a cross section of a semiconductor power module package 900 in which a first external lead 120 is coupled to an external circuit board 910;
14 is an enlarged cross-sectional view illustrating a configuration before the first external lead 120 is coupled to the external circuit board 910;
FIG. 15 is an enlarged cross-sectional view illustrating a configuration in which the first external lead 120 is coupled to the external circuit board 910;
16 and 17 are top cross-sectional views of a semiconductor power module package from which the external circuit board disclosed in FIG. 15 and the deformation parts of the first external lead are combined;
18 is a sectional view illustrating a cross section of a semiconductor power module package with a heat sink;
19 is a cross-sectional view illustrating various cases of the separation distance between the first outer lead 120 and the sealing member 710; And
20 is a graph illustrating the stresses applied to the sealing member in the cases of FIG. 19, respectively.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.

The embodiments of the present invention are described in order to more fully explain the present invention to those skilled in the art, and the following embodiments may be modified into various other forms, It is not limited to the embodiment. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the invention to those skilled in the art. In addition, the thickness or size of each layer in the drawings is exaggerated for convenience and clarity of description.

Throughout the specification, when referring to one component, such as a film, region, or substrate, being located "on" or "connected" to another component, the one component directly on the other component "on" It may be interpreted that there may be other components in contact with or interposed therebetween. On the other hand, when one component is referred to as being positioned on or directly connected to another component, it is interpreted that there are no other components intervening therebetween. Like numbers refer to like elements. As used herein, the term "and / or" includes any and all combinations of one or more of the listed items.

Although the terms first, second, etc. are used herein to describe various members, parts, regions, layers, and / or parts, these members, parts, regions, layers, and / or parts are defined by these terms. It is obvious that not. These terms are only used to distinguish one member, part, region, layer or portion from another region, layer or portion. Thus, the first member, part, region, layer or portion, which will be discussed below, may refer to the second member, component, region, layer or portion without departing from the teachings of the present invention.

Also, relative terms such as "top" or "above" and "bottom" or "bottom" may be used herein to describe the relationship of certain elements to other elements as illustrated in the figures. It may be understood that relative terms are intended to include other directions of the device in addition to the direction depicted in the figures. For example, if the device is turned over in the figures, elements depicted as present on the face of the top of the other elements are oriented on the face of the bottom of the other elements. Thus, the exemplary term "top" may include both "bottom" and "top" directions depending on the particular direction of the figure. If the device faces in the other direction (rotated 90 degrees relative to the other direction), the relative descriptions used herein can be interpreted accordingly.

The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. As used herein, the singular forms "a", "an" and "the" may include the plural forms as well, unless the context clearly indicates otherwise. Also, as used herein, "comprise" and / or "comprising" specifies the presence of the mentioned shapes, numbers, steps, actions, members, elements and / or groups of these. It is not intended to exclude the presence or the addition of one or more other shapes, numbers, acts, members, elements and / or groups.

1 to 8 are plan views sequentially illustrating a method of manufacturing a semiconductor power module package according to an embodiment of the present invention. The coordinate axes shown in FIGS. 1 to 8 indicate that the ground is an XY plane, the right direction on the ground is the X direction, the upper direction on the ground is the Y direction, and the forward direction from the ground is the Z direction. .

1 is a plan view illustrating a signal lead frame according to an embodiment of the present invention.

Referring to FIG. 1, the signal lead frame 100 includes a plurality of first inner leads 110, first bent parts 150, and first outer leads 120. The first outer lead 120 may have a distal end as a press fit terminal. The connection part 130 connecting the plurality of first external leads 120 is formed at an upper end of the signal lead frame 100. Meanwhile, first and second regions 140 may be disposed on left and right sides of the signal lead frame 100 to be coupled to the power lead frame, respectively.

The signal lead frame 100 may include a conductive material having elasticity. For example, the signal lead frame 100 may include a copper alloy having high yield strength and yield strain. Specifically, the signal lead frame 100 may be made of a material selected from the group consisting of CuSn5, CuSn5, and K75 having a yield strength of about 500 MPa.

2 is a plan view illustrating a power lead frame according to an embodiment of the present invention.

Referring to FIG. 2, the power lead frame 200 includes a plurality of second inner leads 210, second bent parts 220, and second outer leads 230. A connection part connecting the plurality of second external leads 230 is formed at a lower end of the power lead frame 200. Meanwhile, second regions 240 may be disposed on left and right sides of the power lead frame 200 to be coupled to the signal lead frame 100, respectively.

The power lead frame 200 may include a copper alloy having an electrical conductivity of 75% or more the International Annealed Copper Standard (IACS). The unit of electrical conductivity,% IACS (International Annealed Copper Standard), means the percentage of 5.8108 x 10 ⁷ S / m, the electrical conductivity at 20 ° C of the annealed copper wire (pure copper wire). Copper alloys having an electrical conductivity of at least 75% International Annealed Copper Standard (IACS) include, for example, TAMAC2, TAMAC4, OFC, and the like.

3 is a plan view illustrating a lead frame 300 in which a signal lead frame 100 and a power lead frame 200 are combined.

Referring to FIG. 3, the first frame 140 of the signal lead frame 100 illustrated in FIG. 1 and the second region 240 of the power lead frame 200 illustrated in FIG. 2 overlap each other to form a lead frame. Form 300. For example, the signal lead frame 100 and the power lead frame 200 may be combined by riveting the first region 140 and the second region 240.

4 is a plan view illustrating a substrate 400 on which semiconductor chips are mounted.

The substrate on which the semiconductor chip according to the present invention is mounted may be a direct bonding copper (DBC) substrate, a printed circuit board (PCB), a flexible printed circuit board (FPCB), or an insulating metal substrate (IMS).

Referring to FIG. 4, the substrate on which the semiconductor chip 450 is mounted may be, for example, a direct bonding copper (DBC) substrate. 12 illustrates a cross-sectional view of the DBC substrate 410, and referring to FIG. 12, the DBC substrate 410 may include a ceramic insulating film 412 and an upper conductive film pattern 411 disposed on an upper surface of the ceramic insulating film 412. And a lower conductive layer pattern 413 disposed on the bottom surface of the ceramic insulating layer 412.

The ceramic insulating film 412 may include an Al ₂ O ₃ film, an AlN film, a SiO ₂ film, a SiN film, or a BeO film. The upper conductive layer pattern 411 and the lower conductive layer pattern 413 may include a Cu layer pattern. For example, the upper conductive film pattern 411 and the lower conductive film pattern 413 include a bare Cu film pattern or a plated Cu film pattern selected from the group consisting of Ni, Au, and Ag. It may include. The upper conductive layer pattern 411 may be composed of a plurality of conductive layer patterns electrically separated from each other. One or more semiconductor chips 450 are mounted on the upper conductive film pattern 411 by, for example, solder printing.

5 is a plan view illustrating a configuration in which a substrate on which a semiconductor chip is mounted and a lead frame are arranged.

12 illustrates a cross-sectional view of a structure in which the lead frames 220, 230, 120, and 150, the substrate 410, and the semiconductor chip 450 are disposed. Referring to FIG. 5 together with FIG. 12, the substrate 410 may be disposed on the substrate 410. The lead frame 200 may be coupled to the power. Specifically, the second inner lead 210 of the power lead frame 200 may be coupled to the upper conductive layer pattern 411 of the substrate 410, and may be coupled and electrically connected by soldering. However, it is apparent from the technical spirit of the present invention that the substrate 410 and the power lead frame 200 may be electrically connected by various methods other than soldering, for example, by wire bonding.

In addition, the signal lead frame 100 may be connected to the substrate 410. Specifically, the first inner lead 110 of the signal lead frame 100 may be coupled to the upper conductive layer pattern 411 of the substrate 410, and may be electrically connected by a bonding wire. However, it is apparent from the technical spirit of the present invention that the substrate 410 and the signal lead frame 100 may be electrically connected by various methods other than wire bonding, for example, by soldering.

6 is a plan view illustrating a configuration in which the lead frame and the semiconductor chip are electrically connected.

12 is a cross-sectional view illustrating a configuration in which the lead frames 220, 230, 120, and 150, the substrate 410, and the semiconductor chip 450 are electrically connected to each other. Referring to FIG. 6 together with FIG. 12, a semiconductor chip ( 450 and the first inner lead 110 of the signal lead frame 100 may be electrically connected by the bonding wire 650. In addition, the semiconductor chip 450 and the upper conductive layer pattern 411 of the substrate 410 may be electrically connected to each other by the bonding wire 650. The bonding wire 650 may include a first bonding wire 610 having a narrow width and a second bonding wire 620 having a wide width according to an electrical use to be connected. For example, the first bonding wire 610 may have a width of 6 mm, and the second bonding wire 620 may have a width of 12 mm.

7 is a plan view illustrating a sealing member for sealing a semiconductor chip. Since FIG. 12 illustrates a cross section of the configuration of the sealing member 710 for sealing the semiconductor chip 450, referring to FIG. 7 together with FIG. 12, the sealing member 710 seals the semiconductor chip 450 and the substrate. 410, the second inner lead 210 and / or the first inner lead 110 may be sealed.

Specifically, the sealing member 710 is preferably formed to expose the lower surface of the lower conductive film pattern 413 of the substrate 410 to the outside. This configuration is for dissipating heat through the lower surface of the exposed lower conductive layer pattern 413, and in order to further promote heat dissipation, a heat sink in contact with the lower surface of the exposed lower conductive layer pattern 413. ) May be arranged.

In addition, the sealing member 710 may be formed to expose at least a portion of the first bent portion 150 and / or the second bent portion 220. That is, the first bent portion 150 is bent so that the first outer lead 120 extends and bends from the first inner lead 110, and the second outer lead 230 extends from the second inner lead 210. Since the second bent portion 220 is bent so as to bend, at least a portion of the first bent portion 150 and / or the second bent portion 220 is preferably exposed by the sealing member 710.

FIG. 8 is a plan view illustrating a top surface of a semiconductor power module package in which trimming and bending of a lead frame are performed, and FIG. 9 is a side view of the first external lead 120 exposed in the semiconductor power module package of FIG. 8. 10 is a side view illustrating the exposed side of the second external lead 230 in the semiconductor power module package of FIG. 8.

The coordinate axis shown in FIG. 9 indicates that the ground is YZ plane, the left direction is Y direction on the ground, the upper direction is Z direction on the ground, and the X direction is forward direction from the ground. In addition, the coordinate axis shown in FIG. 10 indicates that the ground is the ZX plane, the right direction on the ground is the X direction, the upper direction on the ground is the Z direction, and the direction coming out of the ground is the -Y direction. .

6 to 9, the signal lead frame 100 is bent at the first bent part 150 such that the first outer lead 120 extends and bends from the first inner lead 110. In addition, the power lead frame 200 is bent at the second bent portion 220 such that the second outer lead 230 extends and bends from the second inner lead 210.

Meanwhile, in order to embody the plurality of first outer leads 120 separately in the signal lead frame 100, the connection part 130 (see FIG. 1) connecting the plurality of first outer leads 120 is trimmed and removed. Similarly, in order to embody the plurality of second outer leads 230 separately in the power lead frame 200, the connection part 250 (FIG. 2) connecting the plurality of second outer leads 230 is trimmed and removed. .

In the method of manufacturing a semiconductor power module package according to the present application, the trimming step may be performed after the bending step of the lead frame. On the contrary, the bending step may be performed after the trimming step of the lead frame.

9 and 10 show that the sealing member 710 is composed of an upper sealing member 711 and a lower sealing member 712.

FIG. 11 is a side view illustrating a configuration in which the first bent portion 150 and the second external lead 230 are bent in the semiconductor power module package 800 of FIG. 8, and FIG. 12 is a semiconductor power module package of FIG. 8 ( 800 is a side cross-sectional view illustrating a configuration in which the first bent portion 150 and the second outer lead 230 are bent. The coordinate axes shown in FIGS. 11 and 12 indicate that the ground is YZ plane, the right direction on the ground is Y direction, the upper direction on the ground is Z direction, and the direction coming out of the ground is X direction. .

11 and 12, for example, the second external lead 230 of the power lead frame 200 may face the upper direction (Z direction) of the semiconductor power module package, and the signal lead frame 100 may be used. The first external lead 120) may face a lower direction (−Z direction) of the semiconductor power module package. However, the combination of the directions of the first outer lead 120 and / or the second outer lead 230 may vary. For example, the first outer lead 120 may face the Z direction and the second outer lead 230 may face the -Z direction. In addition, both the first outer lead 120 and the second outer lead 230 may face the same direction.

Meanwhile, the first bent part 150 may be bent such that the first outer lead 120 and the sealing member 710, particularly the lower sealing member 712, are spaced apart from each other by the first distance W1. The first distance W1 is such that the stress applied to the sealing member 710 when the first external lead 120 is fitted to the external circuit board 910 of FIG. 13 is greater than the design allowable stress of the sealing member 710. It is preferable to be set so that it may be small.

FIG. 13 is a cross-sectional view illustrating a cross section of a semiconductor power module package 900 in which a first external lead 120 is coupled to an external circuit board 910, and FIG. 14 is a diagram of a first external lead 120 having an external circuit board ( FIG. 15 is an enlarged cross-sectional view illustrating a configuration before coupling to 910, and FIG. 15 is an enlarged cross-sectional view illustrating a configuration in which the first external lead 120 is coupled to the external circuit board 910.

The coordinate axes shown in Figs. 14 and 15 indicate that the ground is the XZ plane, the left direction is the X direction on the ground, the upper direction is the Z direction on the ground, and the direction coming out of the ground is the Y direction. .

Referring to FIG. 13, the first external lead 120 of the signal lead frame 100 may be connected to the external circuit board 910 by a press fit method, and the second of the power lead frame 200. The external lead 230 may be connected to the application terminal (not shown) by welding.

14 and 15, the first external lead 120 may be configured as a press fit terminal. In detail, the first outer lead 120 may include a body portion 121, deformation parts 122 having a connection hole C therebetween, and a through part 123.

Meanwhile, the external circuit board 910 includes a substrate body 911 and has a through hole H penetrating therein in the height direction (Z direction). A conductive sidewall portion 912 made of a conductive material is formed on the sidewall of the substrate body portion 911 in which the through hole H is formed.

Preferably, the width W2 between the deformation parts 122 sandwiching the connection hole C is larger than the diameter W3 of the through hole H. Therefore, in order for the deformable parts 122 to be inserted into and inserted into the through hole H, the deformable parts 122 may be made of a material having elasticity, in particular, the deformed parts 122. ) May be inserted into the through hole (H) and deformed, and the size of the connection hole (C) may also be smaller than before insertion of the deformation parts 122. The deformation may include elastic deformation and / or plastic deformation.

16 and 17 illustrate planar cross-sectional views of a semiconductor power module package, in which the external circuit board and the deformation parts of the first external lead disclosed in FIG. 15 are combined. The coordinate axes shown in Figs. 16 and 17 indicate that the ground is XY plane, the left direction is X direction on the ground, the lower direction is Y direction on the ground, and the Z direction is forward direction from the ground. .

Referring to FIG. 16, the deformation parts 122 of the first outer lead 120 are inserted into and deformed in the through hole H formed by the conductive sidewall part 912. However, the deformation parts 122 of the deformed first outer lead 120 do not contact each other.

Referring to FIG. 17, the deformation parts 122 of the first outer lead 120 are inserted into and deformed in the through hole H formed by the conductive side wall part 912, and the deformed first outer lead 120 may be deformed. The deformation parts 122 are in close contact with each other. When the deformation parts 122 are in close contact with each other, the width of each of the deformation parts 122 may be large, and thus the connection hole C may be relatively small or the diameter of the through hole H may be relatively small.

18 is a cross-sectional view illustrating a cross section of a semiconductor power module package with a heat sink.

Referring to FIG. 18, the lower surface of the lower conductive film pattern 413 is exposed by the sealing member 710, and the lower surface of the lower conductive film pattern 413 is in contact with the heat sink 1010 to more effectively radiate heat. Can be done.

FIG. 19 is a cross-sectional view illustrating various cases of the separation distance between the first outer lead 120 and the sealing member 710, and FIG. 20 is a graph illustrating stresses applied to the sealing member in the cases of FIG. 19, respectively. to be. The coordinate axis shown in FIG. 19 indicates that the ground is YZ plane, the left direction is Y direction on the ground, the upper direction Z is on the ground, and the direction coming out of the ground is -X direction.

19 and 20, the first outer lead 120 is bent at the first bent portion 150 of the signal lead frame 100 so that the first outer lead 120 is separated by a predetermined distance from the sealing member, particularly the lower sealing member 712. It is formed spaced apart. In this case, the predetermined distance is set such that the stress applied to the sealing member is smaller than the design allowable stress of the sealing member when the first external lead 120 formed of the press-fit connection terminal is fitted into the through hole of the external circuit board. It is desirable to be.

For example, in case of Experiment A, the first outer lead 120 is bent at the first bent portion 150 of the signal lead frame 100 so that the first outer lead 120 has a sealing member, in particular, a lower sealing member 712, and 1.8 mm ( W4) is spaced apart, and in case of Experiment B, the first outer lead 120 is bent at the first bent portion 150 of the signal lead frame 100 so that the first outer lead 120 is a sealing member, in particular, a lower sealing member 712, And 2.6 mm (W5) apart.

Referring to FIG. 20, in case of Experimental Example A and Experimental Example B, a force for inserting the first external lead 120, which is composed of a press-fit connection terminal, to be inserted into the through-hole of the external circuit board ( As the value increases, it can be seen that the stress (value of the vertical axis in FIG. 20 and the unit is Mpa) applied to the sealing member also increases.

For example, if the design allowable stress of the sealing member is 154 MPa, the force for inserting the first outer lead 120 made of the press-fit connection terminal into the through-hole of the outer circuit board is preferably less than about 120 N. . More preferably, if the design allowable stress of the sealing member is 154 MPa, the first external lead 120 composed of the press-fit connection terminal is inserted into the through-hole of the external circuit board by reflecting a safety factor of 20%. The force may be less than about 100N.

Although the present invention has been described in detail with reference to preferred embodiments, the present invention is not limited to the above embodiments, and various modifications may be made by those skilled in the art within the scope of the technical idea of the present invention. .

100: signal lead frame
200: lead frame for power
110: first internal lead
150: first bent portion
120: first external lead
210: second internal lead
220: second bent portion
230: second external lead

Claims (20)

One or more semiconductor chips on a substrate;
A sealing member for sealing the semiconductor chip; And
And a plurality of leads electrically connected to the semiconductor chip and partially exposed from the sealing member.
At least one lead is a semiconductor power module package, characterized in that the distal end is composed of a press fit terminal. The method of claim 1,
And an external circuit board coupled to the press-fit connection terminal.
The external circuit board has a through hole penetrating the external circuit board in a height direction, and
The press-fit terminal is inserted into the through hole and the semiconductor power module package, characterized in that coupled to the external circuit board. The method of claim 2,
The press-fit terminal includes deformation parts that sandwich the connection hole,
And the deformation parts are inserted into the through holes and deformed. The method of claim 3,
The semiconductor power module package according to claim 1, wherein a width between the deformable parts interposed between the connection holes before being inserted into the through hole is greater than a diameter of the through hole. The method of claim 3,
The deformable portion is a semiconductor power module package, characterized in that the deformation is tightly fitted into the through-hole. The method of claim 3,
The press-fit terminal is a semiconductor power module package, characterized in that comprises a conductive material having an elastic. The method of claim 3,
The press-fit terminal is a semiconductor power module package, characterized in that comprising a copper alloy. The method of claim 3,
The press-fit terminal is a semiconductor power module package, characterized in that consisting of a material selected from the group consisting of CuSn5 and CuSn5. The method of claim 2,
The lead whose end portion is constituted by the press-fit connection terminal is bent to extend from the sealing member,
The bent lead and the sealing member are formed spaced apart from each other by a first distance, and
And the first distance is set such that the stress applied to the sealing member when the press-fit connecting terminal is fitted into the through hole is smaller than the design allowable stress of the sealing member. The method of claim 1,
The plurality of leads comprises power leads and signal leads, and
The signal leads are semiconductor power module package, characterized in that the end portion is composed of the press-fit connection terminal coupled to the external circuit board. The method of claim 10,
The power leads are each semiconductor end module package, characterized in that each end is coupled to the application terminal by welding. The method of claim 10,
Wherein the power leads comprise a copper alloy having an electrical conductivity of at least 75% IACS (International Annealed Copper Standard). The method of claim 10,
And the power leads are electrically connected to the substrate by soldering or wire bonding. The method of claim 10,
And the signal leads are electrically connected to the substrate by soldering or wire bonding. The method of claim 1,
The substrate is a semiconductor power module package, characterized in that the substrate selected from the group consisting of a DBC (Direct Bonding Copper) substrate, a printed circuit board (PCB), a flexible printed circuit board (FPCB) and an insulating metal substrate (IMS). The method of claim 1,
And a heat sink in contact with the bottom of the substrate. Mounting at least one semiconductor chip on the substrate;
Preparing a lead frame including a plurality of leads;
Electrically connecting the lead frame and the semiconductor chip; And
Sealing the semiconductor chip;
The at least one lead is a manufacturing method of a semiconductor power module package, characterized in that the end portion is composed of a press-fit connection terminal to be coupled to the external circuit board. The method of claim 17,
Preparing the lead frame
Preparing a signal lead frame including a first inner lead, a first bent portion, and a first outer lead;
Preparing a power lead frame including a second inner lead, a second bent portion, and a second outer lead; And
Coupling the signal lead frame and the power lead frame, and
The first external lead is a manufacturing method of a semiconductor power module package, characterized in that the end portion is composed of the press-fit connection terminal. The method of claim 18,
After sealing the semiconductor chip,
Bending the first bent portion such that the first outer lead extends and bends from the first inner lead; And
And bending the second bent portion such that the second outer lead extends and bends from the second inner lead. The method of claim 19,
The first outer lead and the sealing member bend the first bent portion to be spaced apart from each other by a first distance, and
The first distance is set so that the stress applied to the sealing member when the press-fit connecting terminal is fitted into the through hole formed in the external circuit board is smaller than the designed allowable stress of the sealing member. Method of making the package.

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