JP5089129B2 - メモリシステム、データ書込み方法及びデータ読み出し方法 - Google Patents

メモリシステム、データ書込み方法及びデータ読み出し方法 Download PDF

Info

Publication number
JP5089129B2
JP5089129B2 JP2006284141A JP2006284141A JP5089129B2 JP 5089129 B2 JP5089129 B2 JP 5089129B2 JP 2006284141 A JP2006284141 A JP 2006284141A JP 2006284141 A JP2006284141 A JP 2006284141A JP 5089129 B2 JP5089129 B2 JP 5089129B2
Authority
JP
Japan
Prior art keywords
data
memory device
specific pattern
memory
noise
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2006284141A
Other languages
English (en)
Japanese (ja)
Other versions
JP2008102705A5 (enExample
JP2008102705A (ja
Inventor
浩市 上田
勉 普勝
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Canon Inc
Original Assignee
Canon Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Canon Inc filed Critical Canon Inc
Priority to JP2006284141A priority Critical patent/JP5089129B2/ja
Priority to US11/840,912 priority patent/US7755951B2/en
Priority to CN2007101476782A priority patent/CN101135951B/zh
Publication of JP2008102705A publication Critical patent/JP2008102705A/ja
Publication of JP2008102705A5 publication Critical patent/JP2008102705A5/ja
Application granted granted Critical
Publication of JP5089129B2 publication Critical patent/JP5089129B2/ja
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

JP2006284141A 2006-09-01 2006-10-18 メモリシステム、データ書込み方法及びデータ読み出し方法 Expired - Fee Related JP5089129B2 (ja)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP2006284141A JP5089129B2 (ja) 2006-10-18 2006-10-18 メモリシステム、データ書込み方法及びデータ読み出し方法
US11/840,912 US7755951B2 (en) 2006-09-01 2007-08-17 Data output apparatus, memory system, data output method, and data processing method
CN2007101476782A CN101135951B (zh) 2006-09-01 2007-08-31 数据输出设备和方法、存储器系统、数据处理方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2006284141A JP5089129B2 (ja) 2006-10-18 2006-10-18 メモリシステム、データ書込み方法及びデータ読み出し方法

Publications (3)

Publication Number Publication Date
JP2008102705A JP2008102705A (ja) 2008-05-01
JP2008102705A5 JP2008102705A5 (enExample) 2009-11-26
JP5089129B2 true JP5089129B2 (ja) 2012-12-05

Family

ID=39436995

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2006284141A Expired - Fee Related JP5089129B2 (ja) 2006-09-01 2006-10-18 メモリシステム、データ書込み方法及びデータ読み出し方法

Country Status (1)

Country Link
JP (1) JP5089129B2 (enExample)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP6414497B2 (ja) * 2015-03-25 2018-10-31 アイシン・エィ・ダブリュ株式会社 メモリコントローラ
JP6394458B2 (ja) * 2015-03-25 2018-09-26 アイシン・エィ・ダブリュ株式会社 ノイズ分析装置およびメモリコントローラ

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0855481A (ja) * 1994-08-09 1996-02-27 Yamaha Corp 半導体集積回路
JP3435319B2 (ja) * 1997-09-11 2003-08-11 株式会社東芝 信号送受信回路及び携帯情報通信機器
US6813700B2 (en) * 2001-06-11 2004-11-02 Fujitsu Limited Reduction of bus switching activity using an encoder and decoder
JP2006053770A (ja) * 2004-08-12 2006-02-23 Seiko Epson Corp データ処理装置、データ復元装置、データ処理方法及びデータ処理プログラム
JP2006238315A (ja) * 2005-02-28 2006-09-07 Canon Inc 電子回路装置のｅｍｉ対策方法及び回路

Also Published As

Publication number Publication date
JP2008102705A (ja) 2008-05-01

Similar Documents

Publication Publication Date Title
JP5086709B2 (ja) データ入出力エラー検出機能を有する半導体メモリ装置
US7755951B2 (en) Data output apparatus, memory system, data output method, and data processing method
JP5037113B2 (ja) 半導体メモリのオンダイターミネーション装置及び方法
US6999352B2 (en) Data inversion circuit and semiconductor device
US8504903B2 (en) Data error check circuit, data error check method, data transmission method using data error check function, semiconductor memory apparatus and memory system using data error check function
US8918597B2 (en) Digital data inversion flag generator circuit
JP4921080B2 (ja) メモリ制御回路及びメモリ制御方法
JP5089129B2 (ja) メモリシステム、データ書込み方法及びデータ読み出し方法
JP5760226B2 (ja) モジュール制御回路、半導体モジュール、及び半導体モジュールの制御方法
US6687843B2 (en) Rambus DRAM with clock control circuitry that reduces power consumption
JP5125028B2 (ja) 集積回路
US20090006687A1 (en) Semiconductor memory device
US7369449B2 (en) Semiconductor integrated circuit and data output method
JP4727241B2 (ja) 半導体メモリ装置、並びに、この装置のデータ書込み及び読出し方法
US7533318B2 (en) Test pattern generator and test pattern generation method for onboard memory devices
US7821867B2 (en) Semiconductor memory device
JP5398664B2 (ja) 半導体メモリ
KR100403315B1 (ko) 데이터 버스의 등화 및 프리차지 제어신호 발생 장치
KR20080052047A (ko) 반도체 메모리 장치의 리드/라이트 동작 제어회로 및 방법
KR100927395B1 (ko) 데이터 인 스트로브 신호 발생 장치
KR20120004150A (ko) 설정회로 및 이를 포함하는 반도체 메모리 장치
JP3642420B2 (ja) 半導体装置
US7755969B2 (en) Address receiving circuit for a semiconductor apparatus
US6597625B2 (en) Semiconductor memory device
JP2005266856A (ja) シリアルインターフェイス回路

Legal Events

Date Code Title Description
A521 Written amendment

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20091014

A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20091014

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20120314

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20120319

A521 Written amendment

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20120511

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20120910

A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20120911

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20150921

Year of fee payment: 3

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20150921

Year of fee payment: 3

LAPS Cancellation because of no payment of annual fees