JP5065889B2 - 画像認識実装方法 - Google Patents
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- JP5065889B2 JP5065889B2 JP2007514595A JP2007514595A JP5065889B2 JP 5065889 B2 JP5065889 B2 JP 5065889B2 JP 2007514595 A JP2007514595 A JP 2007514595A JP 2007514595 A JP2007514595 A JP 2007514595A JP 5065889 B2 JP5065889 B2 JP 5065889B2
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- Condensed Matter Physics & Semiconductors (AREA)
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Description
2 電極
3 スタッドバンプ(突起電極)
4 基板
5 電極
6 ボンディングヘッド
7 ボンディングステージ
8 2視野カメラ
9 アライメントマーク
10 電極中心
11 スタッドバンプ中心
12 中心位置
13 アライメントマーク
14 中心位置
15 チップ搬送手段
16 CCDカメラ
17 透明部材
18 固定レール
図1は、本発明の一実施形態に係る画像認識実装方法を実施するためのフリップチップ実装装置の要部正面図である。この実装装置の接合部は、チップ1を吸着保持するボンディングヘッド6と、基板4を吸着保持するボンディングステージ7と、認識手段である2視野カメラ8から構成されている。ボンディングヘッド6は昇降可能になっており、ボンディングステージ7はX、Y、θ方向に移動可能になっている。2視野カメラ8は、ボンディングヘッド6とボンディングステージ7の間に挿入できるよう、進退可能に構成されている。実装装置の接合部へのチップ1の搬送は、図示していないチップ吸着反転ツールを用いて行われるようになっている。基板4の搬送は、図示していない基板搬送ツールで行われるようになっている。
Claims (4)
- チップのアライメントマークと基板のアライメントマークを実装前に認識手段で画像認識してチップと基板のアライメントを行い、チップの突起電極と基板の電極を接合する画像認識実装方法において、チップのアライメントマークを認識手段で画像認識した後にチップのアライメントマークから所定の位置に形成された突起電極の外観を認識手段で画像認識し、突起電極の外観が検出されない場合には認識手段の位置を移動し視野範囲を変更してから再び画像認識して突起電極の位置の座標を計算し、突起電極のアライメントマークからの位置ずれ量を補正してチップと基板の接合を行うことを特徴とする画像認識実装方法。
- チップのアライメントマークと基板のアライメントマークを実装前に認識手段で画像認識してチップと基板のアライメントを行い、チップの突起電極と基板の電極を接合する画像認識実装方法において、
基板のアライメントマークを認識手段で画像認識した後に基板のアライメントマークから所定の位置に形成された電極の外観を認識手段で画像認識して電極の位置の座標を計算し、基板の電極のアライメントマークからの位置ずれ量を補正し、さらにチップのアライメントマークを認識手段で画像認識した後にチップのアライメントマークから所定の位置に形成された突起電極の外観を認識手段で画像認識して突起電極の位置の座標を計算し、突起電極のアライメントマークからの位置ずれ量を補正してチップと基板の接合を行うことを特徴とする画像認識実装方法。 - チップのアライメントマークと基板のアライメントマークを実装前に認識手段で画像認識してチップと基板のアライメントを行い、チップの突起電極と基板の電極を接合する画像認識実装方法において、チップを搬送するチップ搬送手段のチップ保持板を透明部材で構成し、チップを搬送するに際し、チップのアライメントマークを認識手段で画像認識した後にチップのアライメントマークから所定の位置に形成された突起電極の外観をチップ搬送手段の下方に配置された認識手段で画像認識して突起電極の位置の座標を計算し、突起電極のアライメントマークからの位置ずれ量を補正してチップと基板の接合を行うことを特徴とする画像認識実装方法。
- 予め突起電極の平均的な画像パターンを登録しておき、チップに形成された突起電極を認識手段で画像認識し、前記平均的な画像パターンと認識手段で画像認識した画像パターンの比較を行い、チップの突起電極の位置を認識することを特徴とする、請求項1〜3のいずれかに記載の画像認識実装方法。
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JP2007514595A JP5065889B2 (ja) | 2005-04-28 | 2006-04-18 | 画像認識実装方法 |
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JP2005132922 | 2005-04-28 | ||
JP2005132922 | 2005-04-28 | ||
PCT/JP2006/308090 WO2006118019A1 (ja) | 2005-04-28 | 2006-04-18 | 画像認識実装方法 |
JP2007514595A JP5065889B2 (ja) | 2005-04-28 | 2006-04-18 | 画像認識実装方法 |
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JP5065889B2 true JP5065889B2 (ja) | 2012-11-07 |
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Cited By (1)
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US10607942B2 (en) | 2016-04-13 | 2020-03-31 | Olympus Corporation | Semiconductor device and method for manufacturing semiconductor device |
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US7732320B2 (en) * | 2007-02-05 | 2010-06-08 | Suss Microtec Ag | Apparatus and method for semiconductor wafer bumping via injection molded solder |
TWI392417B (zh) * | 2008-10-17 | 2013-04-01 | Hon Hai Prec Ind Co Ltd | 印刷電路板及其定位系統和方法 |
JP6538596B2 (ja) | 2016-03-14 | 2019-07-03 | 東芝メモリ株式会社 | 電子部品の製造方法及び電子部品の製造装置 |
TWI624894B (zh) * | 2016-08-12 | 2018-05-21 | 鴻騏新技股份有限公司 | 重組式晶圓的對貼方法 |
JP7090219B2 (ja) * | 2017-09-13 | 2022-06-24 | パナソニックIpマネジメント株式会社 | 位置特定方法および位置特定装置 |
CN110767589B (zh) * | 2019-10-31 | 2021-11-19 | 长春长光圆辰微电子技术有限公司 | 一种soi硅片对准键合的方法 |
Citations (2)
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JPH0837209A (ja) * | 1994-07-26 | 1996-02-06 | Matsushita Electric Ind Co Ltd | バンプ付電子部品の実装方法 |
JP2002110745A (ja) * | 2000-09-27 | 2002-04-12 | Yamaha Motor Co Ltd | 部品認識制御方法及び部品認識制御装置 |
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JP2820526B2 (ja) * | 1990-11-30 | 1998-11-05 | 富士通株式会社 | フリップチップボンディングの位置合わせ方法及び装置 |
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- 2006-04-18 WO PCT/JP2006/308090 patent/WO2006118019A1/ja active Application Filing
- 2006-04-25 TW TW095114658A patent/TWI423351B/zh active
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Publication number | Priority date | Publication date | Assignee | Title |
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JPH0837209A (ja) * | 1994-07-26 | 1996-02-06 | Matsushita Electric Ind Co Ltd | バンプ付電子部品の実装方法 |
JP2002110745A (ja) * | 2000-09-27 | 2002-04-12 | Yamaha Motor Co Ltd | 部品認識制御方法及び部品認識制御装置 |
Cited By (1)
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US10607942B2 (en) | 2016-04-13 | 2020-03-31 | Olympus Corporation | Semiconductor device and method for manufacturing semiconductor device |
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TW200731425A (en) | 2007-08-16 |
WO2006118019A1 (ja) | 2006-11-09 |
TWI423351B (zh) | 2014-01-11 |
JPWO2006118019A1 (ja) | 2008-12-18 |
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