JP5038657B2 - 半導体集積回路装置 - Google Patents
半導体集積回路装置 Download PDFInfo
- Publication number
- JP5038657B2 JP5038657B2 JP2006174725A JP2006174725A JP5038657B2 JP 5038657 B2 JP5038657 B2 JP 5038657B2 JP 2006174725 A JP2006174725 A JP 2006174725A JP 2006174725 A JP2006174725 A JP 2006174725A JP 5038657 B2 JP5038657 B2 JP 5038657B2
- Authority
- JP
- Japan
- Prior art keywords
- data
- port
- input
- control signal
- period
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Images
Classifications
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C8/00—Arrangements for selecting an address in a digital store
- G11C8/08—Word line control circuits, e.g. drivers, boosters, pull-up circuits, pull-down circuits, precharging circuits, for word lines
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
- G11C11/412—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger using field-effect transistors only
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C8/00—Arrangements for selecting an address in a digital store
- G11C8/18—Address timing or clocking circuits; Address control signal generation or management, e.g. for row address strobe [RAS] or column address strobe [CAS] signals
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Static Random-Access Memory (AREA)
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2006174725A JP5038657B2 (ja) | 2006-06-26 | 2006-06-26 | 半導体集積回路装置 |
| US11/812,193 US7616519B2 (en) | 2006-06-26 | 2007-06-15 | Semiconductor integrated circuit device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2006174725A JP5038657B2 (ja) | 2006-06-26 | 2006-06-26 | 半導体集積回路装置 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2008004218A JP2008004218A (ja) | 2008-01-10 |
| JP2008004218A5 JP2008004218A5 (enExample) | 2009-06-04 |
| JP5038657B2 true JP5038657B2 (ja) | 2012-10-03 |
Family
ID=38873435
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2006174725A Expired - Fee Related JP5038657B2 (ja) | 2006-06-26 | 2006-06-26 | 半導体集積回路装置 |
Country Status (2)
| Country | Link |
|---|---|
| US (1) | US7616519B2 (enExample) |
| JP (1) | JP5038657B2 (enExample) |
Families Citing this family (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2010044821A (ja) * | 2008-08-11 | 2010-02-25 | Hitachi Ulsi Systems Co Ltd | 半導体装置とメモリマクロ |
| JP5231190B2 (ja) * | 2008-12-05 | 2013-07-10 | 株式会社日立超エル・エス・アイ・システムズ | 半導体装置とメモリマクロ |
| US8934308B2 (en) | 2011-10-14 | 2015-01-13 | Taiwan Semiconductor Manufacturing Company, Ltd. | Tracking bit cell |
| US8806259B2 (en) * | 2011-10-28 | 2014-08-12 | Altera Corporation | Time division multiplexed multiport memory implemented using single-port memory elements |
| KR101660611B1 (ko) | 2012-01-30 | 2016-09-27 | 휴렛 팩커드 엔터프라이즈 디벨롭먼트 엘피 | 워드 시프트 정적 랜덤 액세스 메모리(ws-sram) |
| WO2013115778A1 (en) | 2012-01-30 | 2013-08-08 | Hewlett-Packard Development Company, L.P. | Dynamic/static random access memory (d/sram) |
| US9230622B2 (en) | 2012-11-30 | 2016-01-05 | Taiwan Semiconductor Manufacturing Company, Ltd. | Simultaneous two/dual port access on 6T SRAM |
| US9601197B2 (en) | 2014-03-10 | 2017-03-21 | Kabushiki Kaisha Toshiba | Memory system and control method |
| KR102512897B1 (ko) * | 2018-01-11 | 2023-03-23 | 에스케이하이닉스 주식회사 | 반도체 장치와 그를 포함하는 반도체 시스템 |
Family Cites Families (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE69034227T2 (de) * | 1989-04-13 | 2007-05-03 | Sandisk Corp., Sunnyvale | EEprom-System mit Blocklöschung |
| US6463529B1 (en) * | 1989-11-03 | 2002-10-08 | Compaq Computer Corporation, Inc. | Processor based system with system wide reset and partial system reset capabilities |
| JPH08212784A (ja) | 1995-02-03 | 1996-08-20 | Hitachi Ltd | 多ポートメモリ装置 |
| JP3892078B2 (ja) * | 1996-05-08 | 2007-03-14 | 株式会社ルネサステクノロジ | 半導体記憶装置 |
| US5991221A (en) * | 1998-01-30 | 1999-11-23 | Hitachi, Ltd. | Microcomputer and microprocessor having flash memory operable from single external power supply |
| JP2002526848A (ja) * | 1998-09-25 | 2002-08-20 | コーニンクレッカ フィリップス エレクトロニクス エヌ ヴィ | マルチポートメモリを含む装置 |
| US6324103B2 (en) * | 1998-11-11 | 2001-11-27 | Hitachi, Ltd. | Semiconductor integrated circuit device, memory module, storage device and the method for repairing semiconductor integrated circuit device |
| JP4569915B2 (ja) * | 2000-08-11 | 2010-10-27 | エルピーダメモリ株式会社 | 半導体記憶装置 |
| JP4488282B2 (ja) | 2003-09-08 | 2010-06-23 | 株式会社日立超エル・エス・アイ・システムズ | 半導体集積回路 |
-
2006
- 2006-06-26 JP JP2006174725A patent/JP5038657B2/ja not_active Expired - Fee Related
-
2007
- 2007-06-15 US US11/812,193 patent/US7616519B2/en active Active
Also Published As
| Publication number | Publication date |
|---|---|
| US20070297270A1 (en) | 2007-12-27 |
| US7616519B2 (en) | 2009-11-10 |
| JP2008004218A (ja) | 2008-01-10 |
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