JP5036171B2 - 高い電圧供給レベルを用いた低電圧論理回路オペレーション - Google Patents
高い電圧供給レベルを用いた低電圧論理回路オペレーション Download PDFInfo
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- JP5036171B2 JP5036171B2 JP2005332228A JP2005332228A JP5036171B2 JP 5036171 B2 JP5036171 B2 JP 5036171B2 JP 2005332228 A JP2005332228 A JP 2005332228A JP 2005332228 A JP2005332228 A JP 2005332228A JP 5036171 B2 JP5036171 B2 JP 5036171B2
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
- G06F1/32—Means for saving power
- G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
- G06F1/3234—Power saving characterised by the action undertaken
- G06F1/324—Power saving characterised by the action undertaken by lowering clock frequency
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
- G06F1/32—Means for saving power
- G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
- G06F1/3234—Power saving characterised by the action undertaken
- G06F1/3296—Power saving characterised by the action undertaken by lowering the supply or operating voltage
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J1/00—Circuit arrangements for dc mains or dc distribution networks
- H02J1/08—Three-wire systems; Systems having more than three wires
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J1/00—Circuit arrangements for dc mains or dc distribution networks
- H02J1/08—Three-wire systems; Systems having more than three wires
- H02J1/082—Plural DC voltage, e.g. DC supply voltage with at least two different DC voltage levels
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of dc power input into dc power output
- H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
- H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
- H02M3/10—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M3/145—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M3/155—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/45144—Gold (Au) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L24/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1306—Field-effect transistor [FET]
- H01L2924/13091—Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
- H01L2924/143—Digital devices
- H01L2924/1433—Application-specific integrated circuit [ASIC]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/1901—Structure
- H01L2924/1904—Component type
- H01L2924/19041—Component type being a capacitor
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/301—Electrical effects
- H01L2924/30107—Inductance
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/0067—Converter structures employing plural converter units, other than for parallel operation of the units on a single load
- H02M1/008—Plural converter units for generating at two or more independent and non-parallel outputs, e.g. systems with plural point of load switching regulators
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
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- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Power Engineering (AREA)
- Dc-Dc Converters (AREA)
- Semiconductor Integrated Circuits (AREA)
- Power Sources (AREA)
- Logic Circuits (AREA)
- Continuous-Control Power Sources That Use Transistors (AREA)
- Analogue/Digital Conversion (AREA)
Description
Claims (12)
- 第1及び第2基準電位の間に直列に接続された2n個のモジュールと、
前記2n個のモジュールの隣接する複数のモジュールの間に配置された2n−1個のノードと、
2n−1個の2:1DC/DCコンバータであって、それぞれの前記2n−1個の2:1DC/DCコンバータは、前記2n−1個のノードのうちのそれぞれ1つと連通する2n−1個の2:1DC/DCコンバータと
を備え、
前記nは2以上の整数である回路。 - 前記2n−1個の2:1DC/DCコンバータは、n個の分岐線に配置される
請求項1に記載の回路。 - 第1分岐線は前記2n−1個の2:1DC/DCコンバータのうちの1つを有し、第2分岐線は前記2n−1個の2:1DC/DCコンバータのうちの2つを有し、第n分岐線は前記2n−1個の2:1DC/DCコンバータのうちの2n−1個を有する
請求項2に記載の回路。 - 前記複数のモジュールは複数の複合論理回路マクロを含む
請求項1に記載の回路。 - 前記複数のモジュールは複数の特定用途向けの集積回路(ASIC)を含む
請求項1に記載の回路。 - 前記複数のモジュールは複数のプロセッシングモジュールを含む
請求項1に記載の回路。 - 第1及び第2基準電位の間に直列に接続された2n個のモジュールを提供する段階と、
2n個のモジュールの隣接する複数のモジュールの間に配置される2n−1個のノードを提供する段階と、
変換のための2n−1個の2:1DC/DCコンバータを提供する段階であって、それぞれの前記2n−1個の2:1DC/DCコンバータは、前記2n−1個のノードのうちのそれぞれ1つと連通する段階と
を備え、
前記nは2以上の整数である、回路を製造する方法。 - 前記2n−1個の2:1DC/DCコンバータはn個の分岐線に配置される
請求項7に記載の方法。 - 第1分岐線は前記2n−1個の2:1DC/DCコンバータのうちの1つを有し、第2分岐線は前記2n−1個の2:1DC/DCコンバータのうちの2つを有し、第n分岐線は前記2n−1個の2:1DC/DCコンバータのうちの2n−1個を有する
請求項8に記載の方法。 - 前記2n個のモジュールは、複数の複合論理回路マクロを含む
請求項7に記載の方法。 - 前記2n個のモジュールは、複数の特定用途向けの集積回路(ASIC)を含む
請求項7に記載の方法。 - 前記2n個のモジュールは、複数のプロセッシングモジュールを含む
請求項7に記載の方法。
Applications Claiming Priority (8)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US63155204P | 2004-11-29 | 2004-11-29 | |
US60/631,552 | 2004-11-29 | ||
US66393305P | 2005-03-21 | 2005-03-21 | |
US60/663,933 | 2005-03-21 | ||
US11/098,129 | 2005-04-04 | ||
US11/098,129 US7594127B2 (en) | 2004-11-29 | 2005-04-04 | Low voltage logic operation using higher voltage supply levels |
US11/179,106 US7702929B2 (en) | 2004-11-29 | 2005-07-12 | Low voltage logic operation using higher voltage supply levels |
US11/179,106 | 2005-07-12 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2006203169A JP2006203169A (ja) | 2006-08-03 |
JP5036171B2 true JP5036171B2 (ja) | 2012-09-26 |
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ID=36021750
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Application Number | Title | Priority Date | Filing Date |
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JP2005332228A Active JP5036171B2 (ja) | 2004-11-29 | 2005-11-16 | 高い電圧供給レベルを用いた低電圧論理回路オペレーション |
JP2005332227A Active JP4690177B2 (ja) | 2004-11-29 | 2005-11-16 | 高い電圧供給レベルを用いた低電圧論理回路オペレーション |
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JP2005332227A Active JP4690177B2 (ja) | 2004-11-29 | 2005-11-16 | 高い電圧供給レベルを用いた低電圧論理回路オペレーション |
Country Status (4)
Country | Link |
---|---|
US (1) | US7702929B2 (ja) |
EP (2) | EP1662643B1 (ja) |
JP (2) | JP5036171B2 (ja) |
TW (2) | TWI400867B (ja) |
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-
2005
- 2005-07-12 US US11/179,106 patent/US7702929B2/en active Active
- 2005-11-15 EP EP05024935.8A patent/EP1662643B1/en active Active
- 2005-11-16 EP EP05025066.1A patent/EP1662646B1/en active Active
- 2005-11-16 JP JP2005332228A patent/JP5036171B2/ja active Active
- 2005-11-16 JP JP2005332227A patent/JP4690177B2/ja active Active
- 2005-11-17 TW TW094140475A patent/TWI400867B/zh not_active IP Right Cessation
- 2005-11-17 TW TW094140477A patent/TWI437806B/zh not_active IP Right Cessation
Also Published As
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US7702929B2 (en) | 2010-04-20 |
EP1662646B1 (en) | 2017-10-04 |
TWI400867B (zh) | 2013-07-01 |
EP1662643A2 (en) | 2006-05-31 |
TW200644393A (en) | 2006-12-16 |
US20060119390A1 (en) | 2006-06-08 |
EP1662646A3 (en) | 2008-05-28 |
JP2006203169A (ja) | 2006-08-03 |
TWI437806B (zh) | 2014-05-11 |
TW200631289A (en) | 2006-09-01 |
JP4690177B2 (ja) | 2011-06-01 |
EP1662643A3 (en) | 2008-05-28 |
EP1662643B1 (en) | 2017-01-04 |
EP1662646A2 (en) | 2006-05-31 |
JP2006185422A (ja) | 2006-07-13 |
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