JP5031650B2 - Multilayer capacitor - Google Patents

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JP5031650B2
JP5031650B2 JP2008109678A JP2008109678A JP5031650B2 JP 5031650 B2 JP5031650 B2 JP 5031650B2 JP 2008109678 A JP2008109678 A JP 2008109678A JP 2008109678 A JP2008109678 A JP 2008109678A JP 5031650 B2 JP5031650 B2 JP 5031650B2
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mounting surface
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multilayer capacitor
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誉一 黒田
慶雄 川口
政明 谷口
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Murata Manufacturing Co Ltd
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本発明は、積層コンデンサ、特に、光通信モジュール等の高周波回路に用いられ、広帯域での通過特性を有する積層コンデンサに関する。   The present invention relates to a multilayer capacitor, and more particularly to a multilayer capacitor that is used in a high-frequency circuit such as an optical communication module and has a broadband pass characteristic.

近年、高速通信の拡大に伴って、光ファイバ通信などに代表される高速光通信が急速に進展している。このような高速光通信用の電子部品については、10kHz〜40GHzという広い周波数帯域における通過特性が必要とされている。   In recent years, along with the expansion of high-speed communication, high-speed optical communication represented by optical fiber communication and the like is rapidly progressing. Such electronic components for high-speed optical communication are required to have pass characteristics in a wide frequency band of 10 kHz to 40 GHz.

光通信で高速伝送を行うデバイスには、電気信号と光信号とを変換するE/Oモジュールと、広帯域で高周波信号を増幅する増幅器が必要である。このようなデバイスを用いた回路に使用されるコンデンサは広帯域でのカップリング能力が要求されている。   Devices that perform high-speed transmission in optical communication require an E / O module that converts electrical signals and optical signals, and an amplifier that amplifies high-frequency signals over a wide band. Capacitors used in circuits using such devices are required to have a broadband coupling capability.

従来、この種の高周波回路には、単板のマイクロチップコンデンサが用いられていた。しかし、単板のマイクロチップコンデンサはその構造からインダクタンスを低く設定できるが、静電容量を大きくとることができないという問題点を有していた。しかも、基板上の配線との接続にはワイヤや金属板を必要とするため、結果的にインダクタンスが大きくなっていた。   Conventionally, a single-plate microchip capacitor has been used for this type of high-frequency circuit. However, the single-chip microchip capacitor has a problem that the inductance can be set low due to its structure, but the capacitance cannot be increased. Moreover, since a wire or a metal plate is required for connection to the wiring on the substrate, the inductance is increased as a result.

一方、誘電体層と静電容量を形成するための内部電極とを積層した積層コンデンサが種々提供されており、一般的な積層コンデンサでは大きな静電容量を確保できるが、インダクタンスをあまり低くすることができないという問題点を有している。入出力端子を多端子構造にすることでインダクタンスを低くする対策が考えられているが、基板の配線が複雑になり、基板の配線におけるインダクタンスが大きくなるという新たな問題点が発生している。それゆえ、二端子の単純な構造で、高容量、低インダクタンスの積層コンデンサが要望されている。   On the other hand, various multilayer capacitors are provided in which a dielectric layer and an internal electrode for forming a capacitance are laminated. A large capacitance can be secured with a general multilayer capacitor, but the inductance is made too low. Has the problem of being unable to. Although measures to lower the inductance by considering the multi-terminal structure of the input / output terminals have been considered, there is a new problem that the wiring of the board becomes complicated and the inductance of the wiring of the board becomes large. Therefore, there is a demand for a multilayer capacitor having a simple structure with two terminals and a high capacity and low inductance.

ところで、特許文献1には、基板への実装面に外部接続用の電極を設けた積層コンデンサが提案されている。この積層コンデンサの場合、積層体の両端面に外部電極が形成されている従来の一般的な積層コンデンサと比べて、外部電極が実装面に位置することによって、インダクタンスを低減できる効果を奏する。   By the way, Patent Document 1 proposes a multilayer capacitor in which an external connection electrode is provided on a mounting surface on a substrate. In the case of this multilayer capacitor, there is an effect that the inductance can be reduced by positioning the external electrode on the mounting surface as compared with the conventional general multilayer capacitor in which the external electrode is formed on both end faces of the multilayer body.

一方、コンデンサの通過特性は、コンデンサの共振周波数より低い帯域では静電容量が影響し、高い帯域ではインダクタンスが影響する。そして、10kHz〜40GHzの広い周波数帯域に用いるコンデンサにあっては、例えば、静電容量が0.1μFで、インダクタンス(等価直列インダクタンス、以下単にESLと称する)が250pHの特性が必要とされる。   On the other hand, the pass characteristics of a capacitor are affected by capacitance in a band lower than the resonance frequency of the capacitor, and inductance is affected in a higher band. For a capacitor used in a wide frequency band of 10 kHz to 40 GHz, for example, it is necessary that the capacitance is 0.1 μF and the inductance (equivalent series inductance, hereinafter simply referred to as ESL) is 250 pH.

前記特許文献1に記載の積層コンデンサでは、他の一般的な積層コンデンサに比べてESLを低くすることが可能ではあるが、それでもESL250pH以下を実現することはできないのが現状である。
特開平11−288839号公報(図1、図2、図3)
In the multilayer capacitor described in Patent Document 1, it is possible to lower the ESL as compared with other general multilayer capacitors, but it is still impossible to achieve an ESL of 250 pH or less.
Japanese Patent Application Laid-Open No. 11-288839 (FIGS. 1, 2, and 3)

そこで、本発明の目的は、高容量を確保できることは勿論、広い周波数帯域に用いるのに必要とされる250pH以下のESLを実現できる積層コンデンサを提供することにある。   Accordingly, an object of the present invention is to provide a multilayer capacitor capable of realizing an ESL of 250 pH or less required for use in a wide frequency band as well as ensuring a high capacity.

以上の目的を達成するため、本発明は、誘電体層と静電容量を形成するための内部電極とが積層されており、該内部電極が実装面と直交する方向に位置し、該内部電極から引き出された引出電極が積層体の表面に設けた外部電極と電気的に接続されている積層コンデンサにおいて、
前記内部電極は互いに対向する第1及び第2の内部電極を有し、
前記外部電極は、前記第1の内部電極の引出電極と電気的に接続される第1の外部電極と、前記第2の内部電極の引出電極と電気的に接続される第2の外部電極と、を有し、
前記第1の外部電極は、前記実装面と、前記実装面と対向する上面と、前記実装面及び前記上面を結ぶ第1の側面と、に跨って連続的に形成され、
前記第2の外部電極は、前記実装面と、前記実装面と対向する上面と、前記実装面及び前記上面を結びかつ前記第1の側面と対向する第2の側面と、に跨って連続的に形成され、
前記第1の内部電極は、前記実装面と前記上面と前記第1の側面とにおいて、前記第1の外部電極と電気的に接続され、かつ、前記第1の内部電極の引出電極は、前記第1の側面の前記実装面側から前記上面側にかけての寸法と同じ幅をもって前記第1の側面に引き出され、
前記第2の内部電極は、前記実装面と前記上面と前記第2の側面とにおいて、前記第2の外部電極と電気的に接続され、かつ、前記第2の内部電極の引出電極は、前記第2の側面の前記実装面側から前記上面側にかけての寸法と同じ幅をもって前記第2の側面に引き出され、
互いに対向する第1及び第2の内部電極のそれぞれの引出電極の距離aと、第1の内部電極から実装面までの距離b1と、第2の内部電極から実装面までの距離b2との関係が以下の式を満足すること、
1.64a+(b1+b2)≦0.85
但し、a,b1,b2の単位はmm
を特徴とする。
In order to achieve the above object, the present invention includes a dielectric layer and an internal electrode for forming a capacitance, and the internal electrode is positioned in a direction perpendicular to the mounting surface. In the multilayer capacitor in which the extraction electrode extracted from is electrically connected to the external electrode provided on the surface of the multilayer body,
The internal electrodes have first and second internal electrodes facing each other;
The external electrode includes a first external electrode electrically connected to the extraction electrode of the first internal electrode, and a second external electrode electrically connected to the extraction electrode of the second internal electrode Have
The first external electrode is continuously formed across the mounting surface, an upper surface facing the mounting surface, and a first side surface connecting the mounting surface and the upper surface,
The second external electrode is continuous across the mounting surface, an upper surface facing the mounting surface, and a second side surface connecting the mounting surface and the upper surface and facing the first side surface. Formed into
The first internal electrode is electrically connected to the first external electrode at the mounting surface, the top surface, and the first side surface, and the lead electrode of the first internal electrode is The first side surface is drawn to the first side surface with the same width as the dimension from the mounting surface side to the upper surface side;
The second internal electrode is electrically connected to the second external electrode at the mounting surface, the top surface, and the second side surface, and the extraction electrode of the second internal electrode is The second side surface is drawn to the second side surface with the same width as the dimension from the mounting surface side to the upper surface side;
The distance a between the lead electrodes of the first and second internal electrodes facing each other, the distance b 1 from the first internal electrode to the mounting surface, and the distance b 2 from the second internal electrode to the mounting surface Satisfying the following equation:
1.64a + (b 1 + b 2 ) ≦ 0.85
However, the unit of a, b 1 and b 2 is mm.
It is characterized by.

本発明者は、積層コンデンサに関して種々の実験を行って検討した結果、互いに対向する第1及び第2の内部電極の一方の引出電極と他方の引出電極との距離aと、第1及び第2の内部電極から実装面までの距離b1,b2がインダクタンスに大きな影響を与えていることを見出した。 The present inventor conducted various experiments on the multilayer capacitor, and as a result, as a result, the distance a between the one extraction electrode and the other extraction electrode of the first and second internal electrodes facing each other, the first and second It has been found that the distances b 1 and b 2 from the internal electrode to the mounting surface greatly affect the inductance.

即ち、ESLの値を固定して、距離a,b1,b2の関係を検討した結果、特に、距離aの影響が大きく、かつ、ESLの値に拘わりなく1.64の係数が存在することを見出した。そこで、前記式を満足することにより、広い周波数帯域でESLが250pH以下の特性を実現することができた。 That is, as a result of examining the relationship between the distances a, b 1 , and b 2 with the ESL value fixed, the influence of the distance a is particularly great, and a coefficient of 1.64 exists regardless of the ESL value. I found out. Therefore, by satisfying the above equation, it was possible to realize the characteristic that ESL is 250 pH or less in a wide frequency band.

本発明によれば、誘電体層と静電容量を形成するための内部電極を、該内部電極が実装面と直交する方向に位置するように積層した積層コンデンサにおいて、内部電極及びその引出電極を前記式を満足するように設定したため、高容量であることは勿論、広い周波数帯域に用いるのに必要とされる250pH以下のESLを実現することができる。   According to the present invention, in a multilayer capacitor in which an internal electrode for forming a capacitance with a dielectric layer is laminated so that the internal electrode is positioned in a direction perpendicular to the mounting surface, the internal electrode and its extraction electrode are Since it is set so as to satisfy the above equation, ESL of 250 pH or less required for use in a wide frequency band can be realized as well as high capacity.

以下、本発明に係る積層コンデンサの実施形態について、添付図面を参照して説明する。   Hereinafter, embodiments of a multilayer capacitor according to the present invention will be described with reference to the accompanying drawings.

(第1実施形態、図1〜図3参照)
本発明の第1実施形態である積層コンデンサは、図1に示すように、長さLが1.0mm、幅Wが0.5mmのサイズを有している。この積層コンデンサは、複数の誘電体層と静電容量を形成するための複数の内部電極11,21…とを積層したもので、内部電極11,21…は必要とされるスペックに応じて所定の枚数が内蔵される。また、この積層コンデンサでは、内部電極11,21…は積層体1の実装面2と直交する方向に位置している。
(Refer 1st Embodiment and FIGS. 1-3)
As shown in FIG. 1, the multilayer capacitor according to the first embodiment of the present invention has a length L of 1.0 mm and a width W of 0.5 mm. This multilayer capacitor is formed by laminating a plurality of dielectric layers and a plurality of internal electrodes 11, 21... For forming a capacitance, and the internal electrodes 11, 21... Are predetermined according to required specifications. Built-in number. In this multilayer capacitor, the internal electrodes 11, 21... Are positioned in a direction orthogonal to the mounting surface 2 of the multilayer body 1.

よく知られているように、誘電体層はセラミックグリーンシートとして形成され、該シート上に所定形状の内部電極11,21…と引出電極12,22を厚膜技術ないし薄膜技術で形成して積層/圧着され、焼成された後、所定の寸法に切り出される。切り出された積層体1の表面には、外部電極31,32が導電ペーストの塗布、焼き付け等によって形成される。   As is well known, the dielectric layer is formed as a ceramic green sheet, on which a predetermined shape of internal electrodes 11, 21... And extraction electrodes 12, 22 are formed by thick film technology or thin film technology and laminated. / After being crimped and baked, it is cut out to a predetermined size. External electrodes 31 and 32 are formed on the surface of the cut laminate 1 by applying a conductive paste, baking, or the like.

内部電極は互いに対向する一対の間に静電容量を形成し、ここでは一対の内部電極11,21に関して説明するが、他の内部電極に関しても同様である。内部電極11,21は同じ面積で積層体1の同じ位置に設けられており(従って、図1(B)では内部電極11,21は重なって図示されている)、第1の内部電極11の引出電極12は外部電極31と電気的に接続され、第2の内部電極21の引出電極22は外部電極32と電気的に接続されている。   The internal electrodes form a capacitance between a pair facing each other. Here, the pair of internal electrodes 11 and 21 will be described, but the same applies to the other internal electrodes. The internal electrodes 11 and 21 have the same area and are provided at the same position of the stacked body 1 (therefore, the internal electrodes 11 and 21 are overlapped in FIG. 1B). The extraction electrode 12 is electrically connected to the external electrode 31, and the extraction electrode 22 of the second internal electrode 21 is electrically connected to the external electrode 32.

本発明者らは、前記サイズの積層体1内に、内部電極11,21の容量有効寸法Cを0.3mmとして、引出電極12,22の距離a、内部電極11,21から実装面2までの垂直距離b(但し、b=b1+b2、b1=b2)を種々の値に変更したものを作製し、ESLを求めた。なお、高さTは垂直距離b1,b2に応じて変化する。 The inventors set the effective capacity C of the internal electrodes 11 and 21 to 0.3 mm in the laminate 1 having the above size, the distance a between the extraction electrodes 12 and 22, and from the internal electrodes 11 and 21 to the mounting surface 2. The vertical distance b (where b = b 1 + b 2 , b 1 = b 2 ) was changed to various values, and ESL was obtained. The height T varies according to the vertical distances b 1 and b 2 .

その結果を以下の表1に示す。表1からは、ESLが200pH、250pH、300pHになる引出電極間距離aと垂直距離bの組合せを読み取ることができる。   The results are shown in Table 1 below. From Table 1, the combination of the distance between the extraction electrodes a and the vertical distance b at which the ESL becomes 200 pH, 250 pH, and 300 pH can be read.

Figure 0005031650
Figure 0005031650

表1の結果を得た実験は、引出電極間距離aを0.05mm間隔で0.10〜0.50mmに設定し、それぞれの距離aにおいて垂直距離bを振り分け、ネットワークアナライザを用いて周波数特性を測定した。表1の垂直距離bは、ESLが200pH、250pH、300pHになったときの値を示している。   The experiment which obtained the result of Table 1 sets the distance a between extraction electrodes to 0.10-0.50 mm by 0.05 mm space | interval, distributes the vertical distance b in each distance a, and uses a network analyzer for frequency characteristics. Was measured. The vertical distance b in Table 1 shows values when the ESL reaches 200 pH, 250 pH, and 300 pH.

図2は、表1の結果をグラフして示したもので、上段の直線はESLが300pH、中段の直線は250pH、下段の直線は200pHに関するそれぞれの数値関係を示している。図2から明らかなように、距離a,bの関係は直線を示し、以下の式(1)で近似できる。   FIG. 2 is a graph showing the results shown in Table 1. The upper straight line shows the numerical relationship with respect to ESL of 300 pH, the middle straight line with 250 pH, and the lower straight line with respect to 200 pH. As apparent from FIG. 2, the relationship between the distances a and b is a straight line and can be approximated by the following equation (1).

1.64a+b=K …(1)
a:引出電極間距離(mm)
b:垂直距離(mm)、b1+b2であり、かつ、b1=b2
1.64a + b = K (1)
a: Distance between extraction electrodes (mm)
b: vertical distance (mm), b 1 + b 2 and b 1 = b 2

式(1)において、係数KはESLの数値によって変動し、200pHのときは約0.57であり、250pHのときは約0.85であり、300pHのときは約1.12である。   In the equation (1), the coefficient K varies depending on the value of ESL, and is about 0.57 at 200 pH, about 0.85 at 250 pH, and about 1.12 at 300 pH.

次に、ESLの値と前記係数Kとの関係を図3のグラフに示す。ESLとKは以下の式(2)で求めることができる。
ESL(pH)=180×K+97 …(2)
Next, the relationship between the ESL value and the coefficient K is shown in the graph of FIG. ESL and K can be obtained by the following equation (2).
ESL (pH) = 180 × K + 97 (2)

以上の考察から、以下の式(3)を満足することにより、ESLが250pH以下の積層コンデンサを得ることができる。静電容量に関しては積層コンデンサの一般的な特性として高容量を確保できることは勿論である。   From the above consideration, a multilayer capacitor having an ESL of 250 pH or less can be obtained by satisfying the following expression (3). Of course, a high capacitance can be secured as a general characteristic of the multilayer capacitor with respect to the capacitance.

1.64a+(b1+b2)≦0.85 …(3)
但し、a,b1,b2の単位はmm
1.64a + (b 1 + b 2 ) ≦ 0.85 (3)
However, the unit of a, b 1 and b 2 is mm.

(変形例、図4参照)
前記第1実施形態においては、引出電極12,22の位置や形状及び外部電極31,32の位置や形状に関して、種々の変形例を採用することができる。図4にこのような変形例のいくつかを示す。なお、図4に付した符号は図1に付した符号と同じ部材、部分を示している。
(Modification, see FIG. 4)
In the first embodiment, various modifications can be adopted with respect to the positions and shapes of the extraction electrodes 12 and 22 and the positions and shapes of the external electrodes 31 and 32. FIG. 4 shows some of such modifications. 4 indicate the same members and parts as those in FIG.

(第2及び第3実施形態、図5、図6参照)
前記第1実施形態及びその変形例は引出電極の形状が矩形のものを示した。引出電極は矩形以外であってもよく、そのような実施形態を以下に示す。
(Refer to the second and third embodiments, FIG. 5 and FIG. 6)
In the first embodiment and its modification, the lead electrode has a rectangular shape. The extraction electrode may be other than a rectangle, and such an embodiment is shown below.

図5に示す第2実施形態である積層コンデンサ及び図6に示す第3実施形態である積層コンデンサは、それぞれ、引出電極12,22に根元に向かって拡がる三角形状部分12’,22’を付加したものである。これらの積層コンデンサにおいても前記式(3)を満足することにより、ESLが250pH以下の積層コンデンサを得ることができた。なお、図5、図6に付した符号は図1に付した符号と同じ部材、部分を示している。   In the multilayer capacitor according to the second embodiment shown in FIG. 5 and the multilayer capacitor according to the third embodiment shown in FIG. 6, triangular portions 12 ′ and 22 ′ that extend toward the roots are added to the lead electrodes 12 and 22, respectively. It is a thing. Even in these multilayer capacitors, a multilayer capacitor having an ESL of 250 pH or less could be obtained by satisfying the expression (3). 5 and 6 indicate the same members and parts as those in FIG.

(他の実施形態)
なお、本発明に係る積層コンデンサは前記実施形態に限定するものではなく、その要旨の範囲内で種々に変更できる。
(Other embodiments)
The multilayer capacitor according to the present invention is not limited to the above embodiment, and can be variously modified within the scope of the gist thereof.

特に、内部電極やその引出電極の形状の細部、外部電極の位置、形状等は任意である。また、積層体内にはコンデンサ以外に他の素子が内蔵されており、複合電子部品を構成していてもよい。   In particular, the details of the shape of the internal electrode and its extraction electrode and the position and shape of the external electrode are arbitrary. In addition to the capacitor, another element may be built in the multilayer body to constitute a composite electronic component.

本発明に係る積層コンデンサの第1実施形態を模式的に示し、(A)は斜視図、(B)は正面図。BRIEF DESCRIPTION OF THE DRAWINGS The 1st Embodiment of the multilayer capacitor based on this invention is shown typically, (A) is a perspective view, (B) is a front view. 本発明に係る積層コンデンサにおける引出電極間距離aと垂直距離bとの関係を示すグラフ。The graph which shows the relationship between the distance a between the extraction electrodes in the multilayer capacitor which concerns on this invention, and the perpendicular distance b. 本発明に係る積層コンデンサにおける係数KとESLとの関係を示すグラフ。The graph which shows the relationship between the coefficient K and ESL in the multilayer capacitor concerning this invention. 前記第1実施形態の種々の変形例を示す正面図。The front view which shows the various modifications of the said 1st Embodiment. 本発明に係る積層コンデンサの第2実施形態を模式的に示す正面図。The front view which shows typically 2nd Embodiment of the multilayer capacitor based on this invention. 本発明に係る積層コンデンサの第3実施形態を模式的に示す正面図。The front view which shows typically 3rd Embodiment of the multilayer capacitor based on this invention.

符号の説明Explanation of symbols

1…積層体
2…実装面
11…第1の内部電極
12…引出電極
21…第2の内部電極
22…引出電極
31,32…外部電極
DESCRIPTION OF SYMBOLS 1 ... Laminated body 2 ... Mounting surface 11 ... 1st internal electrode 12 ... Extraction electrode 21 ... 2nd internal electrode 22 ... Extraction electrode 31, 32 ... External electrode

Claims (1)

誘電体層と静電容量を形成するための内部電極とが積層されており、該内部電極が実装面と直交する方向に位置し、該内部電極から引き出された引出電極が積層体の表面に設けた外部電極と電気的に接続されている積層コンデンサにおいて、
前記内部電極は互いに対向する第1及び第2の内部電極を有し、
前記外部電極は、前記第1の内部電極の引出電極と電気的に接続される第1の外部電極と、前記第2の内部電極の引出電極と電気的に接続される第2の外部電極と、を有し、
前記第1の外部電極は、前記実装面と、前記実装面と対向する上面と、前記実装面及び前記上面を結ぶ第1の側面と、に跨って連続的に形成され、
前記第2の外部電極は、前記実装面と、前記実装面と対向する上面と、前記実装面及び前記上面を結びかつ前記第1の側面と対向する第2の側面と、に跨って連続的に形成され、
前記第1の内部電極は、前記実装面と前記上面と前記第1の側面とにおいて、前記第1の外部電極と電気的に接続され、かつ、前記第1の内部電極の引出電極は、前記第1の側面の前記実装面側から前記上面側にかけての寸法と同じ幅をもって前記第1の側面に引き出され、
前記第2の内部電極は、前記実装面と前記上面と前記第2の側面とにおいて、前記第2の外部電極と電気的に接続され、かつ、前記第2の内部電極の引出電極は、前記第2の側面の前記実装面側から前記上面側にかけての寸法と同じ幅をもって前記第2の側面に引き出され、
互いに対向する第1及び第2の内部電極のそれぞれの引出電極の距離aと、第1の内部電極から実装面までの距離b1と、第2の内部電極から実装面までの距離b2との関係が以下の式を満足すること、
1.64a+(b1+b2)≦0.85
但し、a,b1,b2の単位はmm
を特徴とする積層コンデンサ。
A dielectric layer and an internal electrode for forming a capacitance are laminated, the internal electrode is positioned in a direction orthogonal to the mounting surface, and an extraction electrode drawn from the internal electrode is formed on the surface of the laminate. In the multilayer capacitor that is electrically connected to the provided external electrode,
The internal electrodes have first and second internal electrodes facing each other;
The external electrode includes a first external electrode electrically connected to the extraction electrode of the first internal electrode, and a second external electrode electrically connected to the extraction electrode of the second internal electrode Have
The first external electrode is continuously formed across the mounting surface, an upper surface facing the mounting surface, and a first side surface connecting the mounting surface and the upper surface,
The second external electrode is continuous across the mounting surface, an upper surface facing the mounting surface, and a second side surface connecting the mounting surface and the upper surface and facing the first side surface. Formed into
The first internal electrode is electrically connected to the first external electrode at the mounting surface, the top surface, and the first side surface, and the lead electrode of the first internal electrode is The first side surface is drawn to the first side surface with the same width as the dimension from the mounting surface side to the upper surface side;
The second internal electrode is electrically connected to the second external electrode at the mounting surface, the top surface, and the second side surface, and the extraction electrode of the second internal electrode is The second side surface is drawn to the second side surface with the same width as the dimension from the mounting surface side to the upper surface side;
The distance a between the lead electrodes of the first and second internal electrodes facing each other, the distance b 1 from the first internal electrode to the mounting surface, and the distance b 2 from the second internal electrode to the mounting surface Satisfying the following equation:
1.64a + (b 1 + b 2 ) ≦ 0.85
However, the unit of a, b 1 and b 2 is mm.
Multilayer capacitor characterized by
JP2008109678A 2008-04-19 2008-04-19 Multilayer capacitor Expired - Lifetime JP5031650B2 (en)

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JP2009194096A (en) 2008-02-13 2009-08-27 Murata Mfg Co Ltd Component built-in substrate and component package using the same
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JPS5721312Y2 (en) * 1975-08-06 1982-05-08
JPS60149125U (en) * 1984-03-13 1985-10-03 株式会社村田製作所 multilayer capacitor
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JPH1167583A (en) * 1997-08-26 1999-03-09 Taiyo Yuden Co Ltd Laminated type electronic component
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