JP2009059888A - Multilayer ceramic capacitor - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a multilayer ceramic capacitor which can suppress substrate noise when mounted on a mounting substrate, does not easily generate cracks, and can advance miniaturization, especially height reduction. <P>SOLUTION: In the multilayer ceramic capacitor 1, first capacitor parts 3 and 4 comprise: a first lamination part where a plurality of ceramic layers extended in a direction parallel to a mounting surface are laminated; and internal electrodes 6 and 7 disposed so as to be piled up through at least one ceramic layer in the first lamination part, wherein a second capacitor part comprises: a second lamination part where a plurality of ceramic layers extended in a direction vertical to the mounting surface are laminated; and a plurality of internal electrodes 11 and 12 disposed so as to be piled up through at least one ceramic layer in the second lamination part. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention relates to a multilayer ceramic capacitor provided with a plurality of capacitor portions, and more particularly to a multilayer ceramic capacitor having first and second capacitor portions in which the lamination directions of ceramic layers are different.

  In recent years, with the improvement in performance of mobile electronic devices such as mobile phones and notebook computers, the performance of CPUs and the like mounted thereon has been increasing. Therefore, it has become difficult to reduce power consumption. On the other hand, there is a strong demand for mobile electronic devices that can be driven by batteries for a longer time.

  Therefore, there is a strong demand for improving the conversion efficiency of the power source of mobile electronic devices. As a power supply device for a mobile electronic device, a DC-DC converter excellent in conversion efficiency has been widely used. In the DC-DC converter circuit, capacitors are used in the input part and the output part. A capacitor used in the input portion is used for storing electric charge. Therefore, it is desirable that the capacitor at the input portion has a low equivalent series resistance (ESR) and a high capacitance. Further, in the DC-DC converter, a ripple voltage is inevitably generated due to its operation principle. This ripple voltage depends on the impedance of the capacitor on the output side. Therefore, in order to suppress the ripple voltage, it is desirable that the equivalent series inductance (ESL) and equivalent series resistance (ESR) of the capacitor disposed on the output side be low.

  In recent years, with the further miniaturization of mobile electronic devices, there is a strong demand for miniaturization of power supply devices. Therefore, downsizing of DC-DC converters frequently used as power supply devices and capacitors used in the converters is also strongly demanded. Therefore, a multilayer ceramic capacitor is mainly used as a capacitor because a large capacitance, a low equivalent series resistance, a low equivalent series inductance can be realized, and the size can be further reduced.

  In the DC-DC converter, a DC voltage on which a ripple voltage of an AC component is superimposed is applied to the multilayer ceramic capacitor. Therefore, vibration due to the electrostrictive effect occurs in the multilayer ceramic capacitor. When the multilayer ceramic capacitor vibrates, the vibration propagates to the mounting substrate on which the multilayer ceramic capacitor is mounted. As a result, when the mounting substrate vibrates and the vibration frequency of the mounting substrate reaches the audible frequency band, an audible sound is generated from the substrate. That is, the phenomenon of “board noise” sometimes occurs.

  Various attempts have been made to suppress the substrate noise. For example, Patent Document 1 below discloses a capacitor 1001 shown in FIG. Capacitor 1001 includes a capacitor main body 1002 made of ceramics, and external terminal electrodes 1003 and 1004 provided at both ends of capacitor main body 1002. Metal terminals 1005 and 1006 are joined to the external terminal electrodes 1003 and 1004. The metal terminals 1005 and 1006 extend from the portion joined to the external terminal electrodes 1003 and 1004 to the lower side of the capacitor body 1002 and are bent toward the counterpart metal terminal at the lower end.

  The terminal portions 1005a and 1006a formed by bending are parallel to the upper surface and the lower surface of the capacitor body 1002. Therefore, the capacitor 1001 can be mounted on the mounting substrate from the metal terminal portions 1005a and 1006a side. As a result, the mounting is performed in a state where the capacitor main body 1002 is floated from the mounting substrate. Therefore, even if vibration occurs in the capacitor main body 1002, it is possible to prevent propagation of the vibration to the mounting board.

Patent Document 2 below discloses a structure in which first and second capacitors are mounted on both surfaces of a mounting board. Here, the first capacitor and the second capacitor are arranged at positions where they overlap with each other with the mounting substrate interposed therebetween, and the specifications of the first and second capacitors are the same. Then, the vibrations generated by the first and second capacitors cancel each other, thereby suppressing board noise.
JP 2004-153121 A JP 2000-23320 A

  As described in Patent Document 1, in the structure in which the capacitor main body 1002 is mounted in a state of being floated from the mounting substrate, the height reduction of the mounting structure is impaired. Therefore, the mounting structure using the metal terminals 1005 and 1006 has a problem that the mobile electronic device cannot be reduced in size. In addition, since it must be mounted at the terminal portions 1005a and 1006a of the metal terminals 1005 and 1006, the degree of freedom in circuit design on the mounting substrate has to be reduced.

  On the other hand, in the structure described in Patent Document 2, two capacitors must be disposed on both sides of the mounting board between the mounting boards, and the mounting structure has to be complicated. In addition, since it is necessary to mount the first and second capacitors having the same specifications on both surfaces of the mounting substrate, it is difficult to reduce the height of the mounting structure.

  The object of the present invention is to eliminate the above-mentioned drawbacks of the prior art and to suppress the squealing of the substrate, and to reduce the size of the mounting structure of the multilayer ceramic capacitor, in particular, to reduce the height, and to design the circuit on the mounting substrate. It is an object of the present invention to provide a monolithic ceramic capacitor that can ensure a high degree of freedom.

  A multilayer ceramic capacitor according to the present invention has a mounting surface facing a substrate surface of a mounting substrate, and a first multilayer portion in which a plurality of ceramic layers extending in a direction parallel to the mounting surface are stacked. A capacitor body having a plurality of ceramic layers extending in a direction perpendicular to the mounting surface, and at least one ceramic layer in the first layered portion of the capacitor body. A plurality of internal electrodes constituting the first capacitor portion and thereby arranged in the second stacked portion so as to overlap with each other via at least one ceramic layer; and A plurality of internal electrodes constituting the second capacitor portion and the outer surface of the capacitor body are thereby formed, and the first and second capacitor portions are formed. Further comprising an external terminal electrodes are electrically connected to one of the internal electrodes constituting characterized.

  In the multilayer ceramic capacitor according to the present invention, preferably, the plurality of internal electrodes constituting the first capacitor portion include first and second internal electrodes connected to different potentials, The plurality of internal electrodes constituting the second capacitor portion are connected to the same potential as the first internal electrode, and the third internal electrode is connected to the same potential as the second internal electrode. 4 internal electrodes. Preferably, in the portion where the first and second capacitor portions are adjacent to each other, the first internal electrode and the third internal electrode, or the second internal electrode and the fourth internal electrode are electrically connected. Connected.

  Preferably, when the direction orthogonal to the mounting surface is the height direction of the multilayer ceramic capacitor, the first capacitor portion and the second capacitor portion are arranged adjacent to each other in the height direction. Yes. In this case, since the first capacitor portion and the second capacitor portion are adjacent to each other in the height direction, the first and second capacitor portions are laminated so that the multilayer ceramic capacitor of the present invention is It can be manufactured easily.

  More preferably, the first capacitor unit includes a pair of first capacitor units, and the second capacitor unit is disposed between the pair of first capacitor units in the height direction. In this case, since the first capacitor portion is disposed on both sides in the height direction of the second capacitor portion, the multilayer ceramic capacitor can be mounted from either the upper surface side or the lower surface side of the capacitor body. it can. That is, the directionality in mounting can be reduced.

  But in this invention, the 1st capacitor | condenser part may be arrange | positioned only in the height direction one side of the 2nd capacitor | condenser part. In that case, it is possible to reduce the height of the multilayer ceramic capacitor.

  Preferably, the second capacitor unit includes a pair of capacitor units, and the first capacitor unit is disposed between the pair of second capacitor units. Even in this case, the directionality in mounting can be reduced.

  More preferably, the capacitor in the first capacitor portion is longer than the length of the internal electrode of the first capacitor portion close to the portion where the first capacitor portion and the second capacitor portion are adjacent to each other. The length of the internal electrode close to the outer surface of the main body is shortened. Therefore, the length of the internal electrode of the first capacitor portion on the side close to the mounting board can be relatively shortened, and the electrostatic capacity on the side close to the mounting board can be increased while making the capacitance by the first capacitor portion sufficiently large. The capacity can be lowered. Thereby, the vibration source due to the electrostrictive effect can be moved away from the mounting substrate. Therefore, the influence of the vibration of the multilayer ceramic capacitor on the mounting substrate can be further reduced.

  Preferably, in the second capacitor portion, the thickness of the ceramic layer sandwiched between the internal electrodes is made larger than the thickness of the ceramic layer sandwiched between the internal electrodes in the first capacitor portion. More preferably, the thickness of the ceramic layer in the second capacitor portion is 1.5 to 3 times the thickness of the ceramic layer in the first capacitor portion. Usually, in chip-type electronic components such as multilayer ceramic electronic components, the lengthwise dimension is longer than the heightwise dimension, and the area of the end faces located at both ends in the lengthwise direction is larger than that of the upper and lower surfaces. Usually small. Therefore, the area of the interface where the ceramic layers are laminated in the second capacitor part is usually smaller than the area of the interface where the ceramic layers are laminated in the first capacitor part. In order to stack a large number of thin ceramic layers having a small area, it is required to increase the stacking accuracy and the cutting accuracy in the manufacturing process. However, if the thickness of the ceramic layer is increased in the second capacitor portion, it is possible to suppress misalignment during cutting. Therefore, variation in the characteristics of the multilayer ceramic capacitor can be reduced.

  In the present invention, preferably, the plurality of internal electrodes and the capacitor body are made of a ceramic sintered body obtained by an internal electrode-ceramics integrated firing technique. That is, since the ceramic sintered body obtained by the internal electrode-ceramics integrated firing technique is used, it is easy to manufacture a multilayer ceramic capacitor and it is difficult to increase the cost.

  According to the multilayer ceramic capacitor of the present invention, the first and second capacitor portions are formed in one capacitor body, and in the first capacitor portion, the plurality of ceramic layers are in a direction parallel to the mounting surface. In the second capacitor portion, the plurality of ceramic layers are extended in a direction perpendicular to the mounting surface. Therefore, even if an electrostrictive effect is generated during driving, the electric current in the first capacitor portion is reduced. Since the expansion / contraction direction caused by the distortion effect is different from the expansion / contraction direction of the ceramic due to the electrostriction effect in the second capacitor portion, the distortion due to the electrostriction effect of the entire capacitor body can be reduced. Therefore, the propagation of vibration to the mounting substrate based on the distortion of the capacitor body due to the electrostrictive effect can be suppressed, and so-called board noise can be suppressed. In addition, stress concentration caused by the electrostrictive effect is reduced. Therefore, cracks are hardly generated in the capacitor body during driving.

  Hereinafter, the present invention will be clarified by describing specific embodiments of the present invention with reference to the drawings.

  FIG. 1 is a perspective view showing an appearance of a multilayer ceramic capacitor according to a first embodiment of the present invention, and FIG. 2 is a longitudinal sectional view of the multilayer ceramic capacitor.

The multilayer ceramic capacitor 1 has a rectangular parallelepiped capacitor body 2. The capacitor body 2 is made of a ceramic sintered body obtained by a well-known internal electrode-ceramic integrated firing technique. As the ceramic material constituting the capacitor body 2, various dielectric ceramic materials mainly composed of dielectric ceramics such as BaTiO ₃ , CaTiO ₃ , SrTiO _3, or CaZrO ₃ can be used. Moreover, you may use the material which added subcomponents, such as a Mn compound, Fe compound, Cr compound, Co compound, or Ni compound, to these main components suitably. Appropriate dielectric ceramics such as barium titanate ceramics can be used.

  The capacitor body 2 has an upper surface 2a and a lower surface 2b as a mounting surface. The multilayer ceramic capacitor 1 is mounted on a mounting substrate described later from the lower surface 2b side as a mounting surface. In the multilayer ceramic capacitor 1, the first capacitor parts 3 and 4 are arranged on both sides of the second capacitor part 5 in the height direction when the direction connecting the upper surface 2 a and the lower surface 2 b is the height direction. The first capacitor parts 3 and 4 have the same structure. Therefore, since the structure is the same on the lower surface 2b side and the upper surface 2b side, the upper surface 2a side may be the mounting surface.

  The first capacitor unit 3 includes a first stacked unit in which a plurality of ceramic layers extending in a direction parallel to the mounting surface are stacked, and first and second internal electrodes 6 and 7. The first and second internal electrodes 6 and 7 are extended in a direction parallel to the mounting surface. Similarly, the first capacitor portion 4 also includes a first laminated portion in which a plurality of ceramic layers extending in a direction parallel to the mounting surface are laminated, and first and second internal electrodes 8 that overlap with each other via the ceramic layer. , 9.

  In the first capacitor unit 3, the first internal electrode 6 is drawn out to the first end face 2c of the ceramic sintered body. On the other hand, the second internal electrode 7 is drawn out to the second end face 2d opposite to the end face 2a of the ceramic sintered body. The first internal electrode 6 and the second internal electrode 7 overlap with each other via at least one ceramic layer constituting the first laminated portion. Therefore, a capacitance is taken out between the first and second internal electrodes 6 and 7.

  On the other hand, also in the 1st capacitor | condenser part 4, the 1st internal electrode 8 and the 2nd internal electrode 9 have overlapped through at least one layer of ceramic layers similarly.

  The first internal electrode 8 is drawn out to the first end face 2c, and the second internal electrode 9 is drawn out to the second end face 2d.

  The second capacitor unit 5 includes a second stacked unit in which a plurality of ceramic layers extending in a direction perpendicular to the mounting surface are stacked, and third and third layers disposed so as to overlap at least one ceramic layer. 4 internal electrodes 11 and 12. Therefore, the internal electrodes 11 and 12 are extended in a direction perpendicular to the mounting surface.

  In the second capacitor unit 5, the third internal electrode 11 and the fourth internal electrode 12 overlap with each other via at least one ceramic layer extending in a direction perpendicular to the mounting surface. And the 3rd internal electrode 11 and the 4th internal electrode 12 are alternately arrange | positioned in the direction which connects the end surfaces 2c and 2d. The third internal electrode 11 is electrically connected to the first internal electrode 8 of the first capacitor unit 4 at the lower end. On the other hand, the fourth internal electrode 12 is electrically connected to the second internal electrode 7 of the first capacitor unit 3 at the upper end.

  The first and second internal electrodes 6 to 9 and the third and fourth internal electrodes 11 and 12 are made of an appropriate metal or alloy such as Ni, Ag, Pd, or Cu. Specifically, in obtaining a ceramic sintered body, a conductive paste containing these metals or alloys is printed on a ceramic green sheet and baked in a firing step to obtain a ceramic sintered body, thereby causing internal electrodes 6 to 9 and 11. , 12 are formed.

  First and second external terminal electrodes 13 and 14 are formed so as to cover the end faces 2c and 2d of the ceramic sintered body. In the present embodiment, the external terminal electrodes 13 and 14 are formed by plating on the outer surfaces of the first electrode layers 13a and 14a formed by applying and baking the conductive paste, respectively, and the first electrode layers 13a and 14a. Second electrode layers 13b and 14b.

  The first electrode layers 13a and 14a can be formed by applying and baking a conductive paste containing an appropriate metal or alloy such as Ni, Ag, Cu, or Au, for example. The second electrode layers 13b and 14b can be formed of an appropriate metal such as Sn or Sn alloy for improving solderability. However, the external terminal electrodes 13 and 14 may be formed of a single metal layer, or may have a structure in which three or more metal layers are stacked.

  When the internal electrode is made of inexpensive Ni, the first electrode layers 13a and 14a are preferably made of a base metal such as Cu or Ni in order to improve electrical connectivity with the internal electrode.

  In the external terminal electrodes 13 and 14, a stress relaxation resin layer may be interposed between the first and second electrode layers.

  Further, the method for forming the external terminal electrodes 13 and 14 is not particularly limited. For example, before the sintering step for obtaining the ceramic sintered body, the conductive paste is applied to the surface, and in the firing step for obtaining the ceramic sintered body, the first electrode layer 13a made of the above-mentioned baked electrode, 14a may be formed. Alternatively, the first electrode layers 13a and 14a may be formed by applying and baking a conductive paste after obtaining a ceramic sintered body.

  A feature of the multilayer ceramic capacitor 1 according to the present embodiment is that the capacitor body 2 is provided with the first capacitor portions 3 and 4 and the second capacitor portion 5, whereby a mounting board is provided. In addition, it is possible to suppress board noise after mounting. This will be described with reference to FIG. 3 in addition to FIG. FIG. 3 is a front sectional view showing a structure in which the multilayer ceramic capacitor 1 is mounted on the mounting substrate 15.

  Electrode lands 16 and 17 are provided on the upper surface of the mounting substrate 15. The external terminal electrodes 13 and 14 of the multilayer ceramic capacitor 1 are joined to the electrode lands 16 and 17 by solders 18 and 19, and the multilayer ceramic capacitor 1 is mounted on the mounting substrate 15.

  When the multilayer ceramic capacitor 1 is mounted as described above from the lower surface 2b side which is the mounting surface and is actually driven, a DC electric field is applied to the first capacitor portions 3 and 4 and the second capacitor portion 5. Is applied. Therefore, the ceramic layer sandwiched between the internal electrodes connected to different potentials is distorted due to the electrostrictive effect. For example, in the first capacitor unit 3, the first internal electrode 6 and the second internal electrode 7 are connected to different potentials, and thus are sandwiched between the first and second internal electrodes 6 and 7. The ceramic layer is distorted by the electrostrictive effect. Also in the first capacitor unit 4, the ceramic layer sandwiched between the first internal electrode 8 and the second internal electrode 9 is distorted by the electrostrictive effect.

  On the other hand, in the second capacitor unit 5, the third internal electrode 11 and the fourth internal electrode 12 are connected to different potentials, so that they are sandwiched between the third and fourth internal electrodes 11, 12. The ceramic layer is also distorted by the electrostrictive effect.

  In a conventional multilayer ceramic capacitor, a phenomenon called substrate squealing has occurred due to vibration generated by distortion of a ceramic layer sandwiched between internal electrodes connected to different potentials due to an electrostrictive effect.

  On the other hand, in the multilayer ceramic capacitor 1, although distortion due to the electrostrictive effect occurs, in the first capacitor portions 3 and 4, a ceramic layer extending in a direction parallel to the mounting surface is indicated by an arrow B in FIG. Extends and contracts. In the second capacitor unit 5, the ceramic layer extending in the direction perpendicular to the mounting surface expands and contracts in the direction indicated by the arrow C in FIG.

  Therefore, the expansion and contraction strain due to the electrostriction effect in the first capacitor portions 3 and 4 is different from the direction of the stretch strain due to the electrostriction effect in the second capacitor portion 5. It is possible to reduce the vibration caused by. Therefore, the vibration propagating to the mounting board 15 is reduced, and board noise can be suppressed.

  In addition, in the conventional multilayer ceramic capacitor, the direction of expansion and contraction due to the electrostrictive effect in the ceramic layers sandwiched between a plurality of internal electrodes connected to different potentials was all the same, so stress concentration was likely to occur. On the other hand, in the multilayer ceramic capacitor of this embodiment, stress concentration due to the electrostrictive effect is also suppressed. As a result, cracks in the capacitor body 2 made of a ceramic sintered body hardly occur.

  Next, an example of a method for manufacturing the multilayer ceramic capacitor 1 will be described with reference to FIGS.

  FIG. 4 is an exploded perspective view showing a plurality of ceramic green sheets for obtaining the second capacitor unit 5. In forming the second capacitor portion 5, a rectangular ceramic green sheet 21 on which a conductive paste constituting the third internal electrode 11 is printed and a conductive paste for forming the fourth internal electrode 12 are printed. The formed ceramic green sheets 22 are alternately stacked, and an appropriate number of plain rectangular ceramic green sheets 23 are stacked on the outer side in the stacking direction.

  As shown in FIG. 5, the ceramic green sheets for forming the first capacitor parts 3 and 4 above and below the laminate 24 for constituting the second capacitor part obtained as described above are appropriately formed. Stack several sheets. Here, below the ceramic laminate 24, a rectangular ceramic green sheet 25 having a conductive paste for forming the first internal electrode 8 formed on the upper surface and a second internal electrode 9 is formed. Ceramic green sheets 26 on which conductive paste is printed are alternately stacked. In addition, a plain ceramic green sheet 27 is laminated below.

  Similarly, above the ceramic laminate 24, a ceramic green sheet 28 having a conductive paste for forming the first internal electrode 6 printed on the lower surface and a conductive paste for forming the second internal electrode 7. Are alternately laminated with ceramic green sheets 29 printed on the lower surface. On the upper side, an appropriate number of plain ceramic green sheets 27 are laminated.

  The capacitor body 2 can be obtained by firing the laminate thus obtained.

  In FIG. 4, the conductive paste for forming the third and fourth internal electrodes 11 and 12 is printed so as not to reach both ends of the ceramic green sheets 21 and 22 in the length direction. Therefore, in the ceramic laminate 24 shown in FIG. 5, the internal electrode 11 exposed on the upper surface is not exposed on the side surface 24a of the laminate 24 and the other side surface not shown.

  On the other hand, as in the modification shown in FIG. 6, the third and fourth internal electrode forming conductive pastes printed on the ceramic green sheets 21 and 22 are connected to both ends in the length direction of the ceramic green sheets 21 and 22. You may print so that it may reach. In that case, as shown in FIG. 7, in the ceramic laminate 24A, the internal electrodes 11 and 12 are exposed on the side surface 24a and the opposite side surface of the ceramic laminate 24A.

  As shown in FIGS. 5 and 6, the internal electrode forming conductive paste is formed so as to reach both ends of the ceramic green sheets 21, 22, and the internal electrodes 6, 7, 8, 9 are also formed to the full width of the ceramic green sheet. When it has reached, it is desirable to further apply ceramic slurry to both side surfaces of the laminate before firing including the ceramic laminate 24A to form side gaps on the side surfaces.

  In the multilayer ceramic capacitor 1 according to the first embodiment, in the second capacitor unit 5, the electrodes that electrically connect the lower ends of the plurality of third internal electrodes 11 and are connected to the external terminal electrode 13. As described above, the first internal electrode 8 of the first capacitor unit 4 is used, but a plurality of third internal electrodes 11 of the second capacitor unit 5 are commonly connected separately from the first internal electrode 8. A connecting conductor may be provided. Similarly, it is not necessary to use the second internal electrode 7 of the first capacitor unit for the electrode that is connected in common to the plurality of fourth internal electrodes 12 and is electrically connected to the external terminal electrode 14, and is connected separately. A conductor may be provided.

  As a configuration for electrically connecting the third and fourth internal electrodes 11 and 12 of the second capacitor portion to the external terminal electrodes 13 and 14, a conductor connecting the third internal electrodes or A configuration in which the conductor connecting the fourth inner electrodes is electrically connected via a via-hole conductor or the like may be used.

  FIG. 8 is a front cross-sectional view showing a modification of the multilayer ceramic capacitor 1 of the first embodiment. The multilayer ceramic capacitor 31 of the present modification is configured similarly except that the internal electrodes in the first capacitor portions 3A and 4A are different from those of the first embodiment. Therefore, only different parts will be described.

  In the first capacitor portion 3A, along the height direction of the capacitor body 2, from the upper surface 2a of the capacitor body 2 toward the second capacitor portion 5A, the second internal electrode 7b, the first internal electrode 6, and Second internal electrodes 7a are stacked in this order. And the length of the 2nd internal electrode 7b near the upper surface 2a which is an outer surface is made shorter than the length of the 2nd internal electrode 7a of the thickness direction center side. Here, the length of the internal electrode refers to a dimension in a direction in which the internal electrode extends from a portion where the internal electrode is drawn to the end face 2c or 2d of the capacitor body toward the opposite end face of the capacitor body 2.

  In the first capacitor portion 3A, the area of the portion where the second internal electrode 7b and the first internal electrode 6 located on the upper surface 2a side of the capacitor body 2 overlap with each other is the same as that of the first internal electrode 6. The area of the second internal electrode 7a located at the center of the capacitor body 2 in the height direction overlaps with the ceramic layer. Therefore, the influence of distortion due to the electrostrictive effect is relatively reduced on the upper surface 2a side in the first capacitor unit 3A.

  Similarly, also in the first capacitor portion 4A, the length of the second internal electrode 8b on the side close to the lower surface 2b as the outer surface is the second internal electrode 8a located on the center side of the capacitor body 2. It is shorter than the length. Therefore, the distortion due to the electrostriction effect on the lower surface 2b side is made smaller than the distortion due to the electrostriction effect on the second capacitor portion 5A side.

  Therefore, since the distortion due to the electrostrictive effect in the vicinity of the upper surface 2a or the lower surface 2b can be relatively reduced, when the upper surface 2a or the lower surface 2b is used as a mounting surface, board noise can be further suppressed.

  FIG. 9 is a front cross-sectional view showing a second modification of the multilayer ceramic capacitor of the first embodiment. The multilayer ceramic capacitor 32 of the second menopause example has the same configuration except that the structure of the second capacitor unit 5B is different from that of the second capacitor unit 5 of the first embodiment.

  In the second capacitor portion 5B, the third internal electrode 11 and the fourth internal electrode 12 overlap with each other through at least one ceramic layer, but are sandwiched between the third and fourth internal electrodes 11 and 12. The thickness of the ceramic layer is relatively increased. That is, between the internal electrodes 6, 7 connected to different potentials in the first capacitor parts 3, 4 or the thickness of the ceramic layer sandwiched between the internal electrodes 8, 9, the distance between the third and fourth internal electrodes The thickness of the ceramic layer sandwiched between the internal electrodes 6 and 7 or the thickness of the ceramic layer sandwiched between the internal electrodes 8 and 9 in the first capacitor portions 3 and 4 is preferably 1. It is formed to have a thickness of 5 to 3 times.

  Thereby, in a normal chip-type multilayer ceramic capacitor having a dimension in the length direction larger than the dimension in the width direction, the manufacturing process in the second capacitor unit 5B in which the area where the internal electrodes overlap with each other via the ceramic layer tends to be small. It is possible to alleviate the effects of misalignment and cutting misalignment. That is, when the thickness of the ceramic layer sandwiched between the internal electrodes is thin, misalignment or cutting in the manufacturing process is likely to occur. However, in the second capacitor portion 5B, the thickness of the ceramic layer is increased, so that stacking deviation and cutting deviation are unlikely to occur. Therefore, variation in the characteristics of the multilayer ceramic capacitor can be reduced.

  FIG. 10 is a front sectional view of the multilayer ceramic capacitor according to the second embodiment of the present invention. In the multilayer ceramic capacitor 41 of the second embodiment, in the height direction of the capacitor main body 2, the first capacitor portion 43 is configured upward, and the second capacitor portion 5 is configured downward. In other words, the first capacitor unit 43 is disposed only on one side in the height direction of the second capacitor unit 5. In the first capacitor unit 43, more internal electrodes 6 and 7 are laminated as compared with the first capacitor unit 3 of the first embodiment, but the basic structure is the same. That is, the first internal electrode 6 and the plurality of second internal electrodes 7 overlap with each other via a ceramic layer extending in a direction parallel to the lower surface 2b that is the mounting surface.

  Since the first capacitor part is not formed below the second capacitor part 5, the lower ends of the plurality of third internal electrodes 11 are commonly connected by the connection electrode 44. The connection electrode 44 is electrically connected to the first external terminal electrode 13.

  As in the second embodiment, the first capacitor portion 43 may be arranged only on one side of the second capacitor portion 5 in the height direction in the capacitor body 2.

  FIG. 11 is a front cross-sectional view of a multilayer ceramic capacitor according to the third embodiment of the present invention. In the multilayer ceramic capacitor 51 of the third embodiment, the first capacitor part 3 is disposed at the center of the capacitor body 2 in the height direction, and the second capacitor part is provided on both sides of the first capacitor part 3 in the height direction. 55, 55 are arranged. As described above, the second capacitor portions 55 and 55 may be disposed on both sides in the height direction of the first capacitor portion 3.

  In the upper second capacitor unit 55, the lower ends of the plurality of third internal electrodes 11 are commonly connected by the first internal electrode 6 of the first capacitor unit 3 and are electrically connected to the external terminal electrode 13. Has been. On the other hand, the plurality of fourth internal electrodes 12 are commonly connected by a connection electrode 52, and the connection electrode 52 is drawn out to the second end face 2 d and is electrically connected to the external terminal electrode 14. Similarly, in the lower second capacitor unit 55, the lower ends of the plurality of third internal electrodes 11 are connected to each other by the connection electrode 53 and electrically connected to the external terminal electrode 13. The fourth internal electrodes 12 are connected in common by the second internal electrode 7 of the first capacitor unit 3.

  Also in the multilayer ceramic capacitors 41 and 51 of the second and third embodiments, the direction of distortion due to the electrostrictive effect in the first capacitor portion is different from the direction of strain due to the electrostrictive effect in the second capacitor portion. Therefore, the distortion generated in the capacitor body as a whole can be reduced, and the vibration transmitted to the mounting board can be reduced, and board noise can be suppressed.

  Also in the third and fourth embodiments, stress concentration due to the electrostrictive effect in the capacitor body 2 is alleviated, and cracks in the capacitor body 2 are less likely to occur.

  In the monolithic ceramic capacitor 1 shown in FIG. 1, the capacitor body 2 has a normal dimension whose length direction is larger than that of the width direction. However, as shown in a schematic perspective view of FIG. The present invention can also be applied to the multilayer ceramic capacitor 61 in which the length dimension is smaller than the width dimension when the direction connecting the first and second end surfaces provided with the terminal electrodes is the length dimension. it can. In the multilayer ceramic capacitor 61, the dimension in the length direction, which is the direction connecting the first and second end faces where the external terminal electrodes 13, 14 are provided, is smaller than the width dimension, which is the direction connecting the pair of side surfaces. Has been.

  Next, the effects of the present invention will be clarified by describing specific experimental examples.

  The multilayer ceramic capacitor 1 of the first embodiment was produced. As the dielectric ceramic constituting the capacitor body 2, a barium titanate ceramic material was used, and the dimensions of the capacitor body 2 were 3.2 mm length × 1.6 mm width × 1.6 mm height.

  As shown in Table 1 below, multilayer ceramic capacitors of sample numbers 1 to 5 were produced. The element thickness in the following Table 1 refers to the thickness of the ceramic layer sandwiched between different internal electrodes, and in any of sample numbers 1 to 5, the first capacitor portion 3 and the second capacitor The thickness of the ceramic layer sandwiched between the internal electrodes in the part 5 was constant at 3.0 μm.

  Further, the electrode thickness refers to the thickness of the internal electrode, and the thicknesses of the first to fourth internal electrodes 6 to 12 are all 1.2 μm. The outer layer thickness is the thickness of the capacitor body portion between the uppermost internal electrode and the upper surface 2 a of the capacitor body 2 in the first capacitor portion 3 or the lowermost layer in the first capacitor portion 4. The dimension between the located internal electrode and the lower surface 2b of the capacitor body 2 shall be said. The thicknesses of the upper and lower outer layers were the same, and all were 75 μm as shown in Table 1. The number of layers in Table 1 below is the number of stacked internal electrodes. In Table 1 below, the number of stacked internal electrodes in the first capacitor portions 3 and 4 and the second capacitor portion 5 and the thickness in the T direction, that is, The dimension of each capacitor | condenser part along the T direction which is the thickness direction of the capacitor | condenser main body 2 is shown. Sample numbers 1 and 2 are both comparative examples having only one first capacitor portion.

The multilayer ceramic capacitor of the sample No. 1-5 was to prepare as described above was implemented using a solder on a glass epoxy substrate, thereafter, a voltage of DC1V + AC1V _P-P in the multilayer ceramic capacitor was driven. Then, sound was collected using a superdirective sound collecting microphone (Rion Co., Ltd., product number: NA-42), and the board sound pressure was obtained by the sound pressure measuring circuit shown in FIG. The results are shown in Table 2 below.

  Moreover, 144 monolithic ceramic capacitors of each sample number were prepared, and a DC voltage of 150 V was applied at a temperature of 150 ° C. for 60 minutes. Then, the occurrence rate of cracks as a structural defect in the capacitor body 2 was obtained using an ultrasonic flaw detector after voltage application. The results are shown in Table 2 below.

  In Table 2 below, the capacitances of the multilayer ceramic capacitors of sample numbers 1 to 5 are also described.

  As can be seen from Table 2, in sample numbers 1 and 2, the sound pressure is quite high at 57 dB and 54 dB, and the board noise is large. On the other hand, in sample numbers 3 to 5 which are examples of the present invention, it can be seen that the sound pressure can be suppressed to 50 dB or less. In addition, in Sample Nos. 1 and 2, the occurrence rate of cracks due to voltage application was as high as 15% or more, whereas in the multilayer ceramic capacitors of Sample Nos. 3 and 4, the occurrence of cracks was as high as 9% or less. In No. 5, the crack occurrence rate was 17%, which was the same as that of Sample Nos. 1 and 2, but the sound pressure, which was an evaluation of the substrate noise, was as low as 43 dB.

1 is a perspective view showing an appearance of a multilayer ceramic capacitor according to a first embodiment of the present invention. It is a longitudinal cross-sectional view of the multilayer ceramic capacitor shown in FIG. It is front sectional drawing which shows the structure which mounted the multilayer ceramic capacitor shown in FIG. 1 on the mounting board | substrate. FIG. 5 is a schematic exploded perspective view for explaining a plurality of ceramic green sheets and internal electrode patterns for constituting a second capacitor portion when manufacturing the multilayer ceramic capacitor of the first embodiment. In manufacturing the multilayer ceramic capacitor of the first embodiment, in addition to the step of laminating a plurality of ceramic green sheets for constituting the first capacitor portion above and below the ceramic laminate constituting the second capacitor portion. It is a schematic exploded perspective view which shows the example of. FIG. 6 is a schematic exploded perspective view for explaining another example of a plurality of ceramic green sheets and internal electrode patterns for constituting a second capacitor part when manufacturing the multilayer ceramic capacitor of the first embodiment. In manufacturing the multilayer ceramic capacitor of the first embodiment, a process of laminating a plurality of ceramic green sheets for constituting the first capacitor portion above and below the ceramic laminate constituting the second capacitor portion is shown. It is a schematic exploded perspective view. It is a front sectional view showing the multilayer ceramic capacitor concerning the 1st modification of a 1st embodiment. It is a front sectional view showing the multilayer ceramic capacitor concerning the 2nd modification of a 1st embodiment. It is front sectional drawing of the multilayer ceramic capacitor which concerns on the 2nd Embodiment of this invention. It is a front sectional view for explaining the modification of the multilayer ceramic capacitor of the second embodiment. It is a perspective view which shows the other specification of the multilayer ceramic capacitor to which this invention is applied. In a specific experimental example, it is a circuit diagram which shows the circuit used for measuring the sound pressure for evaluating board | substrate squeal. It is a perspective view which shows an example of the conventional capacitor | condenser.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 ... Multilayer ceramic capacitor 2 ... Capacitor main body 2a ... Upper surface 2b ... Lower surface (mounting surface)
2c, 2d ... 1st, 2nd end surface 3 ... 1st capacitor | condenser part 3A ... 1st capacitor | condenser part 4 ... 1st capacitor | condenser part 4A ... 1st capacitor | condenser part 5 ... 2nd capacitor | condenser part 5A, 5B ... 2nd capacitor | condenser part 6,7 ... 1st, 2nd internal electrode 7a, 7b ... 2nd internal electrode 8, 9 ... 1st, 2nd internal electrode 8a, 8b ... 1st internal electrode 11, 12 ... third and fourth internal electrodes 15 ... mounting substrate 16,17 ... electrode land 18,19 ... solder 21,22,23 ... ceramic green sheet 24 ... ceramic laminate 25,26,27,28 ... ceramic green sheet 29 ... Ceramic green sheets 31, 32 ... Multilayer ceramic capacitor 41 ... Multilayer ceramic capacitor 43 ... First capacitor part 44 ... Connecting electrode 51 ... Multilayer ceramic capacitor 52,53 Connection electrodes 55 ... second capacitor portion 61 ... laminated ceramic capacitor

Claims (10)

A first laminated portion having a mounting surface opposed to the substrate surface of the mounting substrate and having a plurality of ceramic layers extended in a direction parallel to the mounting surface; and a direction perpendicular to the mounting surface A capacitor body having a second laminated portion in which a plurality of ceramic layers extending to
A plurality of internal electrodes disposed in the first laminated portion of the capacitor body so as to overlap with each other via at least one ceramic layer, thereby forming a first capacitor portion;
A plurality of internal electrodes arranged in the second laminated portion so as to overlap with each other via at least one ceramic layer, thereby constituting a second capacitor portion;
An external terminal electrode formed on the outer surface of the capacitor body and electrically connected to any of the internal electrodes constituting the first and second capacitor portions. , Multilayer ceramic capacitor. The plurality of internal electrodes constituting the first capacitor section have first and second internal electrodes connected to different potentials;
The plurality of internal electrodes constituting the second capacitor unit are connected to a third internal electrode connected to the same potential as the first internal electrode, and to the same potential as the second internal electrode. The multilayer ceramic capacitor according to claim 1, further comprising a fourth internal electrode.   In the portion where the first and second capacitor portions are adjacent to each other, the first internal electrode and the third internal electrode, or the second internal electrode and the fourth internal electrode are electrically connected. The multilayer ceramic capacitor according to claim 1 or 2.   The first capacitor portion and the second capacitor portion are arranged adjacent to each other in the height direction when the direction orthogonal to the mounting surface is the height direction of the multilayer ceramic capacitor. Item 4. The multilayer ceramic capacitor according to any one of Items 1 to 3.   The first capacitor unit includes a pair of first capacitor units, and the second capacitor unit is disposed between the pair of first capacitor units in the height direction. Multilayer ceramic capacitor.   The multilayer ceramic capacitor according to claim 4, wherein the first capacitor portion is disposed only on one side in the height direction of the second capacitor portion.   5. The multilayer ceramic capacitor according to claim 4, wherein the second capacitor portion includes a pair of capacitor portions, and the first capacitor portion is disposed between the pair of second capacitor portions.   The first capacitor portion is closer to the outer surface of the capacitor body than the length of the internal electrode of the first capacitor portion near the portion where the first capacitor portion and the second capacitor portion are adjacent to each other. The multilayer ceramic capacitor according to claim 4, wherein the length of the internal electrode is shortened.   5. The thickness of the ceramic layer sandwiched between the internal electrodes in the second capacitor portion is greater than the thickness of the ceramic layer sandwiched between the internal electrodes in the first capacitor portion. 9. The multilayer ceramic capacitor according to any one of 8 above.   The multilayer ceramic capacitor according to claim 1, wherein the plurality of internal electrodes and the capacitor body are made of a ceramic sintered body obtained by an internal electrode-ceramics integrated firing technique.

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