KR101670120B1 - Multi-layered ceramic capacitor and board for mounting the same - Google Patents

Multi-layered ceramic capacitor and board for mounting the same Download PDF

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Publication number
KR101670120B1
KR101670120B1 KR1020140087580A KR20140087580A KR101670120B1 KR 101670120 B1 KR101670120 B1 KR 101670120B1 KR 1020140087580 A KR1020140087580 A KR 1020140087580A KR 20140087580 A KR20140087580 A KR 20140087580A KR 101670120 B1 KR101670120 B1 KR 101670120B1
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KR
South Korea
Prior art keywords
ceramic body
lead portion
draw
portion
internal electrode
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KR1020140087580A
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Korean (ko)
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KR20150033520A (en
Inventor
이교광
남주은
안영규
김진
Original Assignee
삼성전기주식회사
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Priority to KR1020130113129A priority Critical patent/KR20140038911A/en
Priority to KR1020130113129 priority
Application filed by 삼성전기주식회사 filed Critical 삼성전기주식회사
Priority claimed from US14/475,224 external-priority patent/US9627142B2/en
Publication of KR20150033520A publication Critical patent/KR20150033520A/en
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    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01GCAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES OR LIGHT-SENSITIVE DEVICES, OF THE ELECTROLYTIC TYPE
    • H01G4/00Fixed capacitors; Processes of their manufacture
    • H01G4/002Details
    • H01G4/228Terminals
    • H01G4/232Terminals electrically connecting two or more layers of a stacked or rolled capacitor
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01GCAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES OR LIGHT-SENSITIVE DEVICES, OF THE ELECTROLYTIC TYPE
    • H01G2/00Details of capacitors not covered by a single one of groups H01G4/00-H01G11/00
    • H01G2/02Mountings
    • H01G2/06Mountings specially adapted for mounting on a printed-circuit support
    • H01G2/065Mountings specially adapted for mounting on a printed-circuit support for surface mounting, e.g. chip capacitors
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01GCAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES OR LIGHT-SENSITIVE DEVICES, OF THE ELECTROLYTIC TYPE
    • H01G4/00Fixed capacitors; Processes of their manufacture
    • H01G4/002Details
    • H01G4/005Electrodes
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01GCAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES OR LIGHT-SENSITIVE DEVICES, OF THE ELECTROLYTIC TYPE
    • H01G4/00Fixed capacitors; Processes of their manufacture
    • H01G4/002Details
    • H01G4/018Dielectrics
    • H01G4/06Solid dielectrics
    • H01G4/08Inorganic dielectrics
    • H01G4/12Ceramic dielectrics
    • H01G4/1209Ceramic dielectrics characterised by the ceramic dielectric material
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10007Types of components
    • H05K2201/10015Non-printed capacitor

Abstract

The present invention relates to a ceramic body including a plurality of dielectric layers; A first internal electrode disposed inside the ceramic body and having a first lead portion exposed at a first side in the width direction of the ceramic body at a predetermined interval and a second internal electrode exposed in a widthwise first side of the ceramic body, A second internal electrode having a third lead portion spaced apart from the first lead portion by a predetermined distance; And first to third external electrodes disposed on a first widthwise side of the ceramic body and connected to the first and third lead portions, A distance from the longitudinal end of the ceramic body to the first draw portion is b, a longitudinal length of the ceramic body of the third draw-out portion is G1, and a longitudinal length of the ceramic body of the first draw- (G1 + 2 * G2) / [2 * (a + b)]? 2.500.

Description

BACKGROUND OF THE INVENTION 1. Field of the Invention [0001] The present invention relates to a multilayer ceramic capacitor,

The present invention relates to a multilayer ceramic capacitor and a mounting substrate thereof.

Background Art [0002] With the recent miniaturization and high capacity of electronic products, electronic components used in electronic products are required to be miniaturized and have a high capacity. As a result, demand for multilayer ceramic electronic components is increasing.

In the case of multilayer ceramic capacitors, if the equivalent series inductance (hereinafter referred to as " ESL ") is increased, the performance of the electronic product may deteriorate. As the electronic components become smaller and higher in capacity, Relatively large.

The so-called " LICC (Low Inductance Chip Capacitor) " is intended to reduce the distance between the external terminals to reduce the path of the current flow and thereby reduce the inductance of the capacitor.

On the other hand, the multilayer ceramic capacitor may have a structure in which a plurality of dielectric layers and internal electrodes of different polarities are alternately stacked between the dielectric layers.

Since the dielectric layer has piezoelectricity and electrostrictive properties, when a direct current or an alternating voltage is applied to the multilayer ceramic capacitor, piezoelectric phenomenon occurs between the internal electrodes and vibration may occur.

These vibrations are transmitted to the printed circuit board through the solder of the multilayer ceramic capacitor, and the entire printed circuit board becomes an acoustic radiation surface, thereby generating a noisy vibration sound.

The vibration sound may correspond to an audible frequency in the range of 20 to 20000 Hz which gives an uncomfortable feeling to a person, and an unpleasant vibration sound is called an acoustic noise.

A study on a multilayer ceramic capacitor for reducing the acoustic noise is still required.

Korean Patent Publication No. 2008-0110180

The present invention relates to a multilayer ceramic capacitor and a mounting substrate thereof.

One embodiment of the present invention is a ceramic body including a first internal electrode disposed inside a ceramic body and having a first lead portion exposed at one side of the ceramic body at a predetermined interval, A second internal electrode having a third lead portion spaced apart from the first lead portion by a predetermined distance, and first to third external electrodes disposed on the one side surface of the ceramic main body and connected to the first and third lead portions, respectively, And a distance between the first draw-out portion and the third draw-out portion, a distance from the longitudinal end of the ceramic body to the first draw-out portion, and a distance between the first draw-out portion and the third draw- The present invention provides a multilayer ceramic capacitor in which acoustic noise is controlled by adjusting the length in the longitudinal direction.

According to another aspect of the present invention, there is provided a ceramic body, comprising: a first internal electrode disposed inside a ceramic body and having a first lead portion exposed at a first lateral side of the ceramic body at a predetermined interval, A second internal electrode exposed at one side surface of the ceramic body and having a third lead portion spaced apart from the first lead portion by a predetermined distance, and a second internal electrode disposed at a first widthwise side of the ceramic body, Wherein a distance between the first draw-out portion and the third draw-out portion is a, a distance from the lengthwise end of the ceramic body to the first draw-out portion is b, (G1 + 2 * G2) / [2 * (a + b)]? 2.500, where G1 is the length in the longitudinal direction of the ceramic body of the lead portion, and G2 is the length in the longitudinal direction of the ceramic body of the first lead- And a multilayer ceramic capacitor.

According to another aspect of the present invention, there is provided a ceramic body, comprising: a first internal electrode disposed inside a ceramic body and having a first lead portion exposed at a second major surface in the thickness direction of the ceramic body, A second internal electrode exposed on the second main surface and having a third lead portion spaced apart from the first lead portion by a predetermined distance; and a second internal electrode disposed on a second main surface in the thickness direction of the ceramic main body and connected to the first and third lead portions Wherein a distance between the first draw-out portion and the third draw-out portion is a, a distance from the lengthwise end of the ceramic body to the first draw-out portion is b, (G1 + 2 * G2) / [2 * (a + b)]? 2.500, where G1 is the length in the longitudinal direction of the ceramic body of the lead portion, and G2 is the length in the longitudinal direction of the ceramic body of the first lead- Satisfying multilayer ceramic capacitors The.

Another embodiment of the present invention provides a mounting substrate for a multilayer ceramic capacitor including a printed circuit board having first to third electrode pads on the top and the multilayer ceramic capacitor mounted on the printed circuit board.

According to the present invention, since the length between the external electrodes is short, the substrate transfer of vibration generated in the multilayer ceramic capacitor is degraded, and acoustic noise can be reduced.

In addition, there is an effect that the mounting area can be reduced when the multilayer ceramic capacitor according to the present invention is mounted on a substrate.

1 is a perspective view showing a multilayer ceramic capacitor according to an embodiment of the present invention.
Fig. 2 is a schematic view showing the ceramic body of Fig. 1. Fig.
FIG. 3 is an exploded perspective view of FIG. 2. FIG.
4 is a perspective view showing a multilayer ceramic capacitor according to another embodiment of the present invention.
5 is a perspective view showing a multilayer ceramic capacitor according to another embodiment of the present invention.
6 is an exploded perspective view of Figs. 4 and 5. Fig.
7 is a perspective view showing a multilayer ceramic capacitor according to another embodiment of the present invention.
8 is a schematic view showing the ceramic body of Fig.
Fig. 9 is an exploded perspective view of Fig. 8. Fig.
10 is a perspective view showing a multilayer ceramic capacitor according to another embodiment of the present invention.
11 is a perspective view showing a multilayer ceramic capacitor according to another embodiment of the present invention.
12 is an exploded perspective view of Figs. 10 and 11. Fig.
13 is a perspective view showing a state in which the multilayer ceramic capacitor of FIG. 1 is mounted on a printed circuit board.
14 is a perspective view showing a state in which the multilayer ceramic capacitor of Fig. 7 is mounted on a printed circuit board.

The embodiments of the present invention can be modified into various other forms, and the scope of the present invention is not limited to the embodiments described below. Furthermore, embodiments of the present invention are provided to more fully explain the present invention to those skilled in the art. Accordingly, the shapes and sizes of the elements in the drawings may be exaggerated for clarity of description, and the elements denoted by the same reference numerals in the drawings are the same elements.

Throughout the specification, when an element is referred to as "comprising ", it means that it can include other elements as well, without excluding other elements unless specifically stated otherwise.

In order to clearly illustrate the present invention in the drawings, thicknesses are enlarged in order to clearly illustrate various layers and regions, and parts not related to the description are omitted, and similar parts are denoted by similar reference numerals throughout the specification .

Multilayer Ceramic Capacitors

A multilayer ceramic capacitor according to an embodiment of the present invention includes a ceramic body including a plurality of dielectric layers and a first lead portion disposed inside the ceramic body and exposed at one side of the ceramic body at a predetermined interval A second internal electrode having a first internal electrode and a third lead portion exposed at the one side of the ceramic body and spaced apart from the first lead portion by a predetermined distance, and a second internal electrode disposed on the one side of the ceramic body, And a third outgoing electrode connected to the third outgoing portion, wherein the distance between the first outgoing portion and the third outgoing portion and the distance from the longitudinal end of the ceramic body to the first outgoing portion And adjusting a longitudinal length of the ceramic body of the first lead portion and the third lead portion to adjust the acoustic noise.

According to an embodiment of the present invention, the distance between the first draw-out portion and the third draw-out portion, the distance from the longitudinal end of the ceramic body to the first draw-out portion, and the distance between the first draw- By adjusting the longitudinal length of the ceramic body, acoustic noise can be reduced when a voltage is applied after mounting the multilayer ceramic capacitor on a printed circuit board.

In particular, the distance between the first lead portion and the third lead portion is related to an equivalent series inductance (ESL) value and an acoustic noise increase / decrease.

Also, the distance from the longitudinal end of the ceramic body to the first lead portion may be increased or decreased according to the value of the distance.

In addition, the longitudinal length of the ceramic body of the first lead portion and the third lead portion may affect the increase or decrease of the acoustic noise and the equivalent series inductance (ESL) according to the value.

That is, according to an embodiment of the present invention, the distance between the first draw-out portion and the third draw-out portion, the distance from the longitudinal end of the ceramic body to the first draw-out portion and the distance between the first draw- The equivalent series inductance of the multilayer ceramic capacitor can be reduced and the acoustic noise can be reduced by adjusting the length of the ceramic body in the longitudinal direction.

Wherein the first internal electrode further includes a second lead portion exposed to the other side opposite to the one side of the ceramic body, and the second internal electrode is exposed to the other side of the ceramic body, And a fourth take-out unit disposed at a predetermined distance from the first take-out unit.

An insulating layer may further be disposed on the other side surface of the ceramic body.

And fourth to sixth external electrodes disposed on the other side of the ceramic body and connected to the second and fourth lead portions, respectively.

A distance between the first draw-out portion and the third draw-out portion is a, a distance from the lengthwise end of the ceramic body to the first draw-out portion is b, a lengthwise length of the ceramic body of the third draw- (G1 + 2 * G2) / [2 * (a + b)]? 2.500, where G2 is the longitudinal length of the ceramic body of the first drawing portion.

Hereinafter, various modifications of the embodiment of the present invention will be described with reference to the drawings, but the present invention is not limited thereto.

1 is a perspective view showing a multilayer ceramic capacitor according to an embodiment of the present invention.

2 is a schematic view showing a ceramic body according to an embodiment of the present invention.

FIG. 3 is an exploded perspective view of FIG. 2. FIG.

1 to 3, a multilayer ceramic capacitor 1 according to an embodiment of the present invention includes a ceramic body 10 including a plurality of dielectric layers 11 and a ceramic body 10 disposed inside the ceramic body 10 , A first internal electrode (21) having first lead portions (21a, 21a ') exposed at a second main surface (S2) in the thickness direction of the ceramic body (10) (22) having a third lead portion (22a) exposed at a second major surface (S2) in the thickness direction and spaced apart from the first lead portions (21a, 21a ') by a predetermined distance, First to third external electrodes 31, 32, and 33, which are disposed on the second main surface S2 in the thickness direction of the substrate 10 and are respectively connected to the first and third lead portions 21a, 21a ', and 22a, Wherein a distance between the first lead portions 21a and 21a 'and a third lead portion 22a is a and a distance between the first lead portions 21a and 21a' at a longitudinal end portion of the ceramic body 10, Up to A length in the longitudinal direction of the ceramic body 10 of the third lead portion 22a is G1 and a length in the longitudinal direction of the ceramic body 10 of the first lead portions 21a and 21a ' , It satisfies 0.235? (G1 + 2 * G2) / [2 * (a + b)]? 2.500.

Hereinafter, a multilayer ceramic electronic device according to an embodiment of the present invention will be described, but a laminated ceramic capacitor will be described, but the present invention is not limited thereto.

Referring to FIG. 1, in the multilayer ceramic capacitor according to the embodiment of the present invention, 'L' direction in FIG. 1, 'W' direction in 'width direction'Quot; direction. ≪ / RTI > Here, the 'thickness direction' can be used in the same sense as the direction in which the dielectric layers are stacked, that is, the 'lamination direction'.

2, in one embodiment of the present invention, the ceramic body 10 includes a first main surface S1 and a second main surface S2 opposed to each other and a second main surface A first side surface S5, a second side surface S6 and a longitudinal first side surface S3 and a second side surface S4. The shape of the ceramic body 10 is not particularly limited, but may be a hexahedron shape as shown in the figure.

Referring to FIG. 3, the raw material for forming the dielectric layer 11 is not particularly limited as long as sufficient electrostatic capacity can be obtained. For example, it may be a barium titanate (BaTiO 3 ) powder.

A variety of ceramic additives, organic solvents, plasticizers, binders, dispersants and the like may be added to the powder of the barium titanate (BaTiO 3 ) to form the dielectric layer 11 according to the purpose of the present invention.

The average particle diameter of the ceramic powder used for forming the dielectric layer 11 is not particularly limited and may be adjusted to achieve the object of the present invention, but may be adjusted to, for example, 400 nm or less.

The thickness of the dielectric layer 11 is not particularly limited, and may be, for example, 3 m or less.

The material for forming the first and second internal electrodes 21 and 22 is not particularly limited and may be selected from a noble metal material such as palladium (Pd), a palladium-silver (Pd-Ag) alloy, , Copper (Cu), or the like.

The first and second inner electrodes 21 and 22 are arranged to face each other with the dielectric layer 11 interposed therebetween and alternately exposed to the second main surface S2 in the thickness direction of the ceramic body 10, .

The first and second internal electrodes 21 and 22 may include a capacitor portion that overlaps the neighboring internal electrode and contributes to formation of a capacitor and a lead portion that extends to a portion of the capacitor portion and extends to the outside of the ceramic body .

The lead portion is not particularly limited, but may have a length shorter than the length of the ceramic body 10 in the longitudinal direction of the internal electrode constituting the capacitor.

The first internal electrode 21 may have first lead portions 21a and 21a 'exposed to a second principal plane S2 of the ceramic body 10 in the thickness direction.

The first internal electrode 21 may be spaced apart from the first and second side surfaces S3 and S4 of the ceramic body 10 in the longitudinal direction.

The fact that the first internal electrode 21 is disposed at a certain distance from the first and second side surfaces S3 and S4 of the ceramic body 10 means that the first internal electrode 21 is located at the first And the second side surfaces S3 and S4.

The second internal electrode 22 is exposed to the second major surface S2 of the ceramic body 10 in the thickness direction and is spaced apart from the first lead portions 21a and 21a ' (22a).

The meaning of "spaced apart at a predetermined distance" means an insulated state without being overlapped with each other, and the same meaning is used below.

The second internal electrode 22 may be spaced apart from the first and second side surfaces S3 and S4 of the ceramic body 10 in the longitudinal direction.

The first lead portions 21a and 21a 'may include two lead portions spaced apart from the third lead portion 22a, but the present invention is not limited thereto.

1 to 3, the first and second internal electrodes 21 and 22 are formed on the second major surface S2 (S2) of the ceramic body 10 in the thickness direction of the ceramic body 10, ), And may be a three-terminal type, but is not limited thereto.

That is, the multilayer ceramic capacitor according to an embodiment of the present invention may have a structure in which the internal electrodes stacked in the ceramic body are stacked vertically to the mounting surface of the substrate.

Since the multilayer ceramic capacitor 1 according to the embodiment of the present invention is a vertical multilayer ceramic capacitor as described above, the current path is shortened when the multilayer ceramic capacitor 1 is mounted on the substrate, so that the equivalent series inductance (ESL) is further lowered.

Specifically, when the multilayer ceramic capacitor 1 according to the embodiment of the present invention is mounted on a substrate, a current can flow directly from the electrode pad of the circuit board to the internal electrode through the thickness of the external electrode without a separate current path.

Therefore, there is an effect that the equivalent series inductance (ESL) is further lower than that of the multilayer ceramic capacitor 100 according to another embodiment of the present invention in which the internal electrodes are horizontally mounted on the circuit board as described later.

In general laminated ceramic electronic parts, external electrodes may be disposed on the side surfaces facing each other in the longitudinal direction of the ceramic body.

In this case, when AC is applied to the external electrode, the current path is long, so that the current loop can be formed larger, and the size of the induced magnetic field is increased, and the inductance can be increased.

According to an embodiment of the present invention, in order to reduce the current path, the first to third external electrodes 31, 32, and 33 are formed on the second main surface S2 in the thickness direction of the ceramic body 10, 33 may be disposed.

The first to third external electrodes 31, 32 and 33 may extend to the first and second side surfaces S5 and S6 of the ceramic body 10 in the longitudinal direction.

In this case, since the length between the first to third external electrodes 31, 32, and 33 is small, the current path becomes small, thereby reducing the current loop and reducing the inductance.

The first to third external electrodes 31, 32 and 33 may be formed on the second main surface S2 in the thickness direction of the ceramic body 10 as described above, And may be electrically connected to the second internal electrodes 21 and 22.

That is, the first and second external electrodes 31 and 32 may be connected to the first internal electrode 21, and the third external electrode 33 may be connected to the second internal electrode 22 .

The first to third external electrodes 31, 32 and 33 may be formed of a conductive material having the same material as the first and second internal electrodes 21 and 22, but the present invention is not limited thereto. For example, Copper (Cu), silver (Ag), nickel (Ni), or the like.

The first to third external electrodes 31, 32, and 33 may be formed by applying a conductive paste prepared by adding glass frit to the metal powder, followed by firing.

The width W of the ceramic body 10 is a distance between the first side surface S5 in the width direction and the second side surface S6 and the length L of the ceramic body 10, May be a distance between one side (S3) and the second side (S4).

The width W between the first and second side surfaces S5 and S6 in the width direction of the ceramic body 10 is greater than the width W between the first longitudinal side surface S3 of the ceramic body 10 ) And the second side surface (S4).

As a result, the distance between the first to third external electrodes 31, 32, and 33 becomes small, so that the current path becomes small, thereby reducing the current loop and reducing the inductance.

2, a distance a between the first lead portion 21a and the third lead portion 22a in the multilayer ceramic capacitor 1 according to the embodiment of the present invention is a, A length of the third lead portion 22a in the longitudinal direction of the ceramic body is G1 and a length of the first lead portion 21a in the ceramic body of the first lead portion 21a is b, (G1 + 2 * G2) / [2 * (a + b)]? 2.500 can be satisfied.

2, the distance between the first lead portion 21a and the third lead portion 22a is represented by a, but the present invention is not limited thereto, and other first lead portion 21a 'and third lead portion 22a ). ≪ / RTI >

2, the distance from the longitudinal end of the ceramic body 10 to the first lead portion 21a is represented by b, but the present invention is not limited thereto, and the distance from the longitudinal end of the ceramic body 10 to another It may mean the distance to the first lead-out portion 21a '.

The distance b from the longitudinal end of the ceramic body 10 to the first lead portion 21a is greater than the distance b from the longitudinal first side of the ceramic body 10 adjacent to the first lead portion 21a The distance from the longitudinal end of the ceramic body 10 to the other first lead portion 21a 'means the distance from the second lead portion 21a to the first lead portion 21a of the ceramic body 10, May mean the distance from the side surface S4 to the first lead portion 21a '.

A distance a between the first lead portion 21a and the third lead portion 22a and a distance b from the end portion in the longitudinal direction of the ceramic body 10 to the first lead portion 21a, The relationship between the longitudinal length G1 of the ceramic body of the third lead portion 22a and the longitudinal length G2 of the ceramic body of the first lead portion 21a is 0.235 ≦ (G1 + 2 * G2) / [2 * (a + b)] ≤ 2.500, the equivalent series inductance of the capacitor can be reduced, acoustic noise can be reduced, and a multilayer ceramic capacitor having excellent reliability can be realized.

When the value by the above expression ((G1 + 2 * G2) / [2 * (a + b)]) is less than 0.235, the equivalent series inductance (ESL) of the multilayer ceramic capacitor can be increased.

On the other hand, when the value of (G1 + 2 * G2) / [2 * (a + b)] is more than 2.500, the acoustic noise may increase. When the multilayer ceramic capacitor is mounted on the substrate, Failure may occur.

The longitudinal length G1 of the ceramic body of the third lead portion 22a in the above equation (G1 + 2 * G2) / [2 * (a + b)] is equivalent to the acoustic noise and the equivalent series inductance ESL ). When the value of G1 is increased, the equivalent series inductance (ESL) is reduced, but the acoustic noise can be increased.

Further, in the above equation ((G1 + 2 * G2) / [2 * (a + b)]), as the distance a between the first lead portion 21a and the third lead portion 22a decreases, The series inductance (ESL) is reduced but the acoustic noise may increase.

The distance b from the longitudinal end of the ceramic body 10 to the first draw-out portion 21a in the above equation ((G1 + 2 * G2) / [2 * (a + b) The acoustic noise can be reduced.

That is, as the distance (b) from the longitudinal end of the ceramic body (10) to the first lead portion (21a) is larger than 0, the lengthwise end of the multilayer ceramic capacitor The amount of solder applied to the substrate is absolutely small and the amount of displacement transmitted to the substrate becomes small, so that the acoustic noise can be reduced.

Specifically, the multilayer ceramic capacitor according to an embodiment of the present invention has a shape perpendicular to the substrate on which the arrangement of the internal electrodes 21 and 22 is mounted, and the internal electrodes 21 and 22 have a length The first to third external electrodes 31, 32 and 33 are not exposed to the first side surface S3 and the second side surface S4 so that the first side surface S3 and the second side surface S3 of the ceramic body 10, The amount of solder applied to the end portion in the longitudinal direction of the multilayer ceramic capacitor is absolutely small and the amount of displacement transmitted to the substrate becomes small, so that the acoustic noise can be reduced.

On the other hand, in the case of a multilayer ceramic capacitor which is generally perpendicular to the substrate on which the arrangement of the internal electrodes is mounted, the acoustic noise may increase because the external electrodes are disposed on the longitudinal side of the ceramic body.

Since the distance b from the longitudinal end of the ceramic body 10 to the first lead portion 21a is larger than zero, the ceramics are bonded to each other at the end side of the ceramic body during firing of the ceramic body, The occurrence of defects such as delamination can be reduced.

That is, according to an embodiment of the present invention, the equation ((G1 + 2 * G2) / [2 * (a + b)]) can be reduced in order to reduce the equivalent series inductance of the capacitor and reduce the acoustic noise. Is controlled so as to satisfy the numerical range of 0.235 to 2.500.

4 is a perspective view showing a multilayer ceramic capacitor according to another embodiment of the present invention.

5 is a perspective view showing a multilayer ceramic capacitor according to another embodiment of the present invention.

6 is an exploded perspective view of Figs. 4 and 5. Fig.

4 to 6, in the multilayer ceramic capacitor according to another embodiment of the present invention, the first internal electrode 21 is exposed to the first main surface S1 in the thickness direction of the ceramic body 10 Wherein the second internal electrode 22 is exposed to the first side surface S1 in the thickness direction of the ceramic body 10 and the second lead portions 21b and 21b ' And a fourth lead portion 22b spaced apart from the first lead portion 22b by a predetermined distance.

The second lead portions 21b and 21b 'may include two lead portions spaced apart from the fourth lead portion 22b. However, the second lead portions 21b and 21b' are not limited thereto.

4, the multilayer ceramic capacitor according to another embodiment of the present invention is characterized in that the fourth to sixth external electrodes 34, 35 and 36 are formed on the first main surface S1 in the thickness direction of the ceramic body 10 .

In this case, the fourth to sixth external electrodes 34, 35, and 36 may be electrically connected to the first and second internal electrodes 21 and 22.

The fourth to sixth external electrodes 34, 35 and 36 may extend to the first and second side surfaces S5 and S6 of the ceramic body 10 in the width direction.

Referring to FIG. 5, the multilayer ceramic capacitor according to another embodiment of the present invention may further include an insulating layer 41 on the first main surface S1 in the thickness direction of the ceramic body 10. In FIG.

In this case, the second lead portions 21b and 21b 'and the fourth lead portions 22b are exposed to the first major surface S1 in the thickness direction of the ceramic body 10, So that the problem of reliability deterioration does not occur.

7 is a perspective view showing a multilayer ceramic capacitor according to another embodiment of the present invention.

8 is a schematic view showing the ceramic body of Fig.

Fig. 9 is an exploded perspective view of Fig. 8. Fig.

7 to 9, a multilayer ceramic capacitor 100 according to another embodiment of the present invention includes a ceramic body 110 including a plurality of dielectric layers 111 and a ceramic body 110 disposed inside the ceramic body 110, A first internal electrode 121 having first lead portions 121a and 121a 'exposed to a first side surface S5 in the width direction of the ceramic body 110 at predetermined intervals, A second internal electrode 122 exposed to the first side surface S5 in the width direction and having a third lead portion 122a spaced apart from the first lead portions 121a and 121a ' The first to third external electrodes 131, 132, and 133, which are disposed on the first side surface S5 in the width direction of the substrate 110 and connected to the first and third lead portions 121a, 121a ', and 122a, And a distance between the first lead portions 121a and 121a 'and a third lead portion 122a is a and a distance between the first lead portions 121a and 121b at the longitudinal end of the ceramic body 110 The length of the ceramic body 110 of the third lead portion 122a is G1 and the length of the ceramic body 110 of the first lead portions 121a and 121a ' (G1 + 2 * G2) / [2 * (a + b)]? 2.500.

The first lead portions 121a and 121a 'may be formed of two lead portions spaced apart from the third lead portion 122a.

The thickness of the dielectric layer 111 may be 3 占 퐉 or less.

The first to third external electrodes 131, 132 and 133 may extend to the first and second side surfaces S5 and S6 of the ceramic body 110 in the width direction.

7 to 9, the first and second internal electrodes 121 and 122 are formed on the first major surface S1 (S1) of the ceramic body 110 in the thickness direction, And the second main surface S2, and may be a three-terminal type, but is not limited thereto.

That is, in the multilayer ceramic capacitor according to another embodiment of the present invention, the internal electrodes stacked in the ceramic body may be stacked horizontally with respect to the mounting surface of the substrate.

Referring to FIG. 7, in the multilayer ceramic capacitor according to another embodiment of the present invention, 'L' direction in FIG. 7, 'W' direction in 'width direction''T' direction. Here, 'thickness direction' can be used in the same concept as the direction of stacking up the dielectric layers, that is, the 'lamination direction'.

The first internal electrode 121 and the second internal electrode 121 are alternately exposed to the first side surface S5 in the width direction of the ceramic body 110 so that the RGC (Reverse Geometry Capacitor) or the LICC Low Inductance Chip Capacitor).

In general laminated ceramic electronic parts, external electrodes may be disposed on the side surfaces facing each other in the longitudinal direction of the ceramic body.

In this case, when AC is applied to the external electrode, the current path is long, so that the current loop can be formed larger, and the size of the induced magnetic field is increased, and the inductance can be increased.

In order to solve the above problem, according to one embodiment of the present invention, in order to reduce the current path, the first side surface S5 of the side surfaces S5 and S6 facing each other in the width direction of the ceramic body 110 1 to the third external electrodes 131, 132, and 133 may be disposed.

The first to third external electrodes 131, 132 and 133 may extend to the first and second main surfaces S1 and S2 of the ceramic body 110. [

In this case, since the length between the first to third external electrodes 131, 132, and 133 is small, the current path becomes small, thereby reducing the current loop and reducing the inductance.

The first to third external electrodes 131, 132 and 133 may be disposed on the first side S5 of the side surfaces S5 and S6 facing each other in the width direction of the ceramic body 110 And may be electrically connected to the first and second internal electrodes 121 and 122 to form a capacitance.

That is, the first and second external electrodes 131 and 132 may be connected to the first internal electrode 121, and the third external electrode 133 may be connected to the second internal electrode 122 .

The width W of the ceramic body 110 is a distance between the first side surface S5 in the width direction and the second side surface S6 and the length L of the ceramic body 110 is equal to May be a distance between one side (S3) and the second side (S4).

The width W between the first and second side surfaces S5 and S6 on which the first to third external electrodes 131, 132 and 133 are formed is smaller than the width W of the ceramic body 110. [ (L) between the first side surface (S3) in the longitudinal direction and the second side surface (S4) of the second side surface (S4).

As a result, the distance between the first to third external electrodes 131, 132, and 133 becomes small, so that the current path becomes small, thereby reducing the current loop and reducing the inductance.

The first to third external electrodes 131, 132 and 133 are formed on the first and second side faces S5 and S6 of the ceramic body 110 in the width direction so that the width W of the ceramic body 110, A multilayer ceramic electronic component having a length L that is shorter than or equal to the length L of the ceramic body 110 may be referred to as an RGC (Reverse Geometry Capacitor) or a LICC (Low Inductance Chip Capacitor).

Since the multilayer ceramic capacitor 100 according to another embodiment of the present invention is an RGC (Reverse Geometry Capacitor) or a LICC (Low Inductance Chip Capacitor) as described above, the current path is shortened when the substrate is mounted on the substrate, so that the equivalent series inductance ) Is lowered.

In the multilayer ceramic capacitor 100 according to another embodiment of the present invention, the first, second, and third external electrodes 131, 132, and 133 are disposed on opposite sides S5, S6, the length between the external electrodes is short, and the substrate transfer of the vibration generated in the multilayer ceramic capacitor is lowered, so that the acoustic noise can be reduced.

10 is a perspective view showing a multilayer ceramic capacitor according to another embodiment of the present invention.

11 is a perspective view showing a multilayer ceramic capacitor according to another embodiment of the present invention.

12 is an exploded perspective view of Figs. 10 and 11. Fig.

10 to 12, in the multilayer ceramic capacitor according to another embodiment of the present invention, the first internal electrode 121 is exposed to the second side surface S6 in the width direction of the ceramic body 110 The second internal electrode 122 is exposed to the second side surface S6 in the width direction of the ceramic body 110 and the second lead portions 121b and 121b ' And a fourth lead portion 122b spaced apart from the first lead portion 122b by a predetermined distance.

The second lead portions 121b and 121b 'may include two lead portions spaced apart from the fourth lead portion 122b, but the present invention is not limited thereto.

10, in the multilayer ceramic capacitor according to another embodiment of the present invention, the fourth to sixth external electrodes 134, 135, and 136 are formed on the second side surface S6 in the width direction of the ceramic body 110 .

In this case, the fourth to sixth external electrodes 134, 135 and 136 may be electrically connected to the first and second internal electrodes 121 and 122.

The fourth to sixth external electrodes 134, 135 and 136 may extend to the first and second main surfaces S1 and S2 of the ceramic body 110. [

Referring to FIG. 11, the multilayer ceramic capacitor according to another embodiment of the present invention may further include an insulating layer 141 on a second lateral side S6 of the ceramic body 110 in the width direction.

In this case, the second lead portions 121b and 121b 'and the fourth lead portion 122b are exposed to the second side surface S6 in the width direction of the ceramic body 110, So that the problem of reliability deterioration does not occur.

Other features of the multilayer ceramic capacitor according to another embodiment of the present invention are the same as those of the multilayer ceramic capacitor according to the embodiment of the present invention described above, and thus will not be described here.

Hereinafter, a method of manufacturing a multilayer ceramic capacitor according to an embodiment of the present invention will be described, but the present invention is not limited thereto.

In the method of manufacturing a multilayer ceramic capacitor according to an embodiment of the present invention, a slurry formed by including a powder such as barium titanate (BaTiO 3 ) is coated on a carrier film and dried to form a plurality of ceramic green sheets Whereby a dielectric layer can be formed.

The ceramic green sheet may be prepared by mixing a ceramic powder, a binder and a solvent to prepare a slurry, and the slurry may be formed into a sheet having a thickness of several micrometers by a doctor blade method.

Next, an internal electrode conductive paste containing nickel powder having an average nickel particle size of 0.1 to 0.2 μm and 40 to 50 parts by weight was prepared.

The internal electrode conductive paste is coated on the green sheet by a screen printing method to form internal electrodes, and then 200 to 400 layers are laminated to form an active layer, and a ceramic green sheet is laminated on the upper or lower surface of the active layer By forming the cover layer, a ceramic body having first and second main surfaces facing each other, first and second facing surfaces facing each other, and first and second surfaces facing each other were made.

Next, first to third external electrodes may be formed on the first side surface in the width direction of the ceramic body.

Hereinafter, the present invention will be described in more detail by way of examples, but the present invention is not limited thereto.

Experimental Example

The multilayer ceramic capacitor according to the embodiment and the comparative example of the present invention was produced as follows.

A slurry containing a powder such as barium titanate (BaTiO 3 ) is coated on a carrier film and dried to prepare a plurality of ceramic green sheets having a thickness of 1.8 탆.

Next, a conductive paste for a nickel internal electrode is coated on the ceramic green sheet using a screen to form an internal electrode.

The ceramic green sheets without the internal electrodes were stacked in the lower part of the ceramic green sheet having the internal electrodes formed thereon in a thickness of about 200 layers. This laminate was subjected to isostatic pressing under a pressure of 1000 kgf / cm 2 at 85 ° C.

The pressed ceramic laminate was cut into individual chips, and the cut chips were maintained at 230 DEG C for 60 hours in an atmospheric environment to carry out the binder removal.

Thereafter, the internal electrodes were fired at 1200 DEG C in a reducing atmosphere under an oxygen partial pressure of 10 -11 to 10 -10 atm lower than the Ni / NiO equilibrium oxygen partial pressure so that the internal electrodes were not oxidized. The chip size of the multilayer chip capacitor after firing had a length × width (L × W) of about 1.0 mm × 0.5 mm (L × W, 1005 size). In this case, the fabrication tolerance was set within the range of ± 0.1 mm in length × width (L × W), and the test was conducted while satisfying the above conditions, and the test was performed to determine whether short failure occurred, equivalent serial inductance (ESL), and acoustic noise .

Each test was performed on 100 sample samples.

When the acoustic noise measurement value was 30 dB or less, it was judged to be good, and when the equivalent series inductance (ESL) value was 60 pH or less, it was judged to be good.

In Table 1, a distance a between the first draw-out portion 21a and the third draw-out portion 22a, a distance from the longitudinal end of the ceramic body 10 to the first draw-out portion 21a (G1 + 2 *) between the longitudinal length G1 of the ceramic body of the third lead portion 22a and the longitudinal length G2 of the ceramic body of the first lead portion 21a, G2) / [2 * (a + b)]), the equivalent series inductance (ESL), and acoustic noise measurement value after the substrate is mounted on the capacitor.

Figure 112014065468200-pat00001

X: Defect rate 50% or more

?: Defect rate 1% to 50%

○: Defect rate 0.01% ~ 1%

?: Defect rate less than 0.01%

*: Comparative Example

(G1 + 2 * G2) / [2 * (a + b)] in the case of Samples 1 to 11, 15 to 20 and 23 to 27 is 0.235? G2) / [2 * (a + b)]? 2.500, the acoustic noise is reduced and the equivalent series inductance (ESL) is also reduced. There is no problem of short failure even after the capacitor is mounted on the substrate.

On the other hand, in the case of Samples 12 to 14, 21 and 22, which are comparative examples deviating from the numerical range of the present invention, it can be seen that there is a short defect problem after the capacitor is mounted on the substrate, and the acoustic noise also increases.

In addition, in the case of the samples Nos. 28 to 30, which are comparative examples deviating from the numerical range of the present invention, the equivalent series inductance (ESL) increases.

The mounting substrate of the multilayer ceramic capacitor

13 is a perspective view showing a state in which the multilayer ceramic capacitor of FIG. 1 is mounted on a printed circuit board.

14 is a perspective view showing a state in which the multilayer ceramic capacitor of Fig. 7 is mounted on a printed circuit board.

13, a mounting substrate 200 of a multilayer ceramic capacitor 1 according to another embodiment of the present invention includes a printed circuit board 210 mounted so that the multilayer ceramic capacitor 1 is vertical, 210 and 210, and first to third electrode pads 221, 222, and 223 spaced from each other.

At this time, the multilayer ceramic capacitor 1 is electrically connected to the printed circuit board (not shown) by the solder 230 in a state where the external electrodes 31, 32 and 33 are placed in contact with the first to third electrode pads 221, 222 and 223, 210, respectively.

Acoustic noise may occur when a voltage is applied while the multilayer ceramic capacitor 1 is mounted on the printed circuit board 210 as described above.

The size of the first to third electrode pads 221, 222 and 223 is equal to the size of the solder 230 connecting the external electrodes of the multilayer ceramic capacitor 1 and the first to third electrode pads 221, 222 and 223, And the magnitude of the acoustic noise can be adjusted according to the amount of the solder 230.

As the distance (b) from the longitudinal end of the ceramic body (10) to the first lead portion (21a) in the multilayer ceramic capacitor (1) is larger than 0 and the multilayer ceramic capacitor is mounted on the substrate, The amount of solder applied to the longitudinal end portion of the ceramic capacitor is absolutely small and the amount of displacement transmitted to the substrate becomes small, so that the acoustic noise can be reduced.

Specifically, the mounting substrate 200 of the multilayer ceramic capacitor 1 according to another embodiment of the present invention includes the internal electrodes 21 and 22 Is exposed to the first side surface S3 and the second side surface S4 in the longitudinal direction of the ceramic body 10 so that the first to third external electrodes 31, 32 and 33 are not exposed to the length of the ceramic body 10 Since the amount of solder applied to the end portion in the longitudinal direction of the multilayer ceramic capacitor is absolutely small and the amount of displacement transmitted to the substrate is small since the first and second side surfaces S3 and S4 are not disposed on the first side surface S3 and the second side surface S4, have.

On the other hand, in the case of a multilayer ceramic capacitor which is generally perpendicular to the substrate on which the arrangement of the internal electrodes is mounted, the acoustic noise may increase because the external electrodes are disposed on the longitudinal side of the ceramic body.

14, the mounting substrate 200 of the multilayer ceramic capacitor 100 according to the present embodiment includes a printed circuit board 210 on which the multilayer ceramic capacitor 100 is mounted so as to be horizontal, And first to third electrode pads 221, 222, and 223 spaced apart from each other on the upper surface.

At this time, the multilayer ceramic capacitor 100 is electrically connected to the printed circuit board (not shown) by the solder 230 in a state where the external electrodes 131, 132, and 133 are in contact with the first to third electrode pads 221, 222, 210, respectively.

When a voltage having a different polarity is applied to the first to third external electrodes formed on the side surface in the width direction of the multilayer ceramic capacitor 100 in a state where the multilayer ceramic capacitor 100 is mounted on the printed circuit board 210, The ceramic body 110 expands and contracts in the thickness direction due to the inverse piezoelectric effect of the ceramic body 110. The first to third external electrodes are formed by the Poisson effect so that the thickness of the ceramic body 110 Contraction and expansion contrary to expansion and contraction of the direction.

Specifically, the shrinkage and expansion occur at a displacement of about 20 nm in the thickness direction of the multilayer ceramic capacitor and occur at a displacement of about 4 nm in the longitudinal direction and about 2 nm in the width direction.

In the multilayer ceramic capacitor according to the embodiment of the present invention, since the first to third external electrodes are formed on the side surface of the ceramic body in the width direction of the multilayer ceramic capacitor, the displacement of shrinkage and expansion is minimized, Can be reduced.

The present invention is not limited by the above-described embodiments and the accompanying drawings, but is intended to be limited only by the appended claims. It will be apparent to those skilled in the art that various changes in form and details may be made therein without departing from the spirit and scope of the invention as defined by the appended claims. something to do.

1, 100; A multilayer ceramic capacitor 10, 110; Ceramic body
11, 111; Dielectric layer
21, 22, 121, 122; The first and second internal electrodes
21a, 21a ', 121a, 121a'; The first draw-
21b, 21b ', 121b, 121b'; The second draw-
22a, 122a; Third take-out portions 22b, 122b; The fourth draw-
31, 32, 33, 131, 132, 133; The first to third external electrodes
34, 35, 36, 134, 135, 136; The fourth to sixth external electrodes
200; A mounting substrate 210; Printed circuit board
221, 222, 223; The first to third electrode pads
230; Solder

Claims (19)

  1. A ceramic body including a plurality of dielectric layers;
    A first internal electrode disposed inside the ceramic body and having a first lead portion exposed at one side of the ceramic body at a predetermined distance from each other and a second internal electrode exposed at the one side of the ceramic body, A second internal electrode having a third lead portion spaced apart by a predetermined distance; And
    And first to third external electrodes disposed on the one side surface of the ceramic body and connected to the first and third lead portions, respectively,
    The distance between the first draw-out portion and the third draw-out portion, the distance from the longitudinal end of the ceramic body to the first draw-out portion, and the lengthwise length of the ceramic body of the first draw- And the first lead portion is composed of two lead portions spaced apart from the third lead portion, respectively.
  2. The method according to claim 1,
    Wherein the first internal electrode further includes a second lead portion exposed to the other side opposite to the one side of the ceramic body, and the second internal electrode is exposed to the other side of the ceramic body, And a fourth lead portion spaced apart from the first lead portion by a predetermined distance.
  3. 3. The method of claim 2,
    And an insulating layer is further disposed on the other side surface of the ceramic body.
  4. 3. The method of claim 2,
    And fourth to sixth external electrodes disposed on the other side of the ceramic body and connected to the second and fourth lead portions, respectively.
  5. The method according to claim 1,
    A distance between the first draw-out portion and the third draw-out portion is a, a distance from the longitudinal end portion of the ceramic body to the first draw-out portion is b, a lengthwise length of the ceramic body of the third draw- (G1 + 2 * G2) / [2 * (a + b)]? 2.500, where G2 is the longitudinal length of the ceramic body of the first lead portion.
  6. A ceramic body including a plurality of dielectric layers;
    A first internal electrode disposed inside the ceramic body and having a first lead portion exposed at a first side in the width direction of the ceramic body at a predetermined interval and a second internal electrode exposed in a widthwise first side of the ceramic body, A second internal electrode having a third lead portion spaced apart from the first lead portion by a predetermined distance; And
    And first to third external electrodes disposed on a first widthwise side of the ceramic body and connected to the first and third lead portions, respectively,
    A distance between the first draw-out portion and the third draw-out portion is a, a distance from the lengthwise end of the ceramic body to the first draw-out portion is b, a lengthwise length of the ceramic body of the third draw- (G1 + 2 * G2) / [2 * (a + b)]? 2.500, where G2 is the length in the longitudinal direction of the ceramic body of the first drawing portion, and the first drawing portion satisfies 0.235? And two lead portions spaced apart from each other.
  7. The method according to claim 6,
    Wherein the first internal electrode further includes a second lead portion exposed to a second side in the width direction of the ceramic body, the second internal electrode is exposed to a second side in the width direction of the ceramic body, And a fourth lead portion disposed at a predetermined distance from the first lead portion.
  8. 8. The method of claim 7,
    And an insulating layer is further disposed on the second lateral side in the width direction of the ceramic body.
  9. 8. The method of claim 7,
    And fourth to sixth external electrodes disposed on the second lateral side of the ceramic body in the width direction and connected to the second and fourth lead portions, respectively.
  10. delete
  11. 8. The method of claim 7,
    And the second lead portion comprises two lead portions spaced apart from the fourth lead portion.
  12. A ceramic body including a plurality of dielectric layers;
    A first internal electrode disposed inside the ceramic body and having a first lead portion exposed at a second principal plane in the thickness direction of the ceramic body with a predetermined gap therebetween, and a second internal electrode exposed at a second principal plane in the thickness direction of the ceramic body, A second internal electrode having a third lead portion spaced apart from the first lead portion by a predetermined distance; And
    And first to third external electrodes disposed on a second major surface in the thickness direction of the ceramic body and connected to the first and third lead portions,
    A distance between the first draw-out portion and the third draw-out portion is a, a distance from the longitudinal end portion of the ceramic body to the first draw-out portion is b, a lengthwise length of the ceramic body of the third draw- (G1 + 2 * G2) / [2 * (a + b)]? 2.500, where G2 is the length in the longitudinal direction of the ceramic body of the first drawing portion, and the first drawing portion satisfies 0.235? And two lead portions spaced apart from each other.
  13. 13. The method of claim 12,
    Wherein the first internal electrode further comprises a second lead portion exposed to a first major surface in the thickness direction of the ceramic body and the second internal electrode is exposed to a second major surface in the thickness direction of the ceramic body, And a fourth lead portion disposed at a predetermined distance from the first lead portion.
  14. 14. The method of claim 13,
    Wherein an insulating layer is further disposed on a first main surface in the thickness direction of the ceramic body.
  15. 14. The method of claim 13,
    And fourth to sixth external electrodes disposed on a first major surface of the ceramic body in the thickness direction and connected to the second and fourth lead portions, respectively.
  16. delete
  17. 14. The method of claim 13,
    And the second lead portion comprises two lead portions spaced apart from the fourth lead portion.
  18. A printed circuit board having first to third electrode pads on its upper surface; And
    And a multilayer ceramic capacitor according to any one of claims 1, 6, and 12 provided on the printed circuit board.
  19. delete
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KR101630040B1 (en) 2014-05-28 2016-06-13 삼성전기주식회사 Multi-layered ceramic capacitor and board having the same mounted thereon
KR20160000166A (en) 2014-06-24 2016-01-04 삼성전기주식회사 Composite electronic component and board for mounting the same
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JP2014239259A (en) 2014-08-13 2014-12-18 株式会社村田製作所 Multilayer capacitor and mounting structure of multilayer capacitor
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JP2014241452A (en) 2014-08-13 2014-12-25 株式会社村田製作所 Laminated ceramic electronic component
JP2014222783A (en) 2014-08-13 2014-11-27 株式会社村田製作所 Multilayer capacitor and mounting structure of multilayer capacitor
JP2014220528A (en) 2014-08-13 2014-11-20 株式会社村田製作所 Multilayer capacitor
JP2015065455A (en) 2014-11-13 2015-04-09 株式会社村田製作所 Three-terminal capacitor
JP2015035630A (en) 2014-11-13 2015-02-19 株式会社村田製作所 Three-terminal type capacitor
JP2015079980A (en) 2014-12-04 2015-04-23 株式会社村田製作所 Three-terminal type capacitor
US9214282B1 (en) 2014-12-08 2015-12-15 Murata Manufacturing Co., Ltd. Three-terminal capacitor
KR20170109823A (en) 2016-03-22 2017-10-10 삼성전기주식회사 Capacitor and manufacturing method of the same
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