JP4982354B2 - 情報処理装置 - Google Patents

情報処理装置 Download PDF

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Publication number
JP4982354B2
JP4982354B2 JP2007339876A JP2007339876A JP4982354B2 JP 4982354 B2 JP4982354 B2 JP 4982354B2 JP 2007339876 A JP2007339876 A JP 2007339876A JP 2007339876 A JP2007339876 A JP 2007339876A JP 4982354 B2 JP4982354 B2 JP 4982354B2
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JP
Japan
Prior art keywords
access
data
write
storage unit
read
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2007339876A
Other languages
English (en)
Japanese (ja)
Other versions
JP2009163325A5 (enExample
JP2009163325A (ja
Inventor
敏幸 石岡
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Corp
Panasonic Holdings Corp
Original Assignee
Panasonic Corp
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Panasonic Corp, Matsushita Electric Industrial Co Ltd filed Critical Panasonic Corp
Priority to JP2007339876A priority Critical patent/JP4982354B2/ja
Priority to US12/746,657 priority patent/US8131968B2/en
Priority to PCT/JP2008/003980 priority patent/WO2009084210A1/ja
Priority to CN200880120800XA priority patent/CN101896882A/zh
Publication of JP2009163325A publication Critical patent/JP2009163325A/ja
Publication of JP2009163325A5 publication Critical patent/JP2009163325A5/ja
Application granted granted Critical
Publication of JP4982354B2 publication Critical patent/JP4982354B2/ja
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

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Classifications

    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/36Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the display of a graphic pattern, e.g. using an all-points-addressable [APA] memory
    • G09G5/39Control of the bit-mapped memory
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/36Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the display of a graphic pattern, e.g. using an all-points-addressable [APA] memory
    • G09G5/39Control of the bit-mapped memory
    • G09G5/393Arrangements for updating the contents of the bit-mapped memory
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/36Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the display of a graphic pattern, e.g. using an all-points-addressable [APA] memory
    • G09G5/39Control of the bit-mapped memory
    • G09G5/395Arrangements specially adapted for transferring the contents of the bit-mapped memory to the screen
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00Control of display operating conditions
    • G09G2320/02Improving the quality of display appearance
    • G09G2320/0252Improving the response speed
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2350/00Solving problems of bandwidth in display systems
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2360/00Aspects of the architecture of display systems
    • G09G2360/18Use of a frame buffer in a display terminal, inclusive of the display panel
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/02Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the way in which colour is displayed
    • G09G5/026Control of mixing and/or overlay of colours in general
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/02Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the way in which colour is displayed
    • G09G5/06Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the way in which colour is displayed using colour palettes, e.g. look-up tables

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Information Retrieval, Db Structures And Fs Structures Therefor (AREA)
  • Digital Computer Display Output (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
JP2007339876A 2007-12-28 2007-12-28 情報処理装置 Expired - Fee Related JP4982354B2 (ja)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP2007339876A JP4982354B2 (ja) 2007-12-28 2007-12-28 情報処理装置
US12/746,657 US8131968B2 (en) 2007-12-28 2008-12-25 Information processing device
PCT/JP2008/003980 WO2009084210A1 (ja) 2007-12-28 2008-12-25 情報処理装置
CN200880120800XA CN101896882A (zh) 2007-12-28 2008-12-25 信息处理装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2007339876A JP4982354B2 (ja) 2007-12-28 2007-12-28 情報処理装置

Publications (3)

Publication Number Publication Date
JP2009163325A JP2009163325A (ja) 2009-07-23
JP2009163325A5 JP2009163325A5 (enExample) 2010-10-14
JP4982354B2 true JP4982354B2 (ja) 2012-07-25

Family

ID=40823946

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2007339876A Expired - Fee Related JP4982354B2 (ja) 2007-12-28 2007-12-28 情報処理装置

Country Status (4)

Country Link
US (1) US8131968B2 (enExample)
JP (1) JP4982354B2 (enExample)
CN (1) CN101896882A (enExample)
WO (1) WO2009084210A1 (enExample)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8872836B2 (en) * 2011-01-25 2014-10-28 Qualcomm Incorporated Detecting static images and reducing resource usage on an electronic device
DE112011105901B4 (de) * 2011-11-30 2018-06-07 Intel Corporation Verfahren und Vorrichtung zur Energieeinsparung für First In First Out (FIF0)-Speicher
SG11201808251XA (en) * 2016-03-22 2018-10-30 Assemblogue Inc Access management method, information processing device, program, and recording medium
WO2018042644A1 (ja) * 2016-09-05 2018-03-08 三菱電機株式会社 組込みシステム、組込みシステム制御方法およびデータ整合性判定方法
US12054166B2 (en) * 2021-05-13 2024-08-06 Dana Belgium N.V. Driveline component control and fault diagnostics

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61131132A (ja) * 1984-11-30 1986-06-18 Nec Corp トレ−サ回路
JPS62289999A (ja) * 1986-06-09 1987-12-16 Toshiba Corp デ−タの書込方法
JPS6447133A (en) * 1987-08-17 1989-02-21 Nec Corp Frame data compressing and storing device
JPH01126687A (ja) 1987-11-11 1989-05-18 Hitachi Ltd 表示メモリ制御回路
US5179642A (en) 1987-12-14 1993-01-12 Hitachi, Ltd. Image synthesizing apparatus for superposing a second image on a first image
JPH0778720B2 (ja) * 1987-12-14 1995-08-23 株式会社日立製作所 画像合成装置
JPH01224851A (ja) * 1988-03-03 1989-09-07 Nec Corp データ処理装置
JPH03191445A (ja) * 1989-12-20 1991-08-21 Mitsubishi Electric Corp メモリ回路装置
JPH05266177A (ja) 1992-03-19 1993-10-15 Nec Corp 描画装置
JPH06131882A (ja) * 1992-10-14 1994-05-13 Nippondenso Co Ltd 半導体記憶装置
US7213095B2 (en) * 2004-06-08 2007-05-01 Arm Limited Bus transaction management within data processing systems
JP4161944B2 (ja) * 2004-07-01 2008-10-08 セイコーエプソン株式会社 表示コントローラ及び電子機器
CN101213514B (zh) 2005-06-30 2011-12-21 松下电器产业株式会社 信息处理装置
US8156363B2 (en) 2007-07-02 2012-04-10 Panasonic Corporation Information processing device and mobile phone including comparison of power consumption information and remaining power
US7660933B2 (en) * 2007-10-11 2010-02-09 Broadcom Corporation Memory and I/O bridge

Also Published As

Publication number Publication date
CN101896882A (zh) 2010-11-24
JP2009163325A (ja) 2009-07-23
WO2009084210A1 (ja) 2009-07-09
US20100262800A1 (en) 2010-10-14
US8131968B2 (en) 2012-03-06

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