JP4966054B2 - Differential amplifier circuit - Google Patents

Description

  The present invention relates to a differential amplifier circuit, and more particularly to a circuit for improving the current capability of an output stage.

Conventionally, as this type of circuit, for example, a differential amplifier circuit having a configuration as shown in FIG. 5 is known.
The conventional circuit will be described below with reference to FIG.
This differential amplifier circuit includes a pre-amplifier 101A including an operational amplifier A1, a pre-driver section 102A including a pnp-type first transistor Tr1, npn-type second and third transistors Tr2, Tr3, and a pnp-type fourth transistor. And an idle current setting supply unit 104A using a current mirror circuit including fifth transistors Tr4 and Tr5, and a push-pull output stage 105A including a pnp-type sixth transistor Tr6 and an npn-type seventh transistor Tr7. It has been configured.

In such a configuration, the operational amplifier A1 outputs a signal having a magnitude corresponding to the difference between the signals applied to the two differential input terminals IN + and IN−, and is subjected to voltage / current conversion by the first transistor Tr1. The output is amplified by the push-pull output stage 105A.
When idling, that is, when there is no difference between the signals of the two differential input terminals IN + and IN−, the idling current of the push-pull output stage 105A is determined and supplied by the idle current setting supply unit 104A. It has become.

  In such a configuration, at the time of Low output, that is, when a sink current flows into the seventh transistor Tr7, the current sink capability is such that the base current IBTr7 = I1 + I3 + IBTr6-ITr1-I4 of the seventh transistor Tr7 and the seventh transistor It is determined by the current amplification factor β of Tr7 alone. Here, I1, I3, and I4 are output currents of current sources I1, I3, and I4 (for the sake of brevity, the notation of each current source and the notation of the output current are the same notation), and IBTr6 is The base current of the sixth transistor Tr6, ITr1, is the collector current of the first transistor Tr1.

Therefore, to increase the base current of the seventh transistor Tr7, it is possible to increase the current flowing through the third transistor Tr3 or the fourth transistor Tr4. It depends.
Further, the idling currents of the sixth and seventh transistors Tr6 and Tr7 are given by the following equations 1 and 2, respectively.

  VBE6 + VBE4 = VBED2 + VBE5 ... Formula 1

  VBE7 + VBE3 = VBED1 + VBE2 Formula 2

  Here, VBE6 is the base-emitter voltage of the sixth transistor Tr6, VBE4 is the base-emitter voltage of the fourth transistor Tr4, VBED2 is the forward voltage of the second diode D2, and VBE5 is the first voltage 5 is the base-emitter voltage of the transistor Tr5, VBE7 is the base-emitter voltage of the seventh transistor Tr7, VBE3 is the base-emitter voltage of the third transistor Tr3, and VBED1 is the voltage of the first diode D1. The forward voltage, VBE2, is the base-emitter voltage of the second transistor Tr2.

  The base-emitter voltage VBE is usually given by the well-known formula below.

  VBE = VT × ln (IS / IC)... Formula 3

Here, VT is a thermal voltage, IS is a reverse collector saturation current, and IC is a collector current.
An example of this type of differential amplifier circuit is disclosed in Patent Document 1 or the like.
JP 2002-217654 A (page 4-6, FIGS. 1 to 8)

In such a conventional circuit, if the currents of the third and fourth transistors Tr3 and Tr4 are increased in order to increase the base current of the seventh transistor Tr7 in the output stage, It can be understood that the idling current of the seventh transistors Tr6 and Tr7 is increased.
That is, the conventional circuit has a problem that the base current cannot be easily increased in order to increase the current capability of the output stage.

  The present invention has been made in view of the above circumstances, and can increase the base current of the transistors constituting the output stage according to the input signal without causing an increase in the idling current of the output stage. A high-performance differential amplifier circuit is provided.

In order to achieve the above object of the present invention, a differential amplifier circuit according to the present invention has a preamplifier configured to perform differential amplification on an input signal and obtain a differential output, and the preamplifier A differential amplifier circuit having a pre-driver section that drives a push-pull output stage using a bipolar transistor by converting the output of the output to voltage-current,
When a sink current flows through the low-side bipolar transistor that constitutes the push-pull output stage, a supplementary current supply unit is provided that allows a supplementary current to flow into the base of the low-side bipolar transistor ,
The pre-driver section uses a pnp-type transistor, and a first current source is connected to an emitter of the pre-driver section, and the emitter is a high side of two bipolar transistors constituting the push-pull output stage. The base is connected to one output terminal of the previous stage amplification unit, while being connected to the base of the bipolar transistor on the side,
The supplementary current supply unit has a first current mirror circuit composed of two npn transistors, and a base and a collector of two npn transistors constituting the first current mirror circuit are mutually connected. The collector of one of the npn transistors connected is connected to the collector of a pnp transistor constituting the pre-driver section, while supplying the supplementary current to the collector of the other npn transistor constituting the first current mirror circuit. And a base of a low-side bipolar transistor among the two bipolar transistors constituting the push-pull output stage is connected to the push-pull output stage during idling. Connected to the idle current setting supply section It is made of Te.
In this configuration, the push-pull output stage during idle should, idle current setting supply unit is provided for supplying idling current
The idle current setting supply unit includes a second current mirror circuit composed of two npn transistors and a third current mirror circuit composed of two pnp transistors, and constitutes the second current mirror circuit One npn-type transistor having a base and a collector connected to each other has a second current source connected to the collector, and an emitter connected to the ground via a diode to constitute the second current mirror circuit. The other npn transistor has a third current source connected to its collector and the base of the bipolar transistor on the high side of the push-pull output stage, while an emitter connected to the push-pull output stage. Connected to the base of the bipolar transistor on the low side and Current source is connected to,
One of the pnp transistors connected to the base and the collector constituting the third current mirror circuit has a fifth current source connected to the collector, while the emitter can be applied with a power supply voltage via a diode. The other pnp-type transistor constituting the third current mirror circuit has a collector connected to the base of the low-side bipolar transistor of the push-pull output stage, and an emitter connected to the push-pull output stage. More preferably, it is connected to the base of the bipolar transistor on the high side.

  According to the present invention, when a sink current flows in the push-pull output stage, a supplementary current supply unit that allows the supplementary current to flow into the base of the transistor through which the sink current of the push-pull output stage flows is provided. The output current capability can be greatly increased by increasing the idling current. In addition, since the supplementary current supplied to the supplementary current supply unit can be freely set as necessary, it is possible to provide a circuit with a high degree of design freedom.

Hereinafter, embodiments of the present invention will be described with reference to FIGS. 1 to 4.
The members and arrangements described below do not limit the present invention and can be variously modified within the scope of the gist of the present invention.
First, a configuration example of a differential amplifier circuit according to an embodiment of the present invention will be described with reference to FIG.

  The differential amplifier circuit according to the embodiment of the present invention is roughly divided into a pre-stage amplifier unit 101, a pre-driver unit 102, a supplementary current supply unit 103, an idle current setting supply unit 104, and a push-pull output stage 105. It is configured.

  The pre-amplifier 101 is configured using an operational amplifier (indicated as “A1” in FIG. 1) 15 and has two differential input terminals (indicated as “IN +” and “IN−” in FIG. 1). A signal having a magnitude corresponding to the difference between the input signals applied to 41a and 41b is output to the output terminal OUT-1.

The first output terminal OUT-1 of the operational amplifier 15 is connected to the base of a pnp-type first transistor (indicated as “Tr1” in FIG. 1) 1 constituting the pre-driver unit 102.
The pre-driver unit 102 includes a pnp-type first transistor 1, and drives the push-pull output stage 105 by converting the output voltage of the operational amplifier 15 into a current.
The first transistor 1 in the pre-driver section 102 has the emitter connected to the first current source 21, while the collector is an npn-type eighth transistor (a replenishment current supply section 103 described below) that constitutes the supplementary current supply section 103. In FIG. 1, it is connected to the collector 8) (denoted as “Tr8”).
The first current source 21 is configured to output a constant current I1 when a power supply voltage V + is applied.

  The supplementary current supply unit 103 is for supplementing the base current at the time of sinking of the seventh transistor (indicated as “Tr7” in FIG. 1) 7 constituting the push-pull output stage 105 (details will be described later). The npn-type eighth and ninth transistors 8 and 9 and the sixth current source 26 as a supplementary current supply current source are mainly configured. In the embodiment of the present invention, a current mirror circuit (first current mirror circuit) is formed by the eighth and ninth transistors 8 and 9.

That is, the bases of the eighth and ninth transistors 8 and 9 are connected to each other, and the connection point is connected to the collector of the eighth transistor 8. The eighth transistor 8 is a so-called diode. It is connected.
The emitter of the eighth transistor 8 is the emitter of the ninth transistor (denoted as “Tr9” in FIG. 1) 9 via the first resistor (denoted as “R1” in FIG. 1) 31. Are both connected to the ground via a second resistor 32 (denoted as “R2” in FIG. 1) 32.

On the other hand, the collector of the eighth transistor 8 is connected to the collector of the first transistor 1 as described above.
The collector of the ninth transistor 9 is connected to the sixth current source 26 as a supplementary current supply current source and to the base of the seventh transistor 7 of the push-pull output stage 105 described later. ing.
The sixth current source 26 is configured to output a constant current I6 when the power supply voltage V + is applied.

  The idle current setting supply unit 104 supplies idling current when the push-pull output stage 105 is idling. In the embodiment of the present invention, the npn-type second and third transistors (in FIG. 1) Are denoted by “Tr2” and “Tr3”, respectively, and pnp-type fourth and fifth transistors (represented as “Tr4” and “Tr5” in FIG. 1, respectively) 4, 5, The first and second diodes (represented as “D1” and “D2” in FIG. 1) 16 and 17, respectively, and the second to fifth current sources 22 to 25 as main components It has become.

In the embodiment of the present invention, the second and third transistors 2 and 3 constitute a current mirror circuit (second current mirror circuit) and form a current path loop together with the seventh transistor 7. It has become.
The bases of the second and third transistors 2 and 3 are connected to each other, and the connection point is connected to the collector of the second transistor 2. The second transistor 2 is so-called diode-connected. It has become.
A second current source 22 that outputs a constant current I2 is connected to the collector of the second transistor 2, while a third current that outputs a constant current I3 is connected to the collector of the third transistor 3. A source 23 is connected, and a collector of the first transistor 1 and a base of a sixth transistor (indicated as “Tr6” in FIG. 1) 6 are connected.

  On the other hand, the anode of the first diode 16 is connected to the emitter of the second transistor 2, and the cathode of the first diode 16 is connected to the ground. A fourth current source 24 that outputs a constant current I4 is provided between the emitter of the third transistor 3 and the ground, and the emitter of the third transistor 3 is the base of the seventh transistor 7. It is connected to the.

On the other hand, the fourth and fifth transistors 4 and 5 constitute a current mirror circuit (third current mirror circuit) and form a current path loop together with the sixth transistor 6.
The bases of the fourth and fifth transistors 4 and 5 are connected to each other, and the connection point is connected to the collector of the fifth transistor 5. The fifth transistor 5 is so-called diode-connected. It has become.

The emitter of the fourth transistor 4 is connected to the base of the sixth transistor 6, while the emitter of the fifth transistor 5 is connected to the cathode of the second diode 17. A power supply voltage V + is applied to the anode of the diode 17.
Further, the collector of the fourth transistor 4 is connected to the base of the seventh transistor 7, while the fifth current from which the constant current I5 is output is between the collector of the fifth transistor 5 and the ground. A source 25 is provided.

The push-pull output stage 105 includes a pnp-type sixth transistor 6 and an npn-type seventh transistor 7. The collectors of the sixth and seventh transistors 6 and 7 are connected to each other. At the same time, it is connected to the output terminal 42.
The power supply voltage V + is applied to the emitter of the sixth transistor 6, and the sixth transistor 6 is a high-side transistor, while the emitter of the seventh transistor 7 is Are connected to the ground, and the seventh transistor 7 is a low-side transistor.
As described above, the base of the sixth transistor 6 is connected to the pre-driver unit 102 and the idle current setting supply unit 104, while the seventh transistor 7 includes the supplementary current supply unit 103 and the idle current setting unit. It is connected to the supply unit 104.

Next, the operation in such a configuration will be described focusing on the output capability.
First, in the differential amplifier circuit according to the embodiment of the present invention, the base current IBTr7 of the seventh transistor 7 is as follows in a normal state, that is, in a state where no sink current flows into the seventh transistor 7. It is represented by Equation 4.

  IBTr7 = I1 + I3 + I6 + IBTr6−ITr1−ITr9−I4 Equation 4

  Here, I1, I3, I4, and I6 are output currents of the first, third, fourth, and sixth current sources 21, 23, 24, and 26, respectively, and IBTr6 is the total current of the sixth transistor 6. Source current, ITr1 is the collector current of the first transistor 1, and ITr9 is the collector current of the ninth transistor 9.

Here, since the ninth transistor 9 flows almost the same current as the sixth current source 26, I6≈ITr9, and the base of the seventh transistor 7 is almost free from the sixth current source 26. Current does not flow.
Therefore, Equation 4 representing the base current of the seventh transistor 7 is rewritten as Equation 5 below.

  IBTr7 ≒ I1 + I3 + IBTr6-ITr1-I4 Equation 5

The current ITr9 flowing through the ninth transistor 9 described above corresponds to the output current of the sixth current source 26 according to the required output current capability, and the eighth and ninth current mirror circuits constituting the current mirror circuit. The current can be freely set by appropriately changing the size of the transistors 8 and 9 and the ratio between the first and second resistors 31 and 32.
FIG. 2 shows a circuit diagram in which the current flow in the main part is indicated by solid arrows.

  On the other hand, when the output of the push-pull output stage 105 is in a low state, that is, a state in which a sink current flows through the seventh transistor 7, the base current of the seventh transistor 7 is basically the equation described in the normal time described above. 4, since the current of the first transistor 1 decreases, the output current I1 of the first current source 21 is supplied to the seventh transistor 7 via the third and fourth transistors 3 and 4. It will flow into the base.

At the same time, since no current flows through the first transistor 1, no current flows through the eighth transistor 8, and no current flows through the ninth transistor 9.
As a result, the output current I6 of the sixth current source 26 flows into the base of the seventh transistor 7 and the current driving capability of the seventh transistor 7 is improved. FIG. 3 shows a circuit diagram in which the current flow of the main part when such a sink current is generated is indicated by a solid arrow. In FIG. 3, the solid arrow line marked with “x” means that no current flows.

As described above, in the differential amplifier circuit according to the embodiment of the present invention, the output current I6 of the sixth current source 26 normally flows into the ninth transistor 9 and does not flow into the push-pull output stage 105. However, at the time of Low output as described above, since the ninth transistor 9 hardly flows current, the current corresponding to the surplus current all flows into the base of the seventh transistor 7. It is very different.
Further, the output current I6 of the sixth current source 26 can be set freely, and without increasing the idle current of the push-pull output stage 105 unnecessarily, the entire circuit can be set only by the increase of the output current I6. 7 can greatly improve the current driving capability of the transistor 7.

FIG. 4 is a characteristic diagram showing a change characteristic of the load current with respect to the output voltage of the differential amplifier circuit according to the embodiment of the present invention together with the similar characteristic in the conventional circuit. explain.
In the figure, the horizontal axis represents the load current, and the vertical axis represents the transistor on the side into which the sink current flows (low side side), that is, in other words, in the above embodiment, the maximum output of the seventh transistor 7. Indicates voltage.

The conventional circuit has the circuit configuration shown in FIG. 5, and the constants of the circuit elements in the components common to the differential amplifier circuit in the embodiment of the present invention are the same.
The characteristics shown in FIG. 4 are: power supply voltage V + = 5V, input voltage VIN + = (V +) / 2 + 1 = 3.5V at the differential input terminal 41a, input voltage VIN − = (V +) / 2 at the differential input terminal 41b. -1 = 1.5 V and ambient temperature Ta = 25 ° C.

  In FIG. 4, the solid characteristic line represents the characteristic of the differential amplifier circuit according to the embodiment of the present invention, and the dotted line represents the characteristic of the conventional circuit. According to the figure, it can be confirmed that the load current capability of the differential amplifier circuit according to the embodiment of the present invention is surely improved as compared with the conventional circuit.

It is a circuit diagram which shows the circuit structural example of the differential amplifier circuit in embodiment of this invention. FIG. 2 is an explanatory diagram for explaining a current flow in a main part during an idling operation of the differential amplifier circuit shown in FIG. 1. FIG. 2 is an explanatory diagram for explaining a current flow in a main part when the differential amplifier circuit shown in FIG. 1 outputs a low level. It is a characteristic diagram which showed the change characteristic of the load current with respect to the output voltage of the differential amplifier circuit in embodiment of this invention with the characteristic of the conventional circuit. It is a circuit diagram which shows one circuit structural example of a conventional circuit.

Explanation of symbols

DESCRIPTION OF SYMBOLS 101 ... Pre-stage amplification part 102 ... Pre-driver part 103 ... Replenishment current supply part 104 ... Idle current setting supply part 105 ... Push pull output stage

Claims (2)

A push-pull output stage having a pre-amplifier configured to perform differential amplification on an input signal and obtain a differential output, and using a bipolar transistor by converting the output of the pre-stage amplifier into voltage / current. A differential amplifier circuit having a pre-driver unit for driving,
When a sink current flows through the low-side bipolar transistor that constitutes the push-pull output stage, a supplementary current supply unit is provided that allows a supplementary current to flow into the base of the low-side bipolar transistor,
The pre-driver section uses a pnp-type transistor, and a first current source is connected to an emitter of the pre-driver section, and the emitter is a high side of two bipolar transistors constituting the push-pull output stage. The base is connected to one output terminal of the previous stage amplification unit, while being connected to the base of the bipolar transistor on the side,
The supplementary current supply unit has a first current mirror circuit composed of two npn transistors, and a base and a collector of two npn transistors constituting the first current mirror circuit are mutually connected. The collector of one of the npn transistors connected is connected to the collector of a pnp transistor constituting the pre-driver section, while supplying the supplementary current to the collector of the other npn transistor constituting the first current mirror circuit. And a base of a low-side bipolar transistor among the two bipolar transistors constituting the push-pull output stage is connected to the push-pull output stage during idling. Connected to the idle current setting supply section Differential amplifier circuit characterized by that. In the push-pull output stage during idling, an idle current setting supply unit that supplies idling current is provided,
The idle current setting supply unit includes a second current mirror circuit composed of two npn transistors and a third current mirror circuit composed of two pnp transistors, and constitutes the second current mirror circuit One npn-type transistor having a base and a collector connected to each other has a second current source connected to the collector, and an emitter connected to the ground via a diode to constitute the second current mirror circuit. The other npn transistor has a third current source connected to its collector and the base of the bipolar transistor on the high side of the push-pull output stage, while an emitter connected to the push-pull output stage. Connected to the base of the bipolar transistor on the low side and Current source is connected to,
One of the pnp transistors connected to the base and the collector constituting the third current mirror circuit has a fifth current source connected to the collector, while the emitter can be applied with a power supply voltage via a diode. The other pnp-type transistor constituting the third current mirror circuit has a collector connected to the base of the low-side bipolar transistor of the push-pull output stage, and an emitter connected to the push-pull output stage. 2. The differential amplifier circuit according to claim 1 , wherein the differential amplifier circuit is connected to a base of a high-side bipolar transistor.

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