JP4963761B2 - Display device - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a display device, and more particularly to a low power consumption display device suitable for use in a portable display device.
[0002]
[Prior art]
In recent years, portable display devices such as mobile TVs and mobile phones have been required as market needs. In response to such demands, research and development has been actively conducted to cope with the reduction in size, weight, and power consumption of display devices.
[0003]
FIG. 8 shows a circuit configuration diagram of one display pixel of a liquid crystal display device according to a conventional example. A gate signal line 51 and a drain signal line 61 intersect with each other on an insulating substrate (not shown), and a TFT 65 connected to both signal lines 51 and 61 is provided in the vicinity of the intersection. . The source 11 s of the TFT 65 is connected to the display electrode 80 of the liquid crystal 21.
[0004]
Further, an auxiliary capacitor 85 for holding the voltage of the display electrode 80 for one field period is provided. One terminal 86 of the auxiliary capacitor 85 is connected to the source 11 s of the TFT 65, and the other electrode 87 is connected to each electrode 87. A common potential is applied to the display pixels.
[0005]
Here, when a scanning signal is applied to the gate signal line 51, the TFT 65 is turned on, and an analog video signal is transmitted from the drain signal line 61 to the display electrode 80 and held in the auxiliary capacitor 85. A video signal voltage applied to the display electrode 80 is applied to the liquid crystal 21, and the liquid crystal 21 is aligned according to the voltage, whereby a liquid crystal display can be obtained.
[0006]
Therefore, a display can be obtained regardless of a moving image or a still image. When a still image is displayed on such a liquid crystal display device, for example, an image of a dry cell is displayed as a battery remaining amount display for driving the mobile phone on a part of the liquid crystal display unit of the mobile phone.
[0007]
However, in the liquid crystal display device having the above-described configuration, even when a still image is displayed, the TFT 65 is turned on by a scanning signal and a video signal is sent to each display pixel as in the case of displaying a moving image. There was a need to rewrite.
[0008]
For this reason, driver circuits for generating drive signals such as scanning signals and video signals, and external LSIs for generating various signals for controlling the operation timing of the driver circuits always operate, and thus always consume large power. It was. For this reason, a mobile phone or the like having only a limited power source has a drawback that the usable time is shortened.
[0009]
On the other hand, a liquid crystal display device having a static memory in each display pixel is disclosed in Japanese Patent Laid-Open No. 8-194205. Describing a part of the publication, this liquid crystal display device, as shown in FIG. 9, holds a digital video signal in a memory in which two-stage inverters INV1 and INV2 are positively fed back, that is, a static memory. By using it as a circuit, power consumption is reduced.
[0010]
Here, according to the binary digital video signal held in the static memory, the switch element 24 controls the resistance value between the reference line Vref and the display electrode 80 and adjusts the bias state of the liquid crystal 21. . On the other hand, an AC signal Vcom is input to the common electrode. Ideally, this apparatus does not require a refresh to the memory if there is no change in the display image as in a still image.
[0011]
As described above, the conventional liquid crystal display device is suitable for displaying a full-color moving image corresponding to an analog video signal. On the other hand, a liquid crystal display device having a static memory for holding a digital video signal is suitable for displaying a still image with a low gradation and reducing power consumption.
[0012]
[Problems to be solved by the invention]
However, since both liquid crystal display devices have different video signal sources, it has not been possible to simultaneously realize full-color moving image display and still image display corresponding to low power consumption in one display device.
[0013]
The present invention provides a display device capable of supporting two types of display, a full color moving image display and a low power consumption still image display, with a single display device (for example, one liquid crystal display panel). To do. In addition, the present invention is intended to achieve high integration and low power consumption in a liquid crystal display device including a static memory for holding a digital video signal.
[0014]
[Means for Solving the Problems]
Of the inventions disclosed in this application, the outline of the main ones will be described as follows.
[0015]
Corresponding to a plurality of gate signal lines arranged in one direction on the substrate, a plurality of drain signal lines arranged in a direction crossing the gate signal line, and an intersection of the gate signal line and the drain signal line A holding circuit for supplying a high voltage and a low voltage and holding a digital video signal from the drain signal line in response to a signal inputted from the gate signal line in an active matrix display device having a pixel electrode disposed When,
A signal selection circuit that selects a first voltage and a second voltage according to a signal from the holding circuit and supplies the second voltage to the pixel electrode is disposed corresponding to the pixel electrode;
A reference voltage generation circuit that outputs the first or / and second voltage is disposed on the substrate.
[0016]
According to such a configuration, since it is not necessary to supply the first or / and second voltage from the outside, it is possible to completely stop the external circuit at the time of digital image display and to reduce power consumption.
[0017]
Corresponding to a plurality of gate signal lines arranged in one direction on the substrate, a plurality of drain signal lines arranged in a direction crossing the gate signal line, and an intersection of the gate signal line and the drain signal line A holding circuit for supplying a high voltage and a low voltage and holding a digital video signal from the drain signal line in response to a signal inputted from the gate signal line in an active matrix display device having a pixel electrode disposed When,
A signal selection circuit that selects a first voltage and a second voltage according to a signal from the holding circuit and supplies the selected voltage to the pixel electrode;
The second voltage is created by inverting the first voltage by an inverter formed on the substrate.
[0018]
According to such a configuration, the second voltage is generated by inverting the first voltage by the inverter formed on the substrate, so that the wiring for transmitting the second voltage is reduced. Can do. Thereby, high integration of display pixels can be achieved.
[0019]
Corresponding to a plurality of gate signal lines arranged in one direction on the substrate, a plurality of drain signal lines arranged in a direction crossing the gate signal line, and an intersection of the gate signal line and the drain signal line An active matrix display device including a pixel electrode disposed; a holding circuit that is supplied with a high voltage and a low voltage and holds a video signal from the drain signal line according to a signal input from the gate signal line; ,
A signal selection circuit that selects a first voltage and a second voltage according to a signal from the holding circuit and supplies the selected voltage to the pixel electrode;
The signal selection circuit includes a first complementary transistor that selects the first voltage and a second complementary transistor that selects the second voltage.
[0020]
According to such a configuration, since the signal selection circuit is composed of complementary transistors, the operating voltage of the holding circuit can be reduced and power consumption can be reduced.
[0021]
DETAILED DESCRIPTION OF THE INVENTION
Next, the display device according to the embodiment of the present invention will be described in detail. FIG. 1 shows a circuit configuration diagram of a liquid crystal display device according to a first embodiment of the present invention.
[0022]
On the insulating substrate 10, a plurality of gate signal lines 51 connected to a gate driver 50 for supplying a scanning signal are arranged in one direction, and a plurality of drain signal lines are arranged in a direction intersecting with the gate signal lines 51. 61 is arranged.
[0023]
Sampling transistors SP1, SP2,..., SPn are turned on to the drain signal line 61 in accordance with the timing of the sampling pulse output from the drain driver 60, and the data signal (analog video signal or digital video signal) of the data signal line 62 is turned on. ) Is supplied.
[0024]
The liquid crystal display panel 100 is configured by a plurality of display pixels 200 which are selected by a scanning signal from the gate signal line 51 and are supplied with a data signal from the drain signal line 61 arranged in a matrix.
[0025]
Hereinafter, a detailed configuration of the display pixel 200 will be described. In the vicinity of the intersection of the gate signal line 51 and the drain signal line 61, a circuit selection circuit 40 including a P-channel TFT 41 and an N-channel type 42 is provided. Both drains of the TFTs 41 and 42 are connected to the drain signal line 61, and both gates thereof are connected to the circuit selection signal line 88. One of the TFTs 41 and 42 is turned on in response to a selection signal from the circuit selection signal line 88. In addition, a circuit selection circuit 43 including a P-channel TFT 44 and an N-channel 45 is provided in a pair with the circuit selection circuit 40.
[0026]
As a result, it is possible to select and switch between an analog video signal display (corresponding to a full-color moving image), which will be described later, and a digital video display (corresponding to low power consumption, still image). In addition, a pixel selection circuit 70 including an N-channel TFT 71 and an N-channel TFT 72 is disposed adjacent to the circuit selection circuit 40. The TFTs 71 and 72 are connected in series with the TFTs 41 and 42 of the circuit selection circuit 40, respectively, and a gate signal line 51 is connected to both gates thereof. The TFTs 71 and 72 are configured such that both are turned on simultaneously in accordance with the scanning signal from the gate signal line 51.
[0027]
In addition, an auxiliary capacitor 85 for holding an analog video signal is provided. One electrode 86 of the auxiliary capacitor 85 is connected to the source of the TFT 71. The other electrode 87 is connected to a common auxiliary capacitance line 81 and supplied with a bias voltage Vsc. When the gate of the TFT 71 is opened and an analog video signal is applied to the liquid crystal 21, the signal must be held for one field period. However, with only the liquid crystal 21, the voltage of the signal gradually decreases with time. If it does so, it will appear as display unevenness and a good display cannot be obtained. Therefore, an auxiliary capacitor 85 is provided to hold the voltage for one field period.
[0028]
A P-channel TFT 44 of the circuit selection circuit 43 is provided between the auxiliary capacitor 85 and the liquid crystal 21, and is configured to be turned on / off simultaneously with the TFT 41 of the circuit selection circuit 40.
[0029]
A holding circuit 110 and a signal selection circuit 120 are provided between the TFT 72 of the pixel selection circuit 70 and the display electrode 80 of the liquid crystal 21. The holding circuit 110 includes two inverter circuits 111 and 112 that are positively fed back, and constitutes a static memory that holds a digital binary value. The two inverter circuits 111 and 112 are supplied with a voltage VDD and a voltage VSS (voltage VDD> voltage VSS) as power supply voltages. The two inverter circuits 111 and 112 are preferably CMOS inverters for reducing power consumption.
[0030]
The signal selection circuit 120 is a circuit that selects two signals in accordance with a signal from the holding circuit 110, and includes two N-channel TFTs 121 and 122. The output of the inverter circuit 11 is applied to the gate of the TFT 121, and the output of the inverter 112 is applied to the gate of the TFT 122. Thus, since the complementary output signals from the holding circuit 110 are applied to the gates of the TFTs 121 and 122, the TFTs 121 and 122 are turned on and off in a complementary manner.
[0031]
The two signals selected by the signal selection circuit 120 are an AC voltage counter electrode signal VCOM (signal A) and an AC voltage centered on the counter electrode signal VCOM, and an AC drive signal (signal) for driving the liquid crystal. B). The signal A and the signal B are rectangular wave signals having opposite phases to each other, and are AC-driven with a voltage between the voltage VDD and the voltage VSS for driving the inverter circuits 111 and 112 of the holding circuit 110.
[0032]
Here, when the TFT 122 is turned on, the signal B is selected, and when the TFT 121 is turned on, the signal A is selected. The selected signal A or signal B is supplied to the display electrode 80 that applies a voltage to the liquid crystal 21 via the TFT 45 of the circuit selection circuit 43. A counter electrode signal VCOM (= signal A) is supplied to the counter electrode 32 of the liquid crystal 21.
[0033]
The two signals A and B can be supplied from the external circuit board 90 of the liquid crystal display panel 100. In this embodiment, the reference voltage generation circuit for generating the signals A and B is used. 50 is provided on the insulating substrate 10 of the liquid crystal display panel 100, so that it is unnecessary to supply the signal A and the signal B from the outside. That is, the voltage VDD and the voltage VSS are supplied to the reference voltage generation circuit 500 as the power supply voltage, similarly to the holding circuit 110, and the signals A and B are created based on the voltage VDD and the voltage VSS.
[0034]
Thereby, the structure of the external circuit board 90 can be simplified. In addition, since the signals A and B required in the digital display mode are generated inside the liquid crystal display panel 100, it is only necessary to supply the power supply voltages VDD and VSS from the outside. As a result, the external circuit (panel drive LSI 91 and a circuit board 90 to be described later) can be completely stopped, and the power consumption of the entire system can be reduced.
[0035]
Next, a specific circuit configuration example of the reference voltage generation circuit 50 will be described. As shown in FIG. 2, the inverter circuit 501 and the inverter circuit 502 are connected in series, and the output of the inverter circuit 502 is fed back to the input of the inverter circuit 501 through a capacitor 505 having a capacitance value C. The output of the inverter circuit 501 is fed back to its input through a resistor 504 having a resistance value R.
[0036]
In the above configuration, the oscillation frequency can be adjusted by adjusting the time constants of R and C. Reference numeral 503 denotes a buffer inverter circuit for adjusting the oscillation waveform. The inverter circuits 501, 502, and 503 are supplied with power supply voltages VDD and VSS as drive power supply voltages, respectively. The signal A described above can be obtained from the output of the inverter circuit 503. Further, the signal B having a phase opposite to that of the signal A can be obtained from the output of the inverter circuit by further connecting one inverter circuit to the output of the inverter circuit 503.
[0037]
Another circuit configuration example of the reference voltage generation circuit 50 will be described. This is a ring oscillator, and as shown in FIG. 3, an odd number of inverter circuits 601, 602 and 603 form a feedback loop, and oscillation is caused by the internal delay. The oscillation frequency can be adjusted by adjusting a time constant determined by the resistance value R of the resistor 604 and the capacitance value C of the capacitor 605.
[0038]
Next, referring to FIG. 1 again, the peripheral circuit of the liquid crystal panel 100 will be described. A panel driving LSI 91 is provided on an external circuit board 90 which is a separate substrate from the insulating substrate 10 of the liquid crystal panel 100. A vertical start signal STV is input to the gate driver 50 from the panel driving LSI 91 of the external circuit board 90, and a horizontal start signal STH is input to the drain driver 60. A video signal is input to the data line 62.
[0039]
Next, a method for driving the display device having the above-described configuration will be described with reference to FIGS. 1, 2, 3, and 4. FIG. 4 is a timing chart when the liquid crystal display device is selected in the digital display mode.
(1) In the case of the analog display mode When the analog display mode is selected according to the mode signal MD, an analog video signal is set to be output to the data signal line 62. Further, the selection signal from the circuit selection signal line 88 becomes “L”, and the TFTs 41 and 44 of the circuit selection circuits 40 and 43 are turned on.
[0040]
Further, the sampling transistor SP is turned on according to the sampling signal based on the horizontal start signal STH, and the analog video signal of the data signal line 62 is supplied to the drain signal line 61.
[0041]
A scanning signal is supplied to the gate signal line 51 based on the vertical start signal STV. When the TFT 71 is turned on according to the scanning signal, the analog video signal Sig is transmitted from the drain signal line 61 to the display electrode 80 and held in the auxiliary capacitor 85. A video signal voltage applied to the display electrode 80 is applied to the liquid crystal 21, and the liquid crystal 21 is aligned according to the voltage, whereby a liquid crystal display can be obtained.
[0042]
In this analog display mode, input video signals are sequentially input, which is suitable for displaying a full-color moving image. However, the LSI 91 and the drivers 50 and 60 of the external circuit board 90 are constantly consuming power to drive them.
(2) When the digital display mode is selected according to the digital display mode mode signal MD, the digital video signal is set to be output to the data signal line 62. Further, the selection signal from the circuit selection signal line becomes “H”, and the holding circuit 110 becomes operable.
In addition, the TFTs 41 and 44 of the circuit selection circuits 40 and 43 are turned off,
The TFTs 42 and 45 are turned on.
[0043]
Further, start signals STV and STH are input from the panel drive LSI 91 of the external circuit board 90 to the gate driver 50 and the drain driver 60, respectively. In response to this, sampling signals are generated in sequence, and the sampling transistors SP1, SP2,.
[0044]
Here, the first row, that is, the gate signal line 51 to which the scanning signal G1 is applied will be described. First, the TFTs of the display pixels P11, P12,... P1n connected to the gate signal line 51 by the scanning signal G1 are turned on for one horizontal scanning period.
[0045]
When attention is paid to the display pixel P11 in the first row and first column, the digital video signal S11 sampled by the sampling signal SP1 is inputted to the drain signal line 61. When the TFT 72 is turned on by the scanning signal G1, the drain signal D1 is input to the holding circuit 110 of the display pixel P11.
[0046]
The signal held by the holding circuit 110 is input to the signal selection circuit 120, the signal selection circuit 120 selects the signal A or the signal B, the selected signal is applied to the display electrode 80, and the voltage Is applied to the liquid crystal 21.
[0047]
By scanning from the gate signal line 51 to the gate signal line 51 in the last row in this way, scanning for one screen (one field period), that is, all dot scanning is completed, and one screen is displayed.
[0048]
Here, when one screen is displayed, voltage supply to the gate driver 50, the drain driver 60, and the external panel driving LSI 91 is stopped to stop driving them. Here, the signal A or the signal B is generated from the reference voltage generation circuit 50 provided on the insulating substrate 10 of the liquid crystal display panel 100 as described above. Therefore, it is only necessary to supply the power supply voltages VDD and VSS from the outside of the liquid crystal display panel 100 to the holding circuit 110 and the reference voltage generating circuit 50.
[0049]
At this time, when “H (high)” is input to the drain signal line 61 as a digital video signal to the holding circuit 110, “L” is applied to the first TFT 121 in the signal selection circuit 120 through the inverter circuit 111. Since the first TFT 121 is turned off because “H” is inputted to the other second TFT 122 through the inverter circuit 112, the second TFT 122 is turned on.
[0050]
Then, the signal B is selected and the voltage of the signal B is applied to the liquid crystal. When a signal having a phase opposite to that of the counter electrode 32 is applied to the display electrode 80, the liquid crystal rises due to an electric field, so that the display can be observed as a black display on the NW display panel.
[0051]
When “L” is input to the drain signal line 61 as a digital video signal to the holding circuit 110, “H” is input to the first TFT 121 in the signal selection circuit 120. Is turned on, and “L” is input to the other second TFT 122, so that the second TFT 122 is turned off. Then, the signal A is selected and the voltage of the signal A is applied to the liquid crystal. That is, since the same voltage as that of the counter electrode 32 is applied to the display electrode 80, no electric field is generated and the liquid crystal does not stand up. Therefore, the display can be observed as a white display on the NW display panel.
[0052]
As described above, by writing one screen and holding it, it can be displayed as a still image. However, in this case, the driving of the drivers 50 and 60 and the LSI 91 is stopped, thereby reducing the power consumption accordingly. be able to. Further, since it is not necessary to supply the signal A and the signal B from the outside, the operation of the external circuit can be completely stopped and power consumption can be reduced.
[0053]
Next, FIG. 5 shows a circuit configuration diagram of a liquid crystal display device according to a second embodiment of the present invention. In the present embodiment, the signal A (= counter electrode signal VCOM) is inverted by the inverter 300 to generate the signal B. Thereby, the wiring of the signal B in the display panel 100 can be reduced, and the display pixel 200 can be highly integrated.
[0054]
Specifically, two configuration techniques are possible. One configuration method is to supply the signal A from the external circuit board 90 and to invert the signal A by the inverter 300 provided on the insulating substrate 10 in the display panel 100.
[0055]
Another configuration method is to provide a reference voltage generation circuit 500 for generating the signal A on the insulating substrate 10 in the display panel 100 as shown in FIG. As a result, as in the first embodiment, only the power supply VDD and VCC need be supplied from the outside, and it is not necessary to supply the signals A and B. Note that the inverter 300 is preferably a CMOS inverter in order to reduce power consumption. Here, the configuration of the reference voltage generation circuit 500 is as described above.
[0056]
Next, FIG. 6 shows a circuit configuration diagram of a liquid crystal display device according to a third embodiment of the present invention. In the first and second embodiments described above, the signal selection circuit 120 is composed of two N-channel TFTs 121 and 122, and complementary output signals from the holding circuit 110 are supplied to the gates of the TFTs 121 and 122. Each is applied. That is, the signal selection circuit 120 is composed of a single channel type transmission gate.
[0057]
The present embodiment is characterized in that the signal selection circuit 120 is composed of a CMOS type transmission gate. When the signal selection circuit 120 is configured with a single channel type transmission gate, a sufficient current cannot flow through the TFTs 121 and 122 unless the high level output of the holding circuit 110 is increased. The levels of the signals A and B that have passed through the signal selection circuit 120 are lowered, and the contrast of the liquid crystal display is deteriorated.
[0058]
However, since the power supply voltage VDD of the holding circuit 110 must be increased in order to increase the high level output of the holding circuit 110, power consumption increases.
[0059]
Therefore, as shown in FIG. 6, the signal selection circuit 120 is composed of CMOS transmission gates 123 and 124 (complementary TFTs) to solve the problem. That is, according to the present embodiment, the high-level output of the holding circuit 110 can be suppressed to the same potential as the maximum values of the signals A and B without causing a decrease in the signals A and B. This makes it possible to reduce power consumption without deteriorating the contrast of the liquid crystal display.
[0060]
For the same reason as described above, the TFT 45 of the circuit selection circuit 43 is also preferably constituted by a CMOS type transmission gate (complementary TFT).
[0061]
In the present embodiment, the signal A and the signal B can also be created by the reference voltage generation circuit 500. However, as in the second embodiment, the signal A is inverted by the inverter 300 to cause the signal B to be inverted. You may make it create.
[0062]
The display device of the present invention is preferably applied to a reflective liquid crystal display device among liquid crystal display devices. The device structure of this reflective liquid crystal display device will be described with reference to FIG.
[0063]
As shown in FIG. 7, on one insulating substrate 10, a gate insulating film 12 is formed on a semiconductor layer 11 made of polycrystalline silicon and formed into an island, and above the semiconductor layer 11, the gate insulating film 12 is formed. A gate electrode 13 is formed thereon.
[0064]
A source 11 s and a drain 11 d are formed in the lower semiconductor layer 11 located on both sides of the gate electrode 13. An interlayer insulating film 14 is deposited on the gate electrode 13 and the gate insulating film 12, and contact holes 15 and 18 are formed at positions corresponding to the drain 11d and the source 11s. The drain 11 d is connected to the drain electrode 16, and the source 11 s is connected to the display electrode 19 through a contact hole 18 provided in the planarization insulating film 17 provided on the interlayer insulating film 14.
[0065]
Each display electrode 19 formed on the planarization insulating film 17 is made of a reflective material such as aluminum (Al). An alignment film 20 made of polyimide or the like for aligning the liquid crystal 21 is formed on each display electrode 19 and the planarization insulating film 17.
[0066]
On the other insulating substrate 30, a color filter 31 exhibiting each color of red (R), green (G), and blue (B), a counter electrode 32 made of a transparent conductive film such as ITO (Indium Tin Oxide), And the alignment film 33 which orientates the liquid crystal 21 is formed in order. When color display is not used, the color filter 31 is not necessary.
[0067]
The periphery of the pair of insulating substrates 10 and 30 thus formed is adhered with an adhesive sealing material, and the liquid crystal 21 is filled in the gap formed thereby, thereby completing the reflective liquid crystal display device.
[0068]
As indicated by the dotted arrows in the figure, the external light incident from the viewer 1 side enters from the counter electrode substrate 30 in order, is reflected by the display electrode 19, is emitted to the viewer 1 side, and the display is viewed by the viewer 1. Can be observed.
[0069]
Thus, the reflective liquid crystal display device is a method of observing the display by reflecting external light, and unlike the transmissive liquid crystal display device, it is not necessary to use a so-called backlight on the side opposite to the viewer side. Does not require power to turn on its backlight. Therefore, the display device of the present invention is preferably a reflective liquid crystal display device that does not require a backlight and is suitable for low power consumption.
[0070]
In the above-described embodiment, the case where a 1-bit digital data signal is input in the digital display mode has been described. However, the present invention is not limited thereto, and even in the case of a multi-bit digital data signal. It is possible to apply. By doing so, multi-gradation display can be performed. At that time, it is necessary to set the number of holding circuits and signal selection circuits according to the number of input bits.
[0071]
In the above-described embodiment, the case where a still image is displayed on a part of a liquid crystal display panel has been described. However, the present application is not limited thereto, and a still image can be displayed on all display pixels. Thus, the present invention has a characteristic effect of the present invention.
[0072]
In the above-described embodiment, the case of the reflective liquid crystal display device has been described. However, the transmissive type can be implemented in exactly the same manner. In the case of the transmission type, the parasitic capacitance can be reduced while maintaining the transmittance by disposing the transparent electrode in a region excluding the TFT, the holding circuit, the signal selection circuit, and the signal wiring in one pixel. Also, when used in a transmissive liquid crystal display device, after displaying one screen, the supply of voltage to the gate driver 50, the drain driver 60, and the external panel driving LSI 91 is stopped, thereby consuming the corresponding amount. Electric power can be reduced.
[0073]
【Effect of the invention】
As described above, according to the display device of the present invention, in the digital display mode, signals applied to the display pixels are created by the reference voltage generation circuit provided in the display panel. There is no need to supply from. As a result, the configuration of the external circuit can be simplified, and the external circuit can be completely stopped in the digital display mode to reduce power consumption.
[0074]
Further, by providing an inverter that inverts a signal applied to the display pixel in the display panel, a space for wiring the inversion signal is reduced, and high integration can be achieved.
[0075]
Furthermore, by configuring the signal selection circuit that selectively supplies signals to the pixel electrodes with complementary transistors, the power supply voltage of the holding circuit can be reduced, and power consumption can be reduced accordingly.
[Brief description of the drawings]
FIG. 1 is a circuit configuration diagram of a liquid crystal display device according to a first embodiment of the present invention.
FIG. 2 is a circuit configuration diagram of a reference voltage generation circuit according to the first embodiment of the present invention.
FIG. 3 is another circuit configuration diagram of the reference voltage generation circuit according to the first embodiment of the present invention.
FIG. 4 is a timing chart of the liquid crystal display device according to the first embodiment of the present invention.
FIG. 5 is a circuit configuration diagram of a liquid crystal display device according to a second embodiment of the present invention.
FIG. 6 is a circuit configuration diagram of a liquid crystal display device according to a third embodiment of the present invention.
FIG. 7 is a cross-sectional view of a reflective liquid crystal display device.
FIG. 8 is a circuit configuration diagram of a liquid crystal display device according to a conventional example.
FIG. 9 is another circuit configuration diagram of a liquid crystal display device according to a conventional example.
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 10 Insulating substrate 13 Gate electrode 21 Liquid crystal 40 Circuit selection circuit 43 Circuit selection circuit 50 Gate driver 51 Gate signal line 60 Drain driver 61 Drain signal line 70 Pixel selection circuit 85 Auxiliary capacity 110 Holding circuit 120 Signal selection circuit 500 Reference voltage generation circuit

Claims (4)

A still image display mode based on a digital video signal and a moving image display mode based on an analog video signal are provided, and a plurality of gate signal lines arranged in one direction on the substrate and arranged in a direction crossing the gate signal lines. An active matrix display device comprising a plurality of drain signal lines to which a digital video signal or an analog video signal is selectively supplied, and pixel electrodes arranged corresponding to the intersections of the gate signal line and the drain signal line In
The first and second inverter circuits positively fed back are supplied with a high voltage and a low voltage as their power supply voltages, and a digital video signal from the drain signal line according to a signal input from the gate signal line A holding circuit for holding
A signal to be selected and supplied to the pixel electrode by selecting either the first signal or the second signal which are rectangular waves of opposite phases according to the outputs of the first and second inverter circuits of the holding circuit And a selection circuit is arranged corresponding to the pixel electrode,
A reference voltage generating circuit that is disposed on the substrate and generates the first and second signals using a high voltage and a low power supply voltage supplied to the holding circuit from the outside of the substrate ;
A panel driving circuit disposed outside the substrate and driving the plurality of gate signal lines and the plurality of drain signal lines, and in the still image display mode, the panel driving circuit stops operating, and A display device, wherein a reference voltage generation circuit generates the first and second signals without receiving an output from the panel drive circuit. An analog video signal supplied to the drain signal line is applied to the pixel electrode in the moving image display mode , and a digital video signal supplied to the drain signal line is applied to the holding circuit in the still image display mode. The display device according to claim 1, further comprising a circuit selection circuit for inputting to the input. The display device according to claim 1, wherein the first signal and the second signal are signals that are AC driven with a voltage between the low voltage and the high voltage.   The reference voltage generation circuit is configured to output an inverter that outputs the first signal and inverts the first signal and outputs the second signal on the substrate. Item 4. The display device according to any one of Items 1 to 3.

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