JPS5823091A - Picture display unit - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a fine dot image display device using liquid crystal and having no halftones.

A conventional ili health display device is shown in FIG. LCD and MOB
It is constructed by combining type FleT arrays. 1st
In the figure, a unit pixel is composed of a MOEI type FITll formed in a semiconductor layer and a signal storage capacitor 2a.
, and a liquid crystal cell 3a.

This basic operation will be explained. First, P the MO8 type FIT.
channel, and when a negative pulse voltage as a gate signal is applied to the gate line x1, FI7 1a is turned on υ, and the image signal applied to the signal line Y1 is I
Capacitor 2aK is charged through FICT 1.

When the negative pulse disappears, FIT I & is turned off, and the voltage charged in the capacitor is maintained while being discharged through the liquid crystal cell. Then, the gate signal is
Line-sequential scanning is performed from Xi+1 to Xi+z, and image signals corresponding to the positions are converted to Yi, Yi+1, etc.
・By applying more power, the entire image is displayed. At this time, the counter electrode is a transparent electrode attached to the entire surface of the glass plate, and OOM in FIG. 1 is the common electrode terminal. The common electrode is always kept at a certain potential. Now, this type of image display device is ideal for displaying analog signals or moving images, such as on a TV, but it is not suitable for displaying still images, etc., which do not require halftones. was extremely inappropriate. This is because, as mentioned above, the signal charged in the capacitor 2a is transmitted to the liquid crystal cell 3a.
As shown in curve 4 in Figure 2, even if a zero-level signal ``1'' is written, the voltage across the capacitor 2a will drop rapidly by the time the next write is performed. Even when displaying a still image, it is necessary to always perform a write operation at a certain period TR, and sufficient power is required to keep the entire circuit running.Similarly, curve 5 shows the voltage across capacitor 2b. Furthermore, there is a drawback that an increase in power consumption due to reversing the charging and discharging of the capacitor cannot be avoided.

SUMMARY OF THE INVENTION Therefore, it is an object of the present invention to provide an image display device that consumes less power and is suitable for displaying images that do not require halftones or still images.

The present invention will be explained below with reference to the drawings.

FIG. 5 shows the rIfiJ image display device of the present invention. A unit pixel is composed of an MO8 type FE formed in a semiconductor layer.
T6a, 1-bit memory cell a, and liquid crystal cell 8a
It is. Memory self a here! When the t"1" embroidery code is input, the output is set to "1"("0"), and then "0"
The previous state is maintained until the # signal is input.
When a signal of "0" is input, the output is set to "0"(1") and this state is maintained.

When using an image display device having such a configuration, as shown in FIG. 4, writing pulses Xi, Xi+ are generated at a certain moment.
1 is applied to the memory cell to transfer information 1 from Yi and Yi+1.
When 1# is written, the information of 1# continues to be applied to the liquid crystal no matter how long the period is until the next write pulse is applied and the information of "0" is newly written.

Therefore, when it is “1”, a selection voltage is applied to the liquid crystal, and “0”
“1τ@0” so that a non-selective voltage is applied to the liquid crystal when
By setting the voltage level of # and the voltage level of the common electrode, it becomes possible to display an image without halftones and its still image with a very low voltage. because,
For still images, signal lines Yi, Yi+x...
This is because the drive circuits for the gate lines Xi, Xi+x, . . . can all be stopped. Also, instead of charging a signal to a capacitor,
This is because the output voltage of the memory cell is basically controlled without flowing current. Note that the fourth (719 and 10) represent the output voltages of the memory cells a and 7b, respectively.

FIG. 5 shows a specific embodiment of the memory cell section of the image display device of the present invention. That is, 0MO8 inverters 12, 13
2, the input of the inverter 12 is connected to the switching transistor 11 as the input of the memory cell, and the output of the inverter 15 is connected to the pixel electrode through the output of the memory cell. .

FIG. 6 shows another image display device of the present invention. The example shown in FIG. 6 has the added feature of AC drive, and is a switching transistor-like MOSFET 11. CMo
5 inverters 12, 13, liquid crystal cell 14, EX
It consists of a CLU OI V K -N OR circuit 15 and a clock source 16. CMOS inverter 12.
The configuration of the memory cell 15 is the same as the example shown in FIG. The other input terminal is connected to the common room i terminal OOM, and the clock for the 9th flow drive I is further input to the common electrode terminal. The voltages applied to the liquid level when the output of the memory cell is "1#" and "0" are shown in FIGS. 7 and 8, respectively. First, when the output of the memory cell is 11#, the clock source waveform 17 is 1. The inverted signal 18a is obtained as the output of the KNOR circuit 15. Therefore, if the output of the ENOR circuit 15 is connected to the pixel electrode, an AC drive waveform of a voltage of fV is applied to the liquid crystal as shown in FIG. Next, if the output of the memory cell is ``0#'', the clock source waveform 117
Since the signal 18b having the same phase as the ENOR circuit 15 is obtained as the output of the ENOR circuit 15, no voltage is applied to the liquid crystal. Therefore, when the input is "1#", the selected AC voltage is applied to the liquid crystal, and when the input is "0", no voltage is applied to the liquid crystal, and driving is always performed with alternating current, thereby extending the lifespan of the liquid crystal. Improved reliability can be achieved. FIG. 9 shows still another embodiment of the image display device of the present invention. Switching transistor 11゜0MO8 inverter 12.15) Transmission gate (hereinafter abbreviated as TG) 20.21, liquid crystal cell 1
4 and a clock source 16. The configuration of the memory cell using the CMOEI inverters 12 and 13 is the same as the example shown in FIG.
Connect the output of the inverter 15 to the n-channel gate of Ta2O and the P-channel side gate of TG21,
The input terminal of the 0MO8 inverter 16 is connected to the P-channel side gate of Ta2O and the n-channel side gate of TG21. Then, the outputs of Ta2O and 21 are connected to each other to form a pixel electrode, and the input terminal of TG21 is connected to a common electrode and connected to a clock source 16. Furthermore, Ta
The input terminal of 2O is shared by all pixels and connected to the clock source 16 via an inverter 24. With this configuration, when the output of the memory cell is 1#, T
Since a2O is in the active state and TG2d is in the off state, the same AC drive waveform of voltage V as in FIG.
No voltage is applied to the liquid crystal cell. The example shown in FIG. 9 is advantageous in increasing the pixel density because the area in which the circuit is built is smaller than the example shown in FIG. 6. Also, Figure 6,
In the example of FIG. 9, alternating current driving is possible using ENOR1 path and 1゛G, respectively, or in short, the clock applied to the pixel electrode when the output of the memory cell is 1'' and 0#. It is exactly the same as long as it has a circuit that can invert the polarity of
, an OR circuit, a combination of ＼IJDl paths, and a combination of OR circuits can perform exactly the same operation, and of course these also fall within the scope of the present invention.

Furthermore, the circuit configuration to which the selection voltage is applied when the input signal is "0" is exactly the same, and the details will be omitted. Also, Figure 6,
The example of FIG. 9 is similar to the examples of FIG. 3 and FIG. 5 in which peripheral circuits except the clock source are stopped in displaying a still image.

The original objective is to obtain an image display device that consumes less power and is suitable for displaying images that do not require halftones and their still images by using the image display device of the present invention as described above. is completely achievable. That is,
By making the circuitry entirely digital and by stopping all peripheral circuits when displaying still images, power consumption can be significantly reduced. Furthermore, since alternating current driving is possible at the same time, a display device with excellent longevity and reliability can be obtained. Therefore, by applying the present invention to character degradation devices such as characters and graphics using fine dots, it is possible to simultaneously achieve beautiful display using fine dots, low power consumption, long life, and high reliability. The industrial value of the invention is great.

[Brief explanation of the drawing]

FIG. 1 shows a circuit 1 of a conventional image display device. FIG. 2 is an explanatory diagram showing the relationship between the write pulse and the liquid crystal drive voltage in FIG. 1. No. 31 is a circuit diagram showing an embodiment of the image display device of the present invention. FIG. 4 shows the relationship between the write pulse and the inspection drive voltage in FIG. 3, and FIG. 5 is a circuit diagram showing a specific embodiment of the image display device of the present invention. FIG. 6 is a circuit diagram showing another embodiment of the image display device of the present invention. 7 and 8 are graphs showing the liquid crystal driving voltage in FIG. 6. FIG. 9 is a circuit diagram showing still another embodiment of the image display device of the present invention. 6a, 6b, 11...Switching elements. 7a, 7b...Memory cell 1.8a, 8b, 1
4...Liquid crystal cell. 9.10...Liquid crystal section #I voltage. 12.13...CMOB inverter. 15-・---E
NOR circuit. 16...Clock source. 17...Clock waveform. +8 &...Clock for selection. 181)...Clock for non-selection. 19a...Selected drive voltage. 19F)...Non-selection drive voltage 620.21...
...Transmission gate. 22...Tsock input terminal and common electrode terminal 26...Inverted clock input terminal. 24...Inverter. Fig. 7 Fig. 2 Fig. 3 Fig. 4 Figure 5 Figure 6 Figure 7 Figure 8 Figure 9

Claims (2)

[Claims] (1) A semiconductor layer formed on an insulating substrate made of glass, or a transparent substrate on which pixel electrodes are formed in a matrix on the semiconductor substrate and placed on the pixel electrodes via a liquid crystal. In an image display device having a transparent electrode as a counter electrode, at least one switching element and a 1-bit memory cell are provided for each of the pixel electrodes, and the output of the memory cell and the pixel electrode are connected. An image display device characterized by: (2) A semiconductor layer formed on an insulating substrate with glass eyes, or a semiconductor layer formed on a transparent substrate on which pixel electrodes are formed in a matrix on the semiconductor substrate and placed on the pixel electrodes via a liquid crystal. In the Kugarun display device with a transparent electrode as the counter electrode,
Each of the pixel electrodes is provided with at least one switching element, a 1-bit memory cell, and a signal selection circuit whose phase is inverted when the output of the memory cell is at an "H" level or an "L" level, An image display device characterized by a connection between an output of the signal selection circuit and a pixel electrode.