JP4946029B2 - Surface emitting semiconductor laser - Google Patents

Description

  The present invention relates to a surface emitting semiconductor laser used as a light source for optical information processing or high-speed optical communication.

  In recent years, interest in a surface-emitting semiconductor laser (Vertical-Cavity Surface-Emitting Laser diode: hereinafter referred to as VCSEL) has increased in technical fields such as optical communication and optical recording. VCSELs are not available in edge-emitting semiconductor lasers that have low threshold currents, low power consumption, can easily obtain a circular light spot, and can be evaluated in a wafer state or a two-dimensional array of light sources. Has excellent features. Taking advantage of these features, demand as a light source in the communication field is particularly expected.

  In a semiconductor device, a guard ring structure is well known as a region for preventing current from diffusing around the element or blocking current. For example, as shown in Patent Document 1, an avalanche photodiode widely used as a semiconductor light-receiving element for optical signals having a wavelength of 1.3 μm to 1.6 μm for optical communication is a P-type low concentration that prevents edge breakdown. It has a guard ring layer. Further, Patent Document 2 discloses an avalanche photodiode in which a guard ring is made of a pn junction.

Japanese Patent Laid-Open No. 5-7014 JP-A-9-45554

  FIG. 18 is a cross-sectional view of a conventional VCSEL. As shown in the figure, an n-side electrode 12 is formed on the back surface of the GaAs substrate 10, and an n-type lower DBR 14, an active layer 16, a current confinement layer 18, and a p-type upper DBR 20 are formed on the upper surface of the substrate 10. And a semiconductor layer including a p-type GaAs contact layer 22 are stacked. A cylindrical post P is formed from the contact layer 22 to a part of the lower DBR 14, and a region including the post P is covered with an interlayer insulating film 24. At the top of the post P, the p-side electrode 26 is ohmically connected to the contact layer 22 through the contact hole of the interlayer insulating film 24, and the p-side electrode 26 is formed on the interlayer insulating film 24 through the metal wiring 28. It is connected to the formed electrode pad 30. The substrate 10 is cut into individual chips along the scribe line 32.

  A VCSEL having the above configuration tends to have a shorter life when driven in a bare chip state under high temperature and high humidity (85 ° C., 85%, etc.) than when driven under room temperature and low humidity. One reason for this is that the p-type GaAs contact layer 22 for taking ohmic contact exposed around the chip is modified, the lower portion of the interlayer insulating film 24 is eroded, and the interlayer insulating film 24 is floated. There is a failure mode in which the electrode pad 30 or the metal wiring 28 is disconnected. This is presumably because a current path passing through the side surface of the chip is formed from the p-type contact layer 22 to the n-type lower DBR 14 under high humidity. For this reason, in order to use a VCSEL with a bare chip, it is necessary to adopt a structure in which such a problem does not occur.

  On the other hand, the guard ring structures disclosed in Patent Documents 1 and 2 described above are publicly known, and the configuration has many pn junctions, and the effect is aimed at suppressing the diffusion current of the photodiode. In the case of a thin film photodiode, a structure in which an electrode is grounded and dropped to the ground is known, but the effect is also suppression of diffusion current. Therefore, there is no suggestion of a configuration that should solve the above-described problem.

The present invention has been made to solve the above-described conventional problems, and an object of the present invention is to provide a surface emitting semiconductor laser having an improved life under high temperature and high humidity.
A further object of the present invention is to provide a surface emitting semiconductor laser capable of realizing a reliable and stable operation in a bare chip state.

  A surface-emitting type semiconductor laser according to the present invention includes a first conductive type first multilayer reflector, an active layer region, and a second conductive type constituting a resonator together with the first multilayer reflector on a substrate. A semiconductor layer including a second multilayer mirror and a contact layer is stacked, and a post-like light emitting portion for emitting laser light and a pad forming region are separated by a groove formed in the semiconductor layer, and further, a light emitting portion A first upper electrode that is electrically connected to the contact layer and formed with an opening that defines a laser light emission region, and is formed on the pad formation region. And a second upper electrode for electrically connecting to the film reflecting mirror.

  The light emitting part is a cylindrical post or pillar structure defined by a groove. The pad forming region is defined by a dicing region for cutting the substrate, and preferably the second upper electrode has a frame-like structure formed along the outer edge of the pad forming region. The first upper electrode may extend to the pad formation region via the groove and integrally form the electrode pad formed on the pad formation region.

  Preferably, an insulating film exposing the contact layer at the outer edge of the pad formation region is formed, and the second upper electrode is formed on the insulating film and the contact layer so as to cover the step at the end of the insulating film. Separately, there is an outer peripheral groove from the contact layer to the first multilayer reflector along the outer edge of the pad formation region, and at least the side surface of the contact layer exposed by the outer peripheral groove is the second upper electrode. It may be covered with. Preferably, the outer peripheral groove is formed simultaneously with the groove defining the light emitting portion. The pad forming region may be defined by a region for dicing the substrate, and the outer peripheral groove may include a scribe line for cutting the substrate.

  Preferably, the substrate has a first conductivity type, a lower electrode is formed on the back surface of the substrate, and the second upper electrode is electrically connected to the lower electrode. The second upper electrode may be electrically connected to a conductive member (for example, a mount member) to which the lower electrode of the substrate is connected. The multilayer mirror is made of, for example, a III-V group compound semiconductor layer containing Al, for example, AlGaAs, and the contact layer is made of, for example, GaAs.

  According to the present invention, there is provided a method of manufacturing a surface-emitting type semiconductor laser in which a post-like light emitting portion that emits laser light and a pad forming region are separated by a groove. Forming a reflector, an active layer region, a second multilayer reflector of the second conductivity type constituting a resonator together with the first multilayer reflector, and a semiconductor layer including a contact layer; and a groove in the semiconductor layer Separating the light emitting portion and the pad forming region, forming an insulating film on the substrate including the light emitting portion and the pad forming region, exposing the contact layer of the light emitting portion, and forming the pad forming region Patterning the insulating film to expose the contact layer on the outer edge, and connecting with the contact layer on the outer edge of the first upper electrode and the pad forming region connected to the contact layer of the exposed light emitting portion Forming a formed second upper electrode.

  According to the present invention, the second upper electrode for electrically connecting the second conductivity type contact layer in the pad formation region to the first multilayer reflector of the first conductivity type is provided in the pad formation region. As a result, the potential of the contact layer in the pad formation region and the first multilayer mirror is made the same as much as possible so that no current flows between the contact layer in the pad formation region and the first multilayer reflector. It is possible to provide a surface emitting semiconductor laser having a long lifetime even under high temperature and high humidity conditions by suppressing the occurrence of disconnection or the like of the first upper electrode due to the modification of the contact layer.

  The best mode for carrying out the present invention will be described below with reference to the drawings.

  FIG. 1 shows a wafer on which a plurality of VCSELs are formed, FIG. 2 is a plan view of the VCSEL according to the first embodiment of the present invention, and FIG. 3 is a sectional view taken along line AA of FIG. As shown in FIG. 1, a plurality of VCSELs 100 are formed on a GaAs wafer W. The wafer W is cut along the scribe line L by a dicer of a dicing apparatus, and a rectangular VCSEL 100 as shown in FIG. 2 is obtained.

  As shown in FIGS. 2 and 3, the VCSEL 100 includes an n-side electrode 104 on the back surface of an n-type GaAs substrate 102, and further includes a lower DBR (Distributed) made of an n-type AlGaAs multilayer semiconductor film on the substrate 102. Bragg reflector (distributed Bragg reflector) 106, active layer region 108, current confinement layer 110 made of p-type AlAs, upper DBR 112 made of a p-type AlGaAs multilayer semiconductor film, and semiconductor of a p-type GaAs contact layer 114 Layers are stacked.

  In the substrate 102, a ring-shaped groove 116 formed by etching the semiconductor layer is formed. The groove 116 preferably has a depth reaching a part of the lower DBR 106, and the cylindrical post P and the pad forming region (outer peripheral portion) 118 are separated by the groove 116. The post P forms a resonator structure by the lower DBR 106 and the upper DBR 112, and the active layer region 108 and the current confinement layer 110 are interposed therebetween. The current confinement layer 110 includes an oxidized region obtained by oxidizing AlAs exposed on the side surface of the post P and a conductive region surrounded by the oxidized region, and performs current confinement and light confinement in the conductive region. The pad formation region 118 is defined by a scribe line L or a region to be diced.

  An interlayer insulating film 120 is formed on the substrate 102 including the post P. At the top of the post P, a circular contact hole opening is formed in the interlayer insulating film 120, and the p-side upper electrode 130 is ohmically connected to the contact layer 114 through this opening. In the center of the p-side upper electrode 130, a circular opening 132 that defines a laser light emission region is formed.

  In the pad formation region 118, the interlayer insulating film 120 has an end portion 120a patterned in a rectangular shape so as to expose the contact layer 114 at the outer edge of the pad formation region. The region exposed by the end 120a can be cut by dicing.

  The upper electrode 130 at the top of the post is connected to a strip-shaped electrode wiring 134, and the electrode wiring 134 extends to the pad formation region 118 so as to sandwich the groove 116. A circular electrode pad 136 is formed on the interlayer insulating film 120 in the pad formation region 118, and the electrode wiring 134 is connected to the electrode pad 136. The upper electrode 130, the electrode wiring 134, and the electrode pad 136 are made of, for example, a laminated metal of titanium (Ti) and gold (Au), and these are preferably patterned at the same time.

  Further, a frame-shaped or ring-shaped second upper electrode 140 is formed along the outer edge of the pad forming region 118. The second upper electrode 140 covers the interlayer insulating film 120 and the contact layer 114 so as to straddle the step of the end 120 a of the interlayer insulating film 120. The second upper electrode 140 may cover part or all of the contact layer 114 exposed by the interlayer insulating film 120. The second upper electrode 140 is ohmically connected to the contact layer 114 and is electrically short-circuited to the n-side electrode 104 by the short-circuit means 150. For example, when the n-side electrode 104 of the VCSEL chip is mounted on the conductive mount member, the short-circuit means 150 is realized by wire bonding the second upper electrode 140 to the mount member.

  When the VCSEL 100 is driven, a forward bias current is applied to the p-side upper electrode 130 and the n-side electrode 104, and the laser light generated in the active layer region 108 is emitted from the opening 132 in a direction substantially perpendicular to the substrate 102. The

  In this embodiment, since the second upper electrode 140 is short-circuited with the n-side electrode 104 and both are substantially at the same potential, the p-type GaAs contact layer 114 extends to the n-type at the end of the pad formation region 118. Current flow to the lower DBR 106 or the substrate 102 is suppressed. The reason why the GaAs contact layer 114 around the chip is deformed under high temperature and high humidity is considered to be that current flows around the chip due to the influence of moisture under high humidity, but in this embodiment, the current does not flow. Since the potentials around the chip and the back surface side are made the same as much as possible, the floating of the interlayer insulating film 120 due to the transformation of the GaAs contact layer 114 caused by current application, the disconnection of the upper electrode 130, the electrode wiring 134, and the electrode pad 136 And the occurrence of peeling are suppressed. Thereby, a VCSEL having a long life can be provided even in an operation under high temperature and high humidity.

  FIG. 4 shows the result of conducting a 10 mA energization test on 16 samples in an environment of 85 ° C. and 85% RH. As is clear from the figure, the light output is not lowered in all the VCSELs, and the reliability improvement effect is confirmed.

  Next, a second embodiment of the present invention will be described with reference to FIG. The same components as those in the first embodiment are denoted by the same reference numerals. In the VCSEL 100a according to the second embodiment, a frame-shaped outer peripheral groove 200 is formed with a constant width along the outer edge of the pad forming region 118. The outer circumferential groove 200 can be formed simultaneously with the formation of the groove 116. The outer peripheral groove 200 exposes the side surface 202 of the pad forming region 118, and a part of the surface of the lower DBR 106 is exposed at the bottom of the outer peripheral groove 200. The outer peripheral groove 200 can be preferably a dicing area when the substrate is diced.

  The surface of the contact layer 114 in the pad formation region 118 is covered with an interlayer insulating film 120. An electrode pad 136 is formed on the interlayer insulating film 120, and a second upper electrode 210 is formed apart from the electrode pad 136. The second upper electrode 210 covers the side surface 202 of the pad forming region 118 and extends to the surface of the lower DBR 106. The contact layer 114 exposed at the side surface 202 is covered with the second upper electrode 210 and is electrically short-circuited with the lower DBR 106.

  According to the second embodiment, since the side surface 202 of the pad formation region 118 is covered with the second upper electrode 210, moisture and moisture from the outside enter the semiconductor layer in the pad formation region 118. Since the contact layer 114 and the lower DBR 106 are short-circuited effectively by the second upper electrode 210, the potentials on the chip side surface (side surface of the semiconductor layer exposed by the outer peripheral groove 200) and the back surface side are the same as much as possible. As a result, almost no current flows through the pn junction in the side surface of the chip or in the pad formation region 118, so that the transformation of the GaAs contact layer 114 is suppressed.

  In the above embodiment, a single spot in which one light emitting unit is formed on one VCSEL chip is illustrated. However, as shown in FIG. 6, in the present invention, a plurality of light emitting units (posts) P are provided on one VCSEL chip 100a. The present invention can also be applied to a multi-spot in which is formed. Also in the case of the multi-spot, the second upper electrode 220 is formed along the outer edge of the pad formation region 118. Further, an outer peripheral groove may be formed along the outer edge as in the second embodiment. The number of posts formed on the array is not limited to four as described above, and the posts may be an array arranged in a secondary shape.

  Next, a manufacturing method of the VCSEL according to the first embodiment will be described with reference to FIGS. These drawings show one VCSEL before dicing the substrate.

As shown in FIG. 7A, an n-type Al _0.8 Ga _0.2 As layer and an n-type Al _0.1 Ga _0.9 layer are formed on the (100) surface of the n-type GaAs substrate 102 by metal organic chemical vapor deposition (MOCVD). Lower DBR 106 made of a multilayer stack with As layer, spacer layer made of undoped Al _0.4 Ga _0.6 As layer, barrier layer made of undoped Al _0.2 Ga _0.8 As layer, and quantum well layer made of undoped GaAs layer An active layer region 108 made of a laminate of the above, a p-type current confinement layer (AlAs layer) 110, a multi-layer laminate of a p-type Al _0.8 Ga _0.2 As layer and a p-type Al _0.1 Ga _0.9 As layer. The upper DBR 112 and the contact layer 114 made of a p-type GaAs layer are sequentially stacked.

The lower DBR 106 is formed of a multi-layer stack of an n-type Al _0.8 Ga _0.2 As layer and an n-type Al _0.1 Ga _0.9 As layer, and the thickness of each layer is λ / 4n _r (where λ is an oscillation wavelength, n _r corresponds to an optical refractive index in the medium), and layers having different mixed crystal ratios are alternately stacked, for example, 36.5 periods. The carrier concentration after doping silicon as an n-type impurity is, for example, 3 × 10 ¹⁸ cm ⁻³ . The active layer region 108 is formed by alternately stacking an 8 nm thick quantum well active layer made of an undoped GaAs layer and a 5 nm thick barrier layer made of an undoped Al _0.2 Ga _0.8 As layer (however, the outer layer is a barrier layer). ) The stack is arranged in the center of the spacer layer made of an undoped Al _0.4 Ga _0.6 As layer, and the thickness of the spacer layer including the quantum well active layer and the barrier layer is designed to be an integral multiple of λ / 4nr. Has been. Radiation light having a wavelength of 850 nm is obtained from the active layer region 108 having such a configuration.

The upper DBR 110 is a stacked layer composed of a plurality of semiconductor layers of a p-type Al _0.8 Ga _0.2 As layer and a p-type Al _0.1 Ga _0.9 As layer. The thickness of each layer is lambda / 4n _r, alternating layers having different mixed crystal ratios, for example are laminated in 22 cycles. The number of periods is the number obtained by adding the current confinement layer 110 provided in the lower layer and the contact layer 114 provided in the upper layer. The carrier concentration after doping carbon as a p-type impurity is, for example, 3 × 10 ¹⁸ cm ⁻³ .

  Next, SiN is formed on the entire surface of the substrate, and as shown in FIG. 7B, a mask pattern 230 for forming a post is formed using a known photolithography process.

  Next, as shown in FIG. 7C, by using the mask pattern 230 as a mask, the stacked semiconductor layers are anisotropically etched to form a ring-shaped groove 116 on the substrate, thereby forming a cylindrical shape. A pad forming region 118 separated from the post P by a groove 116 is formed. The depth of the groove 116 or the etching is until reaching a part of the lower DBR 106.

Next, as shown in FIG. 8D, the substrate is exposed to a steam atmosphere at, for example, 340 ° C. for a certain period of time to perform an oxidation treatment. Since the AlAs layer constituting the current confinement layer 110 has a significantly faster oxidation rate than the Al _0.8 Ga _0.2 As layer and Al _0.1 Ga _0.9 As layer that also constitute part of the current confinement layer 110, the post shape is reflected from the side surface of the post P. The oxidized region 110a is formed, and the non-oxidized region remaining without being oxidized becomes a current injection region or a conductive region.

  Next, as shown in FIG. 8E, after the mask pattern 230 is removed, SiN is formed on the entire surface of the substrate. Next, as shown in FIG. 8F, SiN is patterned by a photolithography process to form an interlayer insulating film 120. A contact hole 121 for exposing the contact layer 114 at the top of the post P is formed in the interlayer insulating film 120. Further, the interlayer insulating film 120 is patterned so as to have an end portion 120a, and the contact layer 114 at the outer edge 232 of the pad forming region 118 is exposed.

  Next, a resist pattern is formed using a photolithography process, and then Au / Ti is deposited, and the upper electrode 130, the electrode wiring 134, the electrode pad 136, and the second upper electrode 140 as shown in FIG. Form. An n-side electrode 104 made of Au or Ge is formed on the back surface of the substrate. Then, the substrate is diced along the outer edge 232 exposed by the interlayer insulating film 120, and the VCSEL chip 100 can be obtained.

  When the VCSEL of the second embodiment is formed, the mask pattern 230 is changed so that the outer peripheral groove is formed on the outer edge 232 of the pad forming region 118 simultaneously with the groove 116.

  FIG. 9 is a schematic cross-sectional view showing an example of a package (module) of a semiconductor laser device on which a chip of a VCSEL array is mounted. As shown in the figure, the package 300 fixes a chip 310 on which a VCSEL array is formed on a disk-shaped metal stem 330 via a die attach on the mounter 320. The conductive leads 340 and 342 are inserted into through holes (not shown) of the stem 330, and one lead 340 is electrically connected to the n-side lower electrode 104 formed on the back surface of the chip 310, The other lead 342 is electrically connected to a p-side upper electrode 130 formed on the upper surface of the chip 310, that is, an electrode pad 136 via a bonding wire or the like. Further, the second upper electrode 140 is connected to the mounter 320 by a bonding wire or the like, and has the same potential as the n-side electrode.

  A ball lens 360 is fixed in the exit window 352 of the cap 350. The optical axis of the ball lens 360 is positioned so as to substantially coincide with the center of the chip 310. Further, the distance between the chip 310 and the ball lens 360 is adjusted so that the ball lens 360 is included within the radiation angle θ of the laser beam from the chip 310. When a forward voltage is applied between the leads 340 and 342, laser light is emitted from the chip 310 and output to the outside through the ball lens 360. Note that a light receiving element for monitoring the light emission state of the VCSEL may be included in the cap.

  FIG. 10 is a diagram showing the configuration of still another package, and is preferably used in a spatial transmission system described later. In the package 302 shown in the drawing, a flat glass 362 is fixed in an emission window 352 at the center of the cap 350 instead of using the ball lens 360. The center of the flat glass 362 is positioned so as to substantially coincide with the center of the chip 310. The distance between the chip 310 and the flat glass 362 is adjusted so that the opening diameter of the flat glass 362 is not less than the radiation angle θ of the laser beam from the chip 310.

  FIG. 11 is a cross-sectional view showing a configuration when the package or module shown in FIG. 9 is applied to an optical transmitter. The optical transmission device 400 includes a cylindrical housing 410 fixed to the stem 330, a sleeve 420 integrally formed on an end surface of the housing 410, a ferrule 430 held in the opening 422 of the sleeve 420, a ferrule And an optical fiber 440 held by 430.

  An end of the housing 410 is fixed to a flange 332 formed in the circumferential direction of the stem 330. The ferrule 430 is accurately positioned in the opening 422 of the sleeve 420 and the optical axis of the optical fiber 440 is aligned with the optical axis of the ball lens 360. The core wire of the optical fiber 440 is held in the through hole 432 of the ferrule 430.

  The laser light emitted from the surface of the chip 310 is collected by the ball lens 360, and the collected light is incident on the core wire of the optical fiber 440 and transmitted. Although the ball lens 360 is used in the above example, other lenses such as a biconvex lens and a plano-convex lens can be used. Further, the optical transmission device 400 may include a drive circuit for applying an electrical signal to the leads 340 and 342. Furthermore, the optical transmission device 400 may include a reception function for receiving an optical signal via the optical fiber 440.

  FIG. 12 is a diagram showing a configuration when the package shown in FIG. 10 is used in a spatial transmission system. The spatial transmission system 500 includes a package 300, a condenser lens 510, a diffusion plate 520, and a reflection mirror 530. In the spatial transmission system 500, instead of using the ball lens 360 used in the package 300, a condensing lens 510 is used. The light condensed by the condenser lens 510 is reflected by the diffusion plate 520 through the opening 532 of the reflection mirror 530, and the reflected light is reflected toward the reflection mirror 530. The reflection mirror 530 reflects the reflected light in a predetermined direction and performs optical transmission. In the case of a spatial transmission light source, a multi-spot type VCSEL may be used to obtain a high output.

  FIG. 13 is a diagram illustrating a configuration example of an optical transmission system using a VCSEL as a light source. The optical transmission system 600 receives a light source 610 including a chip 310 on which a VCSEL is formed, an optical system 620 that collects laser light emitted from the light source 610, and the laser light output from the optical system 620. A light receiving unit 630 and a control unit 640 that controls driving of the light source 610 are included. The control unit 640 supplies a drive pulse signal for driving the VCSEL to the light source 610. Light emitted from the light source 610 is transmitted to the light receiving unit 630 via an optical system 620 by an optical fiber, a reflection mirror for spatial transmission, or the like. The light receiving unit 630 detects the received light with a photodetector or the like. The light receiving unit 630 can control the operation of the control unit 640 (for example, the start timing of optical transmission) by the control signal 650.

  Next, the configuration of an optical transmission device used in the optical transmission system will be described. FIG. 14 shows an external configuration of the optical transmission apparatus, and FIG. 15 schematically shows an internal configuration thereof. The optical transmission device 700 includes a case 710, an optical signal transmission / reception connector joint 720, a light emitting / receiving element 730, an electric signal cable joint 740, a power input unit 750, an LED 760 indicating that an operation is in progress, an LED 770 indicating occurrence of an abnormality, and a DVI. A connector 780 and a transmission circuit board / reception circuit board 790 are provided.

  A video transmission system using the optical transmission apparatus 700 is shown in FIGS. In these drawings, the video transmission system 800 uses the optical transmission device shown in FIG. 15 to transmit the video signal generated by the video signal generation device 810 to the image display device 820 such as a liquid crystal display. That is, the video transmission system 800 includes a video signal generation device 810, an image display device 820, a DVI electric cable 830, a transmission module 840, a reception module 850, a video signal transmission optical signal connector 860, an optical fiber 870, and a video signal transmission. An electric cable connector 880, a power adapter 890, and an electric cable 900 for DVI are included.

  In the video transmission system described above, electrical signals are transmitted between the video signal generation device 810 and the transmission module 840, and between the reception module 850 and the image display device 820 using the electrical cables 830 and 900. Transmission between these signals is an optical signal. It is also possible to do this. For example, a signal transmission cable including an electrical / optical conversion circuit and an optical / electrical conversion circuit in a connector may be used instead of the electrical cables 830 and 900.

  The surface emitting semiconductor laser according to the present invention can be used in the fields of optical information processing and optical high-speed data communication.

It is a figure which shows the wafer in which VCSEL was formed. It is a top view of VCSEL concerning the 1st example of the present invention. It is the sectional view on the AA line of FIG. It is a figure explaining the effect of the Example of this invention. It is a top view of VCSEL concerning the 2nd example of the present invention. It is a top view when the present invention is applied to a multi-spot type VCSEL. It is process sectional drawing explaining the manufacturing method of VCSEL which concerns on the 1st Example of this invention. It is process sectional drawing explaining the manufacturing method of VCSEL which concerns on the 1st Example of this invention. It is a schematic sectional drawing which shows the structure of the package which mounted the semiconductor chip in which VCSEL was formed. It is a schematic sectional drawing which shows the structure of another package. It is sectional drawing which shows the structure of the optical transmission device using the package shown in FIG. It is a figure which shows a structure when the package shown in FIG. 10 is used for a spatial transmission system. It is a block diagram which shows the structure of an optical transmission system. It is a figure which shows the external appearance structure of an optical transmission apparatus. FIG. 15A shows the internal structure when the top surface is cut off, and FIG. 15B shows the internal structure when the side surface is cut off. It is a figure which shows the video transmission system using the optical transmission apparatus of FIG. It is the figure which showed the video transmission system of FIG. 19 from the back side. It is sectional drawing which shows the conventional VCSEL.

Explanation of symbols

100: VCSEL 102: Substrate 104: n-side electrode 106: Lower DBR
108: active layer region 110: current confinement layer 112: upper DBR 114: contact layer 116: groove 118: pad forming region 120: interlayer insulating film 130: p-side electrode 132: opening 134: electrode wiring 136: electrode pad 140: Upper electrode 150: short-circuit means 200: outer peripheral groove 202: side surface 210, 220: second upper electrode 232: outer edge

Claims (19)

On the substrate, at least a first multilayer reflector of the first conductivity type, an active layer region, a second multilayer reflector of the second conductivity type constituting a resonator together with the first multilayer reflector, and a contact A surface emitting semiconductor laser in which a semiconductor layer including a layer is stacked, and a post-like light emitting portion that emits laser light and a pad forming region are separated by a groove formed in the semiconductor layer,
A first upper electrode that is electrically connected to the contact layer of the light emitting portion and has an opening that defines a laser light emission region;
A connection means formed on the pad formation region and electrically connecting the contact layer in the pad formation region and the first multilayer-film reflective mirror;
A surface emitting semiconductor laser comprising: 2. The surface emitting semiconductor laser according to claim 1, wherein the connection unit includes a second upper electrode formed along an outer edge of the pad formation region and electrically connected to a contact layer of the pad formation region . 3. The surface-emitting type semiconductor according to claim 1, wherein the first upper electrode extends to the pad formation region through the groove and is connected to an electrode pad formed on the pad formation region. laser. An insulating film is formed on the pad forming region so as to expose the contact layer on the outer edge of the pad forming region, and the second upper electrode is formed on the insulating film and the contact layer so as to cover the end portion of the insulating film. The surface emitting semiconductor laser according to claim 2 . An outer peripheral groove extending from the contact layer to the first multilayer-film reflective mirror is formed along an outer edge of the pad forming region, and at least a side surface of the contact layer exposed by the outer peripheral groove is covered with the second upper electrode. Item 5. The surface emitting semiconductor laser according to any one of Items 2 to 4. 6. The surface emitting semiconductor laser according to claim 5, wherein the second upper electrode is connected to a surface of the first multilayer reflective film exposed by the outer peripheral groove. The surface emitting semiconductor laser according to claim 5 or 6, wherein the outer peripheral groove is formed simultaneously with the groove surrounding the light emitting portion. 8. The surface emitting semiconductor laser according to claim 1, wherein the pad forming region is defined by a region for dicing the substrate. The substrate has a first conductivity type, a lower electrode is formed on the back surface of the substrate, and the connecting means electrically connects the second upper electrode and the lower electrode connected to the contact layer in the pad formation region. to, the surface emitting semiconductor laser according to 3 any one claims 1. The surface emitting semiconductor laser according to claim 9, wherein the second upper electrode is electrically connected to a conductive member to which a lower electrode of the substrate is connected. Contact layer is a p-type GaAs, the surface emitting semiconductor laser according to 10 any one claims 1. A module on which the surface-emitting type semiconductor device according to any one of claims 1 to 11 is mounted. An optical transmission device comprising: the module according to claim 12; and a transmission unit configured to transmit a laser beam emitted from the module via an optical medium. An optical space transmission apparatus comprising: the module according to claim 12; and a transmission unit that spatially transmits light emitted from the module. An optical transmission system comprising: the module according to claim 12; and a transmission unit that transmits a laser beam emitted from the module. An optical space transmission system comprising: the module according to claim 12; and a transmission unit that spatially transmits light emitted from the module. A method of manufacturing a surface-emitting type semiconductor laser in which a post-like light emitting portion that emits laser light and a pad forming region are separated by a groove,
On the substrate, at least a first multilayer reflector of the first conductivity type, an active layer region, a second multilayer reflector of the second conductivity type constituting a resonator together with the first multilayer reflector, and a contact Forming a semiconductor layer including a layer;
A groove is formed in the semiconductor layer to separate the light emitting portion and the pad forming region,
Forming an insulating film on the substrate including the light emitting portion and the pad formation region;
Patterning the insulating film to expose the contact layer of the light emitting part and to expose the contact layer at the outer edge of the pad formation region;
Forming a first upper electrode connected to the exposed contact layer of the light emitting portion and a second upper electrode connected to the contact layer on the outer edge of the pad forming region ;
Electrically connecting the second upper electrode and the first multilayer-film reflective mirror,
Manufacturing method of surface emitting semiconductor laser. A method of manufacturing a surface-emitting type semiconductor laser in which a post-like light emitting portion that emits laser light and a pad forming region are separated by a groove,
On the substrate, at least a first multilayer reflector of the first conductivity type, an active layer region, a second multilayer reflector of the second conductivity type constituting a resonator together with the first multilayer reflector, and a contact Forming a semiconductor layer including a layer;
In the semiconductor layer, a groove surrounding the light emitting portion and an outer peripheral groove along the outer edge of the pad formation region are formed.
Forming an insulating film on the substrate including the light emitting portion and the pad formation region;
Patterning the insulating film to expose the contact layer of the light emitting portion;
Forming a first upper electrode connected to the exposed contact layer of the light emitting portion and a second upper electrode covering the side surface of the semiconductor layer exposed by the outer peripheral groove ;
The second upper electrode includes a step of electrically connecting the contact layer in the pad formation region and the first multilayer-film reflective mirror,
Manufacturing method of surface emitting semiconductor laser. The manufacturing method according to claim 17 or 18 , further comprising a step of cutting the substrate along the outer circumferential groove.

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