JP2008027949A - Surface emission semiconductor laser - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a surface emission semiconductor laser in which lowering of current utilization efficiency is suppressed while enhancing breakdown voltage of ESD. <P>SOLUTION: A VCSEL 10 includes a structure 30 for emitting laser light and structures 40-1 through 40-8 for countermeasure against ESD on a substrate 12. The structure 30 is mesa type, a semiconductor layer is removed from the periphery thereof by a trench 32, and a p-type upper electrode layer 24a is formed at the top thereof. An opening 28a for the exit of laser is formed in the upper electrode layer 24a. The structures 40-1 through 40-8 are non-mesa type, trenches 42 are formed on the periphery thereof while spaced apart from each other, and its upper electrode layer 24b is connected with the upper electrode layer 24a by a wiring layer 50. Resistance of a current path from the upper electrode layer 24a of the structure 30 to a lower DBR 14 is smaller than the resistance of a current path from the upper electrode layer 24b of the structures 40-1 through 40-8 to the lower DBR 14. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a surface-emitting semiconductor laser (Vertical-Cavity Surface-Emitting Laser: hereinafter referred to as a VCSEL) used for a light source of an image forming apparatus such as a copying machine or a printer or an optical communication apparatus.

  A VCSEL is used as a light source for a copying machine, an optical communication device, or the like as a laser diode that emits light from the main surface side of a semiconductor substrate. As with other semiconductor devices, the VCSEL may be exposed to a high voltage such as static electricity during the manufacturing process or when mounted on a circuit board or the like. When an electrostatic discharge (hereinafter referred to as ESD) occurs inside the element, a large spike current flows instantaneously, causing destruction or deterioration of the element and causing a failure that prevents normal operation.

  In Patent Document 1, a first selective oxidation type mesa that emits laser light and a second selective oxidation type mesa that suppresses emission of laser light are formed on a substrate, and a second mesa is provided. Thus, a technique for increasing the area of the oxidized aperture and increasing the breakdown voltage against ESD is disclosed.

JP 2005-252240 A

  As disclosed in Patent Document 1, a second mesa is formed on the substrate separately from the first mesa that emits laser light, and the area of the conductive region by the first mesa and the second mesa is increased. By doing so, the breakdown voltage due to ESD can be improved. On the other hand, if the diameters of the conductive regions (current confinement layers) of the first mesa and the second mesa are equal, the current applied during normal driving About half of them are not used and are wasted, and there is a problem that current use efficiency is poor. In particular, when the diameter of the conductive region of the second mesa is larger than the conductive region of the first mesa, the utilization efficiency decreases even more.

  The present invention solves the above-described conventional problems, and an object of the present invention is to provide a surface emitting semiconductor laser that suppresses a decrease in current utilization efficiency while improving the breakdown voltage of ESD.

  A surface-emitting type semiconductor laser device according to the present invention includes a substrate, a first structure that emits laser light formed on the substrate, and a second structure that is formed on the substrate. The structure includes a first conductive type semiconductor multilayer film, an active layer, a first current confinement layer in which a first conductive region is formed, a second conductive type semiconductor multilayer film, and the second conductive type semiconductor. The first metal layer includes a first metal layer electrically connected to the multilayer film, the first metal layer has an opening through which laser light is emitted, and the second structure has a first conductivity type. A semiconductor multilayer film, an active layer, a second current confinement layer in which a second conductive region is formed, a second conductivity type semiconductor multilayer film, and a second conductive type electrically connected to the second conductivity type semiconductor multilayer film A first current path from the first metal layer in the first structure to the semiconductor multilayer film of the first conductivity type. Is less than the resistance of the second current path from the second metal layer in the second structure to the semiconductor multilayer film of the first conductivity type, and the first metal layer and the second metal layer Are electrically connected.

  Preferably, the second structure includes a plurality of structures, and each of the plurality of structures has a second current confinement in which a first conductive type semiconductor multilayer film, an active layer, and a second conductive region are formed. A second conductive type semiconductor multilayer film, and a second metal layer electrically connected to the second conductive type semiconductor multilayer film.

  Preferably, the resistance of the first conductive region of the first current confinement layer of the first structure is smaller than the resistance of the second conductive region of the second current confinement layer, and the first of the first structure The area of the conductive region is larger than the area of the second conductive region of the second structure.

  The second current path of the second structure can include a high resistance region between the second metal layer and the second conductive semiconductor multilayer film, and the high resistance region is formed by the first metal layer. This is a high resistance film whose concentration is lower than the impurity concentration of the second conductive type semiconductor multilayer film to be connected, or a region formed by implanting ions such as protons into the two conductive type semiconductor multilayer film. The first metal layer may be ohmically connected to the second conductivity type semiconductor multilayer film, and the second metal layer may be Schottky connected to the second conductivity type semiconductor multilayer film.

  Furthermore, the first current path of the first structure is shorter than the second current path of the second structure. Preferably, the substrate is a semiconductor substrate of a first conductivity type, and the first current path of the first structure includes the first metal layer to the back electrode formed on the back surface of the semiconductor substrate, The second current path of the second structure includes from the second metal layer to the intracavity electrode electrically connected to the first conductivity type semiconductor multilayer film.

  Preferably, the resistance of the first current path of the first structure and the second current path of the second structure are set such that the first structure is laser-oscillated and the second structure is not laser-oscillated. Resistance is determined. Preferably, the module including the surface-emitting type semiconductor laser device includes a driving circuit that supplies a driving current to the surface-emitting type semiconductor laser device, and the driving circuit is configured such that the first structural body oscillates and the second structural body. The drive current is supplied within a range in which no laser oscillation occurs.

  According to the present invention, the first structure and the second structure that emit laser light are formed on the substrate, and the resistance of the current path in the second structure is the resistance of the current path in the first structure. The ratio of current supplied to the second structure can be reduced during normal laser driving, in other words, the ratio of current supplied to the first structure can be reduced. As a result, it is possible to suppress a decrease in drive current utilization efficiency. In addition, when a high current such as ESD is applied, the ESD withstand voltage can be improved by the area of the energized region that is the sum of the first and second structures. Furthermore, by providing a plurality of second structures having a large resistance in the current path, the threshold current for laser oscillation of the first structure can be reduced as compared with the conventional structure. Laser oscillation in the structure 1 is facilitated, and this leads to suppression of a decrease in drive current utilization efficiency.

  The best mode for carrying out the present invention will be described below in detail with reference to the drawings.

  FIG. 1A is a schematic plan view of a VCSEL according to the first embodiment of the present invention, and FIG. 1B is an enlarged view of a section taken along the line AA. The VCSEL 10 of this embodiment includes an n-type GaAs substrate 12, a lower DBR (Distributed Bragg Reflector) 14 in which n-type AlGaAs semiconductor films are laminated, an active layer 16, and a p-type AlAs layer. Current confinement layer 18, upper DBR 20 in which p-type AlGaAs-based semiconductor films are laminated, insulating film 22, p-side upper electrode layer 24 patterned on insulating film 22, and n-side lower electrode formed on the back surface of the substrate A layer 26 is included.

  On the substrate, a mesa type structure 30 that emits laser light and eight non-mesa type structures 40-1, 40-2,..., 40-8 that spread radially around the structure 30 are formed. ing. The structure 30 has a cylindrical post or mesa structure, and its periphery is surrounded by a ring-shaped or annular groove 32 (filled black in the figure for easy understanding). The groove 32 is preferably formed by etching a semiconductor layer stacked to a depth from the upper DBR 20 to a part of the lower DBR 14. Here, the structure 30 from which the entire periphery is removed by one continuous groove 32 is called a mesa type.

  On the other hand, the structures 40-1 to 40-8 are partially or intermittently formed with a plurality of grooves or holes around the structures 40-1 to 40-8. Surrounded by two grooves 42 (filled black for ease of understanding in the figure). If the four grooves 42 are virtually extended and connected, it becomes almost circular. Here, a structure surrounded by such intermittent or partial grooves is called a non-mesa type. The groove 42 is preferably etched at the same time as the groove 32 and has a depth from the upper DBR 20 to a part of the lower DBR 14.

  A circular upper electrode layer 24a is formed on the top of the mesa of the structure 30, and a circular opening 28a serving as a laser emission window is formed in the center of the upper electrode layer 24a. The periphery of the structure 30 is covered with an insulating film 22, and a contact hole is formed in the insulating film 22 at the top of the structure 30. The upper electrode layer 24a is ohmically connected to the p-type GaAs contact layer which is the uppermost layer of the upper DBR 20 through a contact hole.

  The current confinement layer 18 of the structure 30 is oxidized while being exposed in the groove 32, and at this time, an annular oxidized region 18 a (hatching in the figure) is formed on the outer edge of the current confinement layer 18. The oxidized region 18a is a high resistance region, and current is confined in a circular conductive region surrounded by the oxidized region 18a. Further, the laser beam oscillated in the conductive region is confined by the refractive index of the oxidized region 18a.

  The structures 40-1 to 40-8 include the same semiconductor layer as that of the structure 30. A circular upper electrode layer 24b is formed at the top of the structures 40-1 to 40-8, and a circular opening 28b is formed at the center of the upper electrode layer 24b. The upper electrode layer 24 b is ohmically connected to the uppermost p-type GaAs contact layer of the upper DBR 20 through a contact hole formed in the insulating film 22. The upper electrode layer 24b of each structure is connected to the upper electrode layer 24a of the structure 30 by the wiring layer 50, and the upper electrode layer 24a is formed on the substrate surface by the wiring layer 52 via the insulating film 22. It is connected to a circular electrode pad 54. The electrode pad 54 is for injecting a drive current into the VCSEL, and a bonding wire (not shown) is connected to the electrode pad 54.

  In the current confinement layer 18 of the structures 40-1 to 40-8, an oxidized region 18b (hatched in the figure) oxidized when exposed to the groove 42 is formed. Although one structure is surrounded by four grooves 42, when oxidation proceeds from the four grooves 42, the four oxidized regions 18 b overlap, and the current confinement layer 18 is surrounded by the four oxidized regions 18 b. In addition, a substantially circular conductive region is formed.

  Next, preferred design values of the structure 30 and the structures 40-1 to 40-8 are shown in FIG. When eight structures 40-1 to 40-8 are formed around the structure 30, the diameter of the conductive region of the current confinement layer 18 of the structure 30 is about 15 μm, as shown in FIG. In addition, the diameter of the conductive region of the current confinement layer 18 of each of the structures 40-1 to 40-8 is about 5 μm. The resistance of the current path from the upper electrode layer 24a to the lower electrode layer 26 in the structure 30 is about 40Ω, and the current path from the upper electrode layer 24b of each of the structures 40-1 to 40-8 to the lower electrode layer 26. The resistance is about 320Ω. Since the structure 30 and each of the structures 40-1 to 40-8 have substantially the same configuration except for the diameter of the conductive region of the current confinement layer 18, the difference in resistance between the current paths is substantially the same. This reflects the difference in the area of the conductive regions.

  When a drive current of 6.4 mA is applied to the VCSEL 10, the current flowing through the structure 30 is 3.2 mA due to the difference in resistance between the two, and the current flowing through each of the structures 40-1 to 40-8 is 0. 4 mA.

  Since the resistance value of the VCSEL rapidly increases in a low current region, if there are structures 40-1 to 40-8 having a small conductive area, a current flowing in each conductive region of the structure decreases (resistance) Is also high). Further, as the current value to the VCSEL increases, the resistance decreases, so that the current to the conductive region to the structure 30 increases. Therefore, compared with the case where two structures of the same or large size are placed as in the conventional example, the decrease in current use efficiency can be reduced.

  FIG. 2B shows the diameter, resistance, and energization current of the conductive region when the number of structures is increased to 14. When a driving current of 6.4 mA is applied, each small structure has a current of 0.14 mA (2.8 mA in total), and a current of 4.4 mA flows through the structure 30. By increasing the number of small-sized structures, the power consumption of these structures is limited to about 30% of the whole, and the current utilization efficiency of the structure 30 for laser emission is made about 70% of the whole. Can do.

  FIG. 3 is a diagram comparing the output characteristics of the VCSELs of the conventional example and this example. The vertical axis shows the optical output [mW], the horizontal axis shows the current [mA], and in order from the top, VCSEL without ESD countermeasures (no structure is formed in addition to the structure for laser emission), this implementation 14 shows a VCSEL in which 14 structures according to an example are formed, and a VCSEL in a conventional example (a VCSEL in which one structure having the same size as the structure for laser emission is formed). Although this graph is not experimental data, it is theoretically calculated from the IL characteristics of the VCSEL. The VCSEL of the conventional example has a light output reduced to about half compared to a VCSEL without ESD countermeasures. In other words, the current utilization efficiency is only half. In contrast, the VCSEL of this example has a higher light output than the VCSEL of the conventional example, and therefore, it can be seen that the current utilization efficiency is higher than that of the conventional example. Furthermore, since the VCSEL of this embodiment has a lower threshold current than the VCSEL of the conventional example, laser oscillation is facilitated at a low current, and as a result, a decrease in current utilization efficiency is suppressed.

  As described above, the diameter of the conductive region of the current confinement layer of the ESD countermeasure structure, for example, 40-1 to 40-8, is preferably smaller than the diameter of the conductive region of the structure for laser emission. If the diameter is made too small, the energization area of the drive current of the entire VCSEL becomes small, and the ESD withstand voltage cannot be sufficiently improved. On the other hand, when the diameter of the conductive region of the ESD countermeasure structure increases, a constant current flows through the ESD countermeasure structure during normal driving, and laser oscillation occurs there. Therefore, it is desirable that the diameter of the conductive region of the ESD countermeasure structure is a diameter that prevents the ESD countermeasure structure from lasing during normal driving, that is, a resistance. As a result, laser light is not emitted from the opening 28b of the upper electrode layer 24b of the ESD countermeasure structure. Of course, the structure for ESD countermeasures does not need to emit laser light in the first place, so that no opening is formed in the upper electrode layer 24b of the structures 40-1 to 40-8 as shown in FIG. May be.

  In the above embodiment, the area of the conductive regions of the structures 40-1 to 40-8 is smaller than that of the structure 30 and the resistance of the current paths of the structures 40-1 to 40-8 is increased. Besides increasing the area, the resistance of the current paths of the structures 40-1 to 40-8 can be increased. In the following description, for convenience, a structure that emits laser light is denoted by reference numeral 60, an ESD countermeasure structure is denoted by reference numeral 70, and the structures of the structures 60 and 70 are the same as the structure of FIG. .

  As shown in FIG. 5A, protons are ion-implanted into a region where the upper electrode layer 24 b of the ESD countermeasure structure 70 is connected to the upper DBR 20, thereby forming the high resistance region 100 in the upper DBR 20. On the other hand, the upper electrode layer 24 a of the laser emitting structure 60 is ohmically connected to the uppermost p-type GaAs layer 20 a of the p-type upper DBR 20. Thereby, the resistance of the current path from the upper metal layer 24 b to the upper DBR 20 in the structure 70 can be made higher than the resistance of the current path in the structure 60.

  As shown in FIG. 5B, the upper electrode layer 24b of the structure 70 is directly connected to the p-type upper DBR 20. That is, the p-type GaAs contact layer 20a, which is the uppermost layer of the upper DBR 20, is removed from the region to which the upper electrode layer 24b is connected to expose the p-type AlGaAs layer. The p-type AlGaAs layer has an impurity concentration lower than that of the contact layer 20a, and becomes a Schottky connection when the upper electrode layer 24b is connected. On the other hand, the upper electrode layer 24a of the structure 60 is ohmically connected to the GaAs contact layer 20a that is the uppermost layer of the upper DBR 20. Thereby, the resistance of the current path from the upper metal layer 24 b to the upper DBR 20 in the structure 70 can be made higher than the resistance of the current path in the structure 60.

  As shown in FIG. 5C, the upper electrode layer 24b of the structure 70 is connected to the p-type GaAs contact layer 20a through the high resistance film 110. For example, the high resistance film 110 having an impurity concentration lower than that of the contact layer 20a is formed in a region to which the upper metal layer 24b is connected. On the other hand, the upper electrode layer 24 a of the structure 60 is ohmically connected to the p-type GaAs contact layer 20 a that is the uppermost layer of the upper DBR 20. Thereby, the resistance of the current path from the upper metal layer 24 b to the upper DBR 20 in the structure 70 can be made higher than the resistance of the current path in the structure 60.

  Further, as shown in FIG. 6, a region where a part of the n-type lower DBR 14 is exposed is formed adjacent to the structure 70, and is connected to the lower DBR 14 through the contact hole of the insulating film 22 there. The electrode layer 120 is formed. The n-side electrode layer 120 is an electrode having a so-called intracavity structure. The current injected from the p-side upper electrode layer 24b of the structure 70 communicates with the n-side electrode layer 120 through the upper DBR 20, the current confinement layer 18, the active layer 16, and the lower DBR 14. On the other hand, the current injected from the p-side upper electrode layer 24a of the structure 60 is transferred to the n-side lower electrode layer 26 via the upper DBR 20, the current confinement layer 18, the active layer 16, the lower DBR 14, and the n-type GaAs substrate 12. It leads. By making the current path in the structure 70 longer than the current path in the structure 60, the resistance of the current path in the structure 70 can be increased.

  When the resistance of the ESD countermeasure structure is made higher than the resistance of the laser emitting structure using the method shown in FIGS. 5 and 6, the conductive region of the current confinement layer of the ESD countermeasure structure is not necessarily limited. The diameter or area need not be smaller than the diameter or area of the conductive region of the structure for laser emission.

  Next, a layout example of the laser emitting structure and the ESD countermeasure structure formed on the VCSEL will be described. In the layout shown in FIG. 7, the structure 60 is a mesa type and has a cylindrical shape or a post structure in which the entire periphery is removed by the groove 130. On the other hand, the structure 70 is a non-mesa type, and the periphery thereof is not completely removed by the groove 130, and the semiconductor layer partially remains.

  The groove 130 is formed to a depth from the upper DBR 20 to a portion where the lower DBR 14 is exposed, covers the entire periphery of the structure 60, and a bridge portion where the semiconductor layer remains on the left side of the structure 70 with a certain width. The structure 70 is covered except for 132. The upper electrode layer 24a of the structure 60 is an annular body in which an opening 28a for emitting laser light is formed in the center, and is formed via a contact hole formed in the insulating film 22 at the top of the structure 60. The upper DBR 20 is ohmically connected to the uppermost GaAs contact layer.

  The upper electrode layer 24a of the structure 60 is connected to the upper electrode layer 24b of the structure 70 by a wiring layer 50 extending on the side wall, the surface of the groove 130, and the side surface of the structure 70. The upper electrode layer 24b of the structure 70 is ohmically connected to the contact layer of the upper DBR 20 through a contact hole formed in the insulating film 22, but an opening for laser emission is not formed at the center thereof. The upper electrode layer 24 b is connected to the wiring layer 52 extending on the bridge portion 132 via the insulating film 22, and the wiring layer 52 is connected to the electrode pad 54. Here, the size of the structure 70 is larger than that of the structure 60, that is, the area of the conductive region of the current confinement layer 18 is increased. In this case, as illustrated in FIG. 5 and FIG. The resistance of the current path in the structure 70 is made larger than the resistance of the structure 60 by the method.

  In the layout shown in FIG. 8, both the structure 60 and the structure 70 are non-mesa types. Around the structure 60, four substantially arc-shaped grooves 140-1, 140-2, 140-3, 140-4 are formed. Between the groove 140-3 and the groove 140-4, an elongated first bridge portion 142 that remains without etching the semiconductor layer is formed, and the first bridge portion 142 extends to the structure 70.

  Although the periphery of the structure 70 is removed by the groove 150, the second bridge portion 152 remains in addition to the first bridge portion 142. The upper electrode layer 24 a of the structure body 60 is connected to the wiring layer 50 extending on the first bridging portion 142 via the insulating film 22, and the wiring layer 50 passes through the groove 150 and passes through the upper portion of the structure body 70. Connected to the electrode layer 24b. The upper electrode layer 24 b is connected to the wiring layer 52 extending on the second bridging portion 152 through the insulating film 22, and the wiring layer 52 is connected to the electrode pad 54.

  Still another layout example is shown in FIG. In FIG. 9A, a mesa type structure 60 and a non-mesa type structure 70 are formed. A groove 160 is formed around the structure 60, but a C groove 162 is formed around the structure 70. FIG. 9B shows a non-mesa type structure 60 and a non-mesa type structure 70. Two concentric C grooves 170 and 172 (indicated by hatching in the figure) are formed on the substrate, the outer C groove 172 surrounds the structure 70, and the inner C groove 170 surrounds the structure 60. The structure 70 has a ring shape, and a C-type p-side upper electrode layer 24b is formed on the top.

  FIG. 9C is a modification of the layout of FIG. 9B, and a groove 174 (indicated by hatching in the drawing) that covers the structure 60 has an arc shape. The upper electrode layer 24 a of the structure 60 and the upper electrode layer 24 b of the structure 70 are integrated to form a fan shape, and are connected to the electrode pad 54 via the wiring layer 52.

  6 and 7, the centers of the structure 60, the structure 7, and the electrode pad 54 are arranged almost linearly. However, in the layout of FIG. 9, the structure 60 and the structure 70 are arranged close to each other. Therefore, the chip size can be reduced.

Next, a specific configuration example of the VCSEL illustrated in FIG. 1 will be described. An n-type GaAs buffer layer having a Si carrier concentration of 1 × 10 ¹⁸ cm ⁻³ and a film thickness of about 0.2 μm, and a carrier concentration of 1 × 10 ¹⁸ are sequentially formed on the n-type GaAs substrate 12 by metal organic chemical vapor deposition (MOCVD). cm ⁻³ , total film thickness of about 4 μm, lower n-type DBR 14 having a period of 40.5 made of Al _0.9 Ga _0.1 As and Al _0.12 Ga _0.88 As each having a thickness of ¼ of the wavelength in the medium, undoped lower Al _0.6 Ga _0.4 As spacer layer, undoped quantum well active layer (consisting of 3 layers of 70 nm GaAs quantum well layer and 4 layers of 50 nm Al _0.3 Ga _0.7 As barrier layer) and undoped upper Al _0.6 Ga _0.4 As An active layer 16 having a film thickness composed of a spacer layer and having an in-medium wavelength, a carbon carrier concentration of 1 × 10 ¹⁸ cm ⁻³ , a total film thickness of about 3 μm, and each film thickness having an in-medium wavelength of 1 / 4 and Sequentially stacked Al _0.9 Ga _0.1 As and Al _0.12 Ga _0.88 30 cycles of upper p-type DBR20 of As that. A p-type AlAs layer functioning as the current confinement layer 18 is included in the lowermost layer of the upper DBR 20. The uppermost layer of the upper DBR 20 includes a p-type GaAs contact layer having a carrier concentration of 1 × 10 ¹⁹ cm ⁻³ and a thickness of 20 nm.

Further, in order to lower the electrical resistance of the DBR, a region having a film thickness of about 20 nm in which the Al composition is gradually changed from 90% to 30% is provided at the interface between Al _0.9 Ga _0.1 As and Al _0.12 Ga _0.88 As. It is also possible.

  The insulating film 22 is, for example, SiON, and the p-side upper electrode layers 24a, 24b are, for example, a laminate of gold (Au) and titanium (Ti). The n-side lower electrode layer 26 is formed by stacking, for example, gold and Ge (germanium).

  After the grooves 32 and 42 are formed on the substrate and the side surfaces of the structure 30 and the structures 40-1 to 40-8 are exposed by the grooves 32 and 42, the current confinement layer 18 is oxidized. For example, the substrate is exposed to a water vapor atmosphere at 340 ° C. for a certain period of time, and the p-type AlAs layer, which is the current confinement layer 18, is oxidized inward by a certain distance from the exposed side surface. Thus, oxidized regions 18a and 18b are formed on the outer edge of the AlAs layer, and the unoxidized conductive regions are surrounded by the oxidized regions 18a and 18b. The unoxidized region becomes a region for confining current and light.

  In the above embodiment, a single spot type VCSEL in which one structure for laser emission is formed on the substrate is shown. However, the present invention is not limited to this, and a plurality of structures for laser emission are formed on the substrate. The present invention can also be applied to a multi-spot type. Further, in the above embodiment, a VCSEL using an AlGaAs-based semiconductor layer is shown, but a VCSEL using a group III-V compound semiconductor layer other than this may be used.

  FIG. 10 is a schematic cross-sectional view showing an example of a package (module) of a semiconductor laser device on which a VCSEL chip is mounted. In the package 300, a chip 310 on which a VCSEL array is formed is fixed on a submount 320 on a metal stem 330. The conductive leads 340 and 342 are inserted into through holes (not shown) of the stem 330, and one lead 340 is electrically connected to the n-side lower electrode 26 formed on the back surface of the chip 310, The other lead 342 is electrically connected to an electrode pad 54 (see FIG. 1) formed on the upper surface of the chip 310 via a bonding wire or the like.

  A ball lens 360 is fixed in the exit window 352 of the cap 350. The optical axis of the ball lens 360 is positioned so as to substantially coincide with the center of the opening 28a. Further, the distance between the chip 310 and the ball lens 360 is adjusted so that the ball lens 360 is included within the radiation angle θ of the laser beam from the chip 310. When a forward voltage is applied between the leads 340 and 342, laser light is emitted from the chip 310 and output to the outside through the ball lens 360. Note that a light receiving element for monitoring the light emission state of the VCSEL may be included in the cap.

  FIG. 11 is a diagram showing the configuration of still another package, and is preferably used in a spatial transmission system described later. In the package 302 shown in the drawing, a flat glass 362 is fixed in an emission window 352 at the center of the cap 350 instead of using the ball lens 360. The center of the flat glass 362 is positioned so as to coincide with the optical axis of the chip 310. The distance between the chip 310 and the flat glass 362 is adjusted so that the opening diameter of the flat glass 362 is not less than the radiation angle θ of the laser beam from the chip 310.

  FIG. 12 is a cross-sectional view showing a configuration when the package or module shown in FIG. 11 is applied to an optical transmitter. The optical transmission device 400 includes a cylindrical housing 410 fixed to the stem 330, a sleeve 420 integrally formed on an end surface of the housing 410, a ferrule 430 held in the opening 422 of the sleeve 420, a ferrule And an optical fiber 440 held by 430.

  An end of the housing 410 is fixed to a flange 332 formed in the circumferential direction of the stem 330. The ferrule 430 is accurately positioned in the opening 422 of the sleeve 420 and the optical axis of the optical fiber 440 is aligned with the optical axis of the ball lens 360. The core wire of the optical fiber 440 is held in the through hole 432 of the ferrule 430.

  The laser light emitted from the surface of the chip 310 is collected by the ball lens 360, and the collected light is incident on the core wire of the optical fiber 440 and transmitted. Although the ball lens 360 is used in the above example, other lenses such as a biconvex lens and a plano-convex lens can be used. Further, the optical transmission device 400 may include a drive circuit for applying an electrical signal to the leads 340 and 342. Furthermore, the optical transmission device 400 may include a reception function for receiving an optical signal via the optical fiber 440.

  FIG. 13 is a diagram showing a configuration when the package shown in FIG. 11 is used in a spatial transmission system. The spatial transmission system 500 includes a package 300, a condenser lens 510, a diffusion plate 520, and a reflection mirror 530. In the spatial transmission system 500, instead of using the ball lens 360 used in the package 300, a condensing lens 510 is used. The light condensed by the condenser lens 510 is reflected by the diffusion plate 520 through the opening 532 of the reflection mirror 530, and the reflected light is reflected toward the reflection mirror 530. The reflection mirror 530 reflects the reflected light in a predetermined direction and performs optical transmission. In the case of a spatial transmission light source, a multi-spot type VCSEL may be used to obtain a high output.

  FIG. 14 is a diagram illustrating a configuration example of an optical transmission system using a VCSEL as a light source. The optical transmission system 600 receives a light source 610 including a chip 310 on which a VCSEL is formed, an optical system 620 that collects laser light emitted from the light source 610, and the laser light output from the optical system 620. A light receiving unit 630 and a control unit 640 that controls driving of the light source 610 are included. The control unit 640 supplies a drive pulse signal for driving the VCSEL to the light source 610. Light emitted from the light source 610 is transmitted to the light receiving unit 630 via an optical system 620 by an optical fiber, a reflection mirror for spatial transmission, or the like. The light receiving unit 630 detects the received light with a photodetector or the like. The light receiving unit 630 can control the operation of the control unit 640 (for example, the start timing of optical transmission) by the control signal 650.

  Next, the configuration of an optical transmission device used in the optical transmission system will be described. FIG. 15 shows an external configuration of the optical transmission apparatus. The optical transmission device 700 includes a case 710, an optical signal transmission / reception connector joint 720, a light emitting / receiving element 730, an electric signal cable joint 740, a power input unit 750, an LED 760 indicating that the operation is in progress, an LED 770 indicating occurrence of an abnormality, A connector 780 and a transmission circuit board / reception circuit board 790 are provided.

  A video transmission system using the optical transmission device 700 is shown in FIG. The video transmission system 800 includes a video signal generation device 810, an image display device 820, a DVI electric cable 830, a transmission module 840, a reception module 850, a video signal transmission optical signal connector 860, an optical fiber 870, and a control signal cable connector 880. , A power adapter 890, and an electric cable 900 for DVI. In order to transmit the video signal generated by the video signal generator 810 to an image display device 820 such as a liquid crystal display, the optical transmission device shown in FIG. 15 is used.

  The above-described embodiments are illustrative, and the scope of the present invention should not be construed as being limited thereto, and can be realized by other methods within the scope satisfying the constituent requirements of the present invention. Needless to say.

  The surface-emitting type semiconductor laser device according to the present invention is widely used as a light source for an image forming apparatus such as a printer or a light source for communication.

FIG. 1A is a schematic plan view of a VCSEL according to a first embodiment of the present invention, and FIG. 1B is an enlarged view of a cross section taken along line AA. It is a figure which shows the preferable design value of the structure of VCSEL. It is a figure which compares the output characteristic of VCSEL of a present Example, and conventional VCSEL. It is a modification of VCSEL shown in FIG. It is a figure explaining the example which makes resistance of the current path of the structure for ESD countermeasures high, and shows the sectional view of the structure for laser beam emission and the structure for ESD countermeasures formed on the VCSEL. It is a figure explaining the other example which makes resistance of the current path of the structure for ESD countermeasures high. FIG. 7A is a schematic plan view of a VCSEL, and FIG. 7B is a cross-sectional view taken along the line BB of FIG. FIG. 8A is a schematic plan view of a VCSEL, and FIG. 8B is a cross-sectional view taken along the line BB of FIG. FIGS. 9A to 9C are schematic plan views illustrating other layout examples of the VCSEL according to the present embodiment. It is a schematic sectional drawing which shows the structure of the package which mounted the semiconductor chip in which VCSEL was formed. It is a schematic sectional drawing which shows the structure of another package. It is a schematic sectional drawing which shows the structure of the optical transmitter using the package shown in FIG. It is a figure which shows a structure when the package shown in FIG. 11 is used for a spatial transmission system. It is a block diagram which shows the structure of an optical transmission system. It is a figure which shows the external appearance structure of an optical transmission apparatus. It is a figure which shows the video transmission system using the optical transmission apparatus of FIG.

Explanation of symbols

10: VCSEL 12: Substrate 14: Lower DBR 16: Active layer 18: Current confinement layer 18a, 18b: Oxidized region 20: Upper DBR 22: Insulating film 24a, 24b: Upper electrode layer 26: Lower electrode layer 28a, 28b: Opening Portion 30: Structure 32: Groove 40-1 to 40-8: Structure 42: Groove 50: Wiring layer 52: Wiring layer 54: Electrode pad 60: Laser light emitting structure 70: ESD countermeasure structure 100: High resistance region 110: High resistance film 120: N-side electrode layer 130: Groove 132: Bridge portion 140-1 to 140-4: Groove 142: First bridge portion 150: Groove 152: Second bridge portion 160: Groove 170, 172: C groove 174: Arc-shaped groove

Claims (22)

A substrate,
A first structure that emits laser light formed on a substrate;
A second structure formed on the substrate,
The first structure includes a first conductive type semiconductor multilayer film, an active layer, a first current confinement layer in which a first conductive region is formed, a second conductive type semiconductor multilayer film, and the second conductive type Including a first metal layer electrically connected to the semiconductor multilayer film, wherein the first metal layer has an opening through which laser light is emitted,
The second structure includes a first conductive type semiconductor multilayer film, an active layer, a second current confinement layer in which a second conductive region is formed, a second conductive type semiconductor multilayer film, and the second conductive type A second metal layer electrically connected to the semiconductor multilayer film of
The resistance of the first current path from the first metal layer in the first structure to the first conductivity type semiconductor multilayer film is such that the second metal layer in the second structure has a resistance to the first conductivity type semiconductor multilayer. A surface-emitting type semiconductor laser device that is smaller than the resistance of a second current path that reaches the film and that is electrically connected to the first metal layer and the second metal layer. The second structure includes a plurality of structures, each of the plurality of structures being a first conductive type semiconductor multilayer film, an active layer, a second current confinement layer in which a second conductive region is formed, 2. The surface-emitting type semiconductor laser device according to claim 1, comprising a two-conductivity-type semiconductor multilayer film and a second metal layer electrically connected to the second-conductivity-type semiconductor multilayer film. 3. The surface-emitting type according to claim 1, wherein the resistance of the first conductive region of the first current confinement layer of the first structure is smaller than the resistance of the second conductive region of the second current confinement layer. Semiconductor laser device. 4. The surface-emitting type semiconductor laser device according to claim 1, wherein an area of the first conductive region of the first structure is larger than an area of the second conductive region of the second structure. 5. . The surface emitting semiconductor laser device according to claim 1, wherein the second current path of the second structure includes a high resistance region between the second metal layer and the second conductive semiconductor multilayer film. 6. The surface emitting semiconductor laser device according to claim 5, wherein the high resistance region is a high resistance film having a concentration lower than an impurity concentration of a second conductive type semiconductor multilayer film to which the first metal layer is connected. 6. The surface emitting semiconductor laser device according to claim 5, wherein the high resistance region is a region ion-implanted into a second conductive type semiconductor multilayer film. 2. The surface-emitting type semiconductor according to claim 1, wherein the first metal layer is ohmically connected to the second conductive type semiconductor multilayer film, and the second metal layer is Schottky connected to the second conductive type semiconductor multilayer film. Laser device. The surface emitting semiconductor laser device according to claim 1, wherein the first current path of the first structure is shorter than the second current path of the second structure. The substrate is a semiconductor substrate of a first conductivity type, and the first current path of the first structure includes a first metal layer to a back electrode formed on the back surface of the semiconductor substrate, 10. The surface emitting semiconductor laser device according to claim 9, wherein the second current path of the structure includes from the second metal layer to an electrode electrically connected to the first conductive type semiconductor multilayer film. When a constant drive current is applied to the first and second metal layers, the first current of the first structure is such that the first structure oscillates and the second structure does not oscillate. 11. The surface emitting semiconductor laser device according to claim 1, wherein the resistance of the path and the resistance of the second current path of the second structure are determined. 12. The surface emitting semiconductor laser device according to claim 1, wherein the first and second conductive regions of the first and second current confinement layers are surrounded by an oxidized region. 13. A first groove having a depth from the second conductive type semiconductor multilayer film to the first conductive type semiconductor multilayer film is formed around the first structure. A surface-emitting type semiconductor laser device described in 1. The second groove having a depth from the second conductive type semiconductor multilayer film to the first conductive type semiconductor multilayer film is formed around the second structure. A surface-emitting type semiconductor laser device described in 1. 15. The surface emitting semiconductor laser device according to claim 13, wherein the first or second groove includes a plurality of intermittently formed grooves. 16. The surface-emitting type semiconductor laser device according to claim 1, wherein the driving current is applied to the first and second metal layers so that the laser beam is emitted only from the opening of the first structure. A method for driving a surface-emitting type semiconductor laser, in which the above range is set. A module in which the surface emitting semiconductor laser device according to claim 1 and an optical member are mounted. The module further includes a driving circuit for supplying a driving current to the surface emitting semiconductor laser device, and the driving circuit has a driving current within a range in which the first structure oscillates and the second structure does not oscillate. The module of claim 17, wherein An optical transmission device comprising: the module according to claim 17 or 18; and a transmission unit configured to transmit a laser beam emitted from the module via an optical medium. An optical space transmission device comprising: the module according to claim 17 or 18; and transmission means for spatially transmitting light emitted from the module. An optical transmission system comprising: the module according to claim 17 or 18; and a transmission unit configured to transmit a laser beam emitted from the module. An optical space transmission system comprising: the module according to claim 17 or 18; and a transmission unit that spatially transmits light emitted from the module.

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