JP2007329193A - Surface-emission semiconductor laser device, and its fabrication process - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a surface-emission semiconductor laser device in which a substrate or a wafer under production can be protected against a large current such as ESD. <P>SOLUTION: A semiconductor layer in a VCSEL including an n-type lower DBR 104, an active layer 106, a p-type upper DBR 108, and a p-type contact layer 110 is laminated on a GaAs substrate 100; and a post structure P emitting laser light is separated from a pad forming region Q by a trench 114 formed in the semiconductor layer. A contact electrode 120 is formed on the contact layer 110 of post structure P, and a pad electrode 130 connected electrically with the contact electrode 120 is formed in the pad forming region Q. Furthermore, a conduction part R for ESD is formed in the pad forming region Q. The conductor R has a metal layer 140 formed on the contact layer 110, and the metal layer 140 has an exposed area larger than that of the contact electrode. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a surface-emitting type semiconductor laser (Vertical-Cavity Surface-Emitting Laser diode, hereinafter referred to as VCSEL) used as a light source for optical information processing or high-speed optical communication, and in particular, VCSEL is electrostatic discharge (hereinafter referred to as ESD). And so on).

  In the technical fields such as optical communication and optical recording, interest in VCSEL is increasing. VCSELs are not available in edge-emitting semiconductor lasers that have low threshold currents, low power consumption, can easily obtain a circular light spot, and can be evaluated in a wafer state or two-dimensionally arrayed light sources. Has excellent features. Taking advantage of these features, demand as a light source in the communication field is particularly expected.

  As with other semiconductor devices, the VCSEL may be exposed to high voltage such as static electricity when mounted on a circuit board or the like. If a large spike current instantaneously flows inside the element due to electrostatic discharge or the like, the element is damaged and causes a failure. Several proposals have been made to address these issues.

  Patent Document 1 relates to a semiconductor laser that can completely protect against a surge and can control output light intensity at a constant level. As shown in FIG. 14, the semiconductor laser includes a laser diode 1, a photodiode 2, a light emission control circuit 3, and diodes 10a to 10c and 11a to 11c. The diodes 10a to 10c and 11a to 11 are silicon diodes and are monolithically incorporated in the substrate.

  Patent Document 2 discloses a group III-V nitride semiconductor light emitting device in which a p-side electrode and an n-side electrode are connected by a protective film having nonlinear resistance characteristics such as zinc oxide, and a voltage equal to or higher than a certain threshold value. Is applied between the electrodes so that a current flows through the protective film.

JP 2001-156386 A JP-A-2005-136177

  Conventional ESD countermeasures are mainly taken in the post-process of VCSELs or packaged VCSELs, and few countermeasures have been taken for wafers during the manufacturing process. When the wafer is damaged by ESD during manufacturing, crystal defects are generated in the semiconductor layer, thereby deteriorating the output characteristics and shortening the device life. This is a significant problem particularly in a single mode laser. Although Patent Document 1 and Patent Document 2 improve the ESD withstand voltage, they do not effectively protect the wafer in the manufacturing process as described above from ESD or the like.

  An object of the present invention is to solve the above-described problems of the prior art and provide a surface-emitting type semiconductor laser device capable of protecting a substrate or wafer being manufactured from ESD or the like and a method for manufacturing the same.

  A surface-emitting type semiconductor laser device according to the present invention includes at least a first conductivity type first semiconductor multilayer film (semiconductor mirror layer), an active layer, and a second conductivity type second semiconductor multilayer film (semiconductor) on a substrate. A mirror layer) and a semiconductor layer including a second conductivity type contact layer are stacked, and a post structure for emitting laser light and a pad formation region are substantially separated by a first groove formed in the semiconductor layer. ing. Then, a contact electrode electrically connected to the contact layer of the post structure, an electrode pad provided in the pad formation region, electrically connected to the contact electrode, provided in the pad formation region, and electrically connected from the electrode pad The conductive portion includes a conductive layer electrically connected to the contact layer of the second conductivity type in the pad formation region, and the conductive layer is formed in a post structure. The exposed area is larger than the exposed area of the contact electrode.

  Preferably, the conductive portion is surrounded by a second groove formed in the semiconductor layer, and the second groove has a depth from the contact layer to at least the first semiconductor multilayer film. Alternatively, in the semiconductor layer having the current confinement portion, the second groove has a depth from the contact layer to at least the current confinement portion. Further, the second groove can be formed simultaneously with the first groove. The substrate is preferably an n-type semiconductor substrate. The “exposed area” here does not mean that it is exposed in the final form of the surface emitting semiconductor laser device, but is an area when it is left exposed in the manufacturing process.

  By forming a conductive layer with a large exposed area on the contact layer before forming the first groove, static electricity generated during the manufacturing process is captured by the conductive layer, and the discharge current is transferred from the contact layer to the first semiconductor multilayer. It can flow to a film or substrate. Thereby, a bypass path to other than the post structure (or the laser element portion) in which the contact electrode is formed is generated, the generation of crystal defects in the laser element portion can be suppressed, and the device life can be extended.

  Furthermore, the method of manufacturing the surface-emitting type semiconductor laser device according to the present invention includes at least a first conductivity type first semiconductor multilayer film, an active layer, a second conductivity type second semiconductor multilayer film, A step of laminating a semiconductor layer including a contact layer of two conductivity type, a step of forming a contact electrode and a conductive layer on the contact layer, a first groove and a conductive layer surrounding the contact electrode by etching the semiconductor layer Forming an enclosing second groove in the semiconductor layer; forming an insulating film on the semiconductor layer including the first groove and the second groove; and the insulating film so that the contact electrode and the conductive layer are exposed. And forming an electrode pad connected to the contact electrode through the opening on the insulating film.

  According to the present invention, since the conductive layer having an exposed area larger than the exposed area of the contact electrode is formed on the pad forming region separated from the post structure, a large current such as static electricity generated during the manufacturing process is formed. Can easily flow through the conductive portion, and as a result, the inside of the post structure, which is the laser light emitting portion, can be protected from ESD or the like.

  The best mode for carrying out the present invention will be described below with reference to the drawings. The surface emitting semiconductor laser according to the present invention is preferably constituted by a VCSEL having a selective oxidation type mesa.

  FIG. 1 is a schematic plan view of a VCSEL according to an embodiment of the present invention, and FIG. 1B is a cross-sectional view taken along the line AA. In the VCSEL according to this embodiment, an n-side lower electrode 102 is formed on the back surface of an n-type GaAs substrate 100, and an n-type lower DBR (Distributed Bragg Reflector) 104, undoped on the upper surface of the substrate. An active layer 106 including a lower spacer layer, an undoped quantum well active layer, and an undoped upper spacer layer, a p-type upper DBR 108, and a p-type GaAs contact layer 110 are sequentially stacked. The lowermost layer of the upper DBR 108 includes an AlAs layer that functions as a current confinement portion.

  An annular or ring-shaped groove 114 is formed by etching a part of the semiconductor layer stacked on the substrate. The groove 114 defines a columnar post structure P and a pad forming region Q separated from the post structure P. Further, a rectangular groove 116 is formed by etching a part of the semiconductor layer in the pad forming region Q, and the conductive portion R is defined by the groove 116. The grooves 114 and 116 have a depth that reaches a part of the lower DBR 104 from the contact layer 110 and are formed simultaneously. As will be described later, the conductive portion R protects the post structure P on the wafer from ESD during the manufacturing process of the VCSEL.

  The post structure P functions as a light emitting unit for emitting laser light. At the top of the post structure P, an annular or ring-shaped contact electrode 120 (a region painted in black in the cross-sectional view of FIG. 1B) is formed on the contact layer 110. Ohmic connection. The contact layer 120 exposed by the exit opening of the contact electrode 120 is preferably covered with a protective film. An interlayer insulating film 122 is formed so as to cover the post structure P, and a contact hole 124 for exposing the contact electrode 120 is formed in the interlayer insulating film 122. A p-side upper electrode 126 is formed through the contact hole 124, and the p-side upper electrode 126 is connected to the contact electrode 120. Further, a circular opening 128 is formed at the center of the p-side upper electrode 126. The p-side upper electrode 126 supplies a current necessary for laser oscillation to the active layer 106 in the post structure P via the contact electrode 120.

  In the pad formation region Q, circular electrode pads 130 (shown by hatching in the plan view of FIG. 1A) are formed. The electrode pad 130 is formed on the interlayer insulating film 122 and thereby electrically insulated from the contact layer 110. The electrode pad 130 is connected to the p-side upper electrode 126 through the lead wiring 132.

  Further, in the pad forming region Q, a conductive portion R is formed at a position away from the electrode pad 130. The conductive portion R is surrounded by a rectangular groove 116 and is separated from the post structure P and the pad formation region Q. The conductive portion R includes a metal layer 140 formed on the contact layer 110, and the metal layer 140 is electrically connected to the p-type contact layer 110. Thereby, the conductive portion R provides a current path including a pin junction from the metal layer 140 to the n-type substrate 100. This current path bypasses the current path from the contact electrode 120 to the n-type substrate 100 via the pin junction, and a large current of electrostatic discharge generated during the manufacturing process flows from the metal layer 140 to the substrate 100. Let

  In order to promote capture of electrostatic current in the conductive portion R, the exposed area of the metal layer 140 is preferably made larger than the exposed area of the contact electrode 120. The exposure means that the metal layer 140 and / or the contact electrode 120 are exposed during the manufacturing process. Furthermore, in order to protect the wafer from ESD during the manufacturing process, it is desirable to form the metal layer 140 as early as possible to provide a bypass path. Preferably, the contact electrode 120 and the metal layer 140 are formed immediately after the semiconductor layer is stacked on the substrate. The metal layer 140 may be formed at the same time as the contact electrode 120 or may be formed continuously after the contact electrode 120 is formed.

  Further, in this embodiment, the metal layer 140 of the conductive portion R is processed into an identification symbol or an identification code, and has a display function for identifying the VCSEL chip. In the example of FIG. 1, the pattern “AW01” is removed from the metal layer 140, and the others are metal layers (indicated by hatching). The portion of the contact layer exposed by the metal layer 140 is preferably protected by an insulating protective film.

  Next, various modifications of the above-described configuration of the conductive portion will be described. Except for the configuration of the conductive portion, the other configurations are almost the same as in the above embodiment. In the VCSEL shown in FIG. 2A, the conductive portion R1 is formed at a position different from the chip identification display 150. An annular groove 160 extending from the contact layer 110 to a part of the lower DBR is formed at a position close to the post P, and a cylindrical conductive portion R1 is defined by the groove 160. A circular metal layer 162 is formed on the surface of the conductive portion R1, and the metal layer 162 is electrically connected to the contact layer 110 to provide a current path to the substrate 100. The exposed area of the metal layer 162 is larger than the exposed area of the contact electrode 120 at the top of the post structure P.

  In the VCSEL shown in FIG. 2B, the pattern of the metal layer 140 shown in FIG. 1 is inverted. That is, the conductive portion R2 has a metal pattern 164 of “AW01”. The region without the metal pattern 164 is preferably covered with a protective film. The exposed area of the metal pattern 164 is larger than that of the contact electrode 120. In the VCSEL shown in FIG. 2C, the groove 166 formed in the semiconductor layer is an annular ellipse, and the corner portion is rounded. For this reason, a curved surface is formed at the end portion of the conductive portion R3 surrounded by the groove 166, and the end portion is difficult to break. Similar to the first embodiment, a metal layer 168 from which the identification symbols are removed is formed. In the VCSEL shown in FIG. 2D, a plurality (seven) conductive portions R4 are formed by forming a plurality of ring-shaped grooves 170 in the semiconductor layer. A circular metal layer 172 is formed on the surface of each conductive portion R4, and a plurality of current paths to the substrate are provided. The exposed area of all the metal layers 172 is larger than the exposed area of the contact electrode 120 of the post structure P.

  The VCSEL shown in FIG. 3A is not a ring shape in which the grooves 174 formed in the semiconductor layer are continuous, but a C-shaped groove in which a part thereof is discontinuous. A circular metal layer 176 is formed on the contact layer surface of the conductive portion R5 defined by the groove. In the VCSEL shown in FIG. 3B, a C-shaped groove 178 is formed so as to surround the post structure P. The C-shaped groove 178 is concentric with the groove 116 defining the post structure P, and a region between the grooves 116 and 178 is defined as a conductive portion R6, and a C-shaped metal layer 180 is formed there. Has been. In the VCSEL shown in FIG. 3C, a groove 182 is formed so as to surround the post structure P and the electrode pad 130, and a rectangular outer edge groove 184 is formed in a dicing region when cutting each VCSEL chip from the wafer. Is formed. A region between the groove 182 and the outer edge groove 184 is defined as a conductive portion R7. A rectangular metal layer 186 is formed on the conductive portion R7, and the metal layer of the identification symbol portion is removed.

Next, a manufacturing method of the VCSEL of this embodiment will be described with reference to FIGS. First, as shown in FIG. 4A, an Si carrier concentration of 1 × 10 ¹⁸ cm ⁻³ and a film thickness of about 0.2 μm are sequentially formed on the n-type GaAs substrate 100 by metal organic chemical vapor deposition (MOCVD). An n-type GaAs buffer layer, a carrier concentration of 1 × 10 ¹⁸ cm ⁻³ , a total film thickness of about 4 μm, each of which is made of Al _0.9 Ga _0.1 As and Al _0.12 Ga _0.88 As, each of which is ¼ of the wavelength in the medium. .5 period lower n-type DBR 104, undoped lower Al _0.6 Ga _0.4 As spacer layer and undoped quantum well active layer (consisting of three 70 nm thick GaAs quantum well layers and four 50 nm thick Al _0.3 Ga _0.7 As barrier layers) And an undoped upper Al _0.6 Ga _0.4 As spacer layer, the active layer 106 having a wavelength in the medium having a film thickness, a carbon carrier concentration of 1 × 10 ¹⁸ cm ⁻³ , and a total film thickness of about 3 μm, Al _0.9 Ga _0.1 As and Al _0.12 Ga _0.88 consisting As 30 cycles of upper p-type DBR108 the thickness of the respectively is ¼ of the wavelength in the medium, the carrier concentration of 1 × 10 ¹⁹ cm ^-3, film thickness 20nm The p-type GaAs contact layers 110 are sequentially stacked. In FIG. 4A, only the substrate 100 and the contact layer 110 are indicated by numbers for convenience.

The lowermost layer of the upper DBR 108 includes a p-type AlAs layer that functions as a current confinement layer. Further, in order to lower the electrical resistance of the DBR, a region having a film thickness of about 20 nm in which the Al composition is gradually changed from 90% to 30% is provided at the interface between Al _0.9 Ga _0.1 As and Al _0.12 Ga _0.88 As. It is also possible.

  A resist pattern (not shown) is formed on the contact layer 110 which is the uppermost layer of the stacked semiconductor layers by a photolithography process. The resist pattern corresponds to the position of the contact electrode 120 having a post structure to be formed later and the metal layer 140 of the conductive portion R. Next, gold (Au) and titanium (Ti) are deposited on the semiconductor layer including the resist pattern, and the resist pattern is peeled off by a lift-off process. The gold / titanium on the resist pattern is removed together with the resist, and a pattern of the annular contact electrode 120 and the metal layer 140 remains on the contact layer 110. The metal layer 140 is processed into an identification symbol. Note that the contact electrode 120 and the metal layer 140 are not necessarily formed at the same time, and one of them may be formed first.

  Next, a protective film that protects the emission opening of the contact electrode 120 is formed. As shown in FIG. 4B, SiON is deposited on the entire surface of the substrate, and then a resist pattern is formed by a photolithography process. The SiON film is etched using the resist pattern as an etching mask. Thereby, the contact layer 110 exposed by the exit opening of the contact electrode 120 is covered with the SiON film 121, and the contact layer 110 exposed by the metal layer 140 is covered with the SiON film 121.

  Next, a mask pattern is formed. As shown in FIG. 4C, SiN is deposited on the entire surface of the substrate, and a resist pattern is formed by a photolithography process. SiN is etched using this resist pattern to form a mask pattern M. The mask pattern M covers a region corresponding to the post structure P and the conductive portion R.

  Next, a post structure and a conductive part are formed. As shown in FIG. 5D, the semiconductor layer exposed by the mask pattern M is etched by reactive ion etching to simultaneously form grooves 114 and 116 that reach the middle of the lower DBR 104 from the contact layer 110. Thereby, the columnar post structure P and the rectangular conductive portion R are formed.

  Next, for example, the substrate is exposed to a steam atmosphere at 340 ° C. for a certain period of time to perform an oxidation treatment. The lowermost p-type AlAs layer of the upper DBR 108 is oxidized from the side surface of the post structure P toward the inside by a certain distance. As a result, an oxidized region is formed on the outer edge of the AlAs layer, and the unoxidized conductive region is surrounded by the oxidized region. The unoxidized region becomes a region for confining current and light.

  Next, an interlayer insulating film is formed. As shown in FIG. 5E, after removing the mask pattern M, a SiN film 122 is deposited on the entire surface of the substrate by plasma CVD. Thereafter, as shown in FIG. 5F, the SiN film is etched using a photolithography process to form a circular contact hole 124 at the top of the post structure P, and the contact electrode 120 is exposed. At the same time, a rectangular opening 124 a is formed in the interlayer insulating film 122 so as to expose the metal layer 140 of the conductive portion R.

  Next, an electrode is formed. As shown in FIG. 6G, a resist pattern is formed so as to correspond to the position where the p-side upper electrode is formed, and then gold and titanium are stacked on the entire surface of the substrate, and the p-side upper electrode 126, Electrode pads 130 and lead wirings 132 are formed. Further, gold and Ge are formed on the back side of the substrate, and an n-side lower electrode is formed. In this way, the VCSEL shown in FIG. 1 can be obtained.

  As described above, the contact electrode 120 and the metal layer 140 are formed immediately after the semiconductor layer is stacked on the substrate, so that the static electricity generated during the manufacturing process is captured by the metal layer 140 and this discharge current flows to the substrate. As a result, the element inside the post structure, which is the laser element portion, can be protected from ESD.

  FIG. 7 is a schematic cross-sectional view showing an example of a package (module) of a semiconductor laser device on which a VCSEL chip is mounted. In the package 300, a chip 310 on which a VCSEL array is formed is fixed on a submount 320 on a metal stem 330. The conductive leads 340 and 342 are inserted into through holes (not shown) of the stem 330, and one lead 340 is electrically connected to the n-side lower electrode 102 formed on the back surface of the chip 310, The other lead 342 is electrically connected to the p-side electrode 126 (electrode pad 130) formed on the upper surface of the chip 310 via a bonding wire or the like.

  A ball lens 360 is fixed in the exit window 352 of the cap 350. The optical axis of the ball lens 360 is positioned so as to substantially coincide with the center of the exit opening of the contact electrode 120. Further, the distance between the chip 310 and the ball lens 360 is adjusted so that the ball lens 360 is included within the radiation angle θ of the laser beam from the chip 310. When a forward voltage is applied between the leads 340 and 342, laser light is emitted from the chip 310 and output to the outside through the ball lens 360. Note that a light receiving element for monitoring the light emission state of the VCSEL may be included in the cap.

  FIG. 8 is a diagram showing the configuration of still another package, and is preferably used in a spatial transmission system described later. In the package 302 shown in the drawing, a flat glass 362 is fixed in an emission window 352 at the center of the cap 350 instead of using the ball lens 360. The center of the flat glass 362 is positioned so as to coincide with the optical axis of the chip 310. The distance between the chip 310 and the flat glass 362 is adjusted so that the opening diameter of the flat glass 362 is not less than the radiation angle θ of the laser beam from the chip 310.

  FIG. 9 is a cross-sectional view showing a configuration when the package or module shown in FIG. 8 is applied to an optical transmitter. The optical transmission device 400 includes a cylindrical housing 410 fixed to the stem 330, a sleeve 420 integrally formed on an end surface of the housing 410, a ferrule 430 held in the opening 422 of the sleeve 420, a ferrule And an optical fiber 440 held by 430.

  An end of the housing 410 is fixed to a flange 332 formed in the circumferential direction of the stem 330. The ferrule 430 is accurately positioned in the opening 422 of the sleeve 420 and the optical axis of the optical fiber 440 is aligned with the optical axis of the ball lens 360. The core wire of the optical fiber 440 is held in the through hole 432 of the ferrule 430.

  The laser light emitted from the surface of the chip 310 is collected by the ball lens 360, and the collected light is incident on the core wire of the optical fiber 440 and transmitted. Although the ball lens 360 is used in the above example, other lenses such as a biconvex lens and a plano-convex lens can be used. Further, the optical transmission device 400 may include a drive circuit for applying an electrical signal to the leads 340 and 342. Furthermore, the optical transmission device 400 may include a reception function for receiving an optical signal via the optical fiber 440.

  FIG. 10 is a diagram showing a configuration when the package shown in FIG. 8 is used in a spatial transmission system. The spatial transmission system 500 includes a package 300, a condenser lens 510, a diffusion plate 520, and a reflection mirror 530. In the spatial transmission system 500, instead of using the ball lens 360 used in the package 300, a condensing lens 510 is used. The light condensed by the condenser lens 510 is reflected by the diffusion plate 520 through the opening 532 of the reflection mirror 530, and the reflected light is reflected toward the reflection mirror 530. The reflection mirror 530 reflects the reflected light in a predetermined direction and performs optical transmission. In the case of a spatial transmission light source, a multi-spot type VCSEL may be used to obtain a high output.

  FIG. 11 is a diagram illustrating a configuration example of an optical transmission system using a VCSEL as a light source. The optical transmission system 600 receives a light source 610 including a chip 310 on which a VCSEL is formed, an optical system 620 that collects laser light emitted from the light source 610, and the laser light output from the optical system 620. A light receiving unit 630 and a control unit 640 that controls driving of the light source 610 are included. The control unit 640 supplies a drive pulse signal for driving the VCSEL to the light source 610. Light emitted from the light source 610 is transmitted to the light receiving unit 630 via an optical system 620 by an optical fiber, a reflection mirror for spatial transmission, or the like. The light receiving unit 630 detects the received light with a photodetector or the like. The light receiving unit 630 can control the operation of the control unit 640 (for example, the start timing of optical transmission) by the control signal 650.

  Next, the configuration of an optical transmission device used in the optical transmission system will be described. FIG. 12 shows an external configuration of the optical transmission apparatus. The optical transmission device 700 includes a case 710, an optical signal transmission / reception connector joint 720, a light emitting / receiving element 730, an electric signal cable joint 740, a power input unit 750, an LED 760 indicating that an operation is in progress, an LED 770 indicating occurrence of an abnormality, and a DVI. A connector 780 and a transmission circuit board / reception circuit board 790 are provided.

  A video transmission system using the optical transmission apparatus 700 is shown in FIG. The video transmission system 800 includes a video signal generation device 810, an image display device 820, a DVI electric cable 830, a transmission module 840, a reception module 850, a video signal transmission optical signal connector 860, an optical fiber 870, and a control signal cable connector 880. , A power adapter 890, and an electric cable 900 for DVI. In order to transmit the video signal generated by the video signal generator 810 to the image display device 820 such as a liquid crystal display, the optical transmission device shown in FIG. 12 is used.

  The preferred embodiments of the present invention have been described in detail above. However, the present invention is not limited to the specific embodiments, and various modifications can be made within the scope of the gist of the present invention described in the claims. Deformation / change is possible.

  In the embodiment of the VCSEL, the AlAs layer is used as the current confinement layer. However, the present invention is not limited to this, and an AlGaAs layer can also be used. Furthermore, although the GaAs compound semiconductor laser is shown in the above embodiment, a semiconductor laser using gallium nitride or gallium indium may be used.

  The surface-emitting type semiconductor laser according to the present invention can be used in an optical communication device using an optical fiber or the like, an optical communication system using the same, an optical device that performs optical reading and writing, a light source of a copying machine, or the like. it can.

1 shows a VCSEL according to a first embodiment of the present invention, in which (a) is a schematic plan view and (b) is a cross-sectional view taken along line AA. It is a schematic plan view which shows the modification of a 1st Example. It is a schematic plan view which shows the modification of a 1st Example. It is the top view which shows the manufacturing process of VCSEL which concerns on the Example of this invention, and its schematic sectional drawing (AA line). It is the top view which shows the manufacturing process of VCSEL which concerns on the Example of this invention, and its schematic sectional drawing (AA line). It is the top view which shows the manufacturing process of VCSEL which concerns on the Example of this invention, and its schematic sectional drawing (AA line). It is a schematic sectional drawing which shows the structure of the package which mounted the semiconductor chip in which VCSEL was formed. It is a schematic sectional drawing which shows the structure of another package. It is a schematic sectional drawing which shows the structure of the optical transmitter using the package shown in FIG. It is a figure which shows a structure when the package shown in FIG. 8 is used for a spatial transmission system. It is a block diagram which shows the structure of an optical transmission system. It is a figure which shows the external appearance structure of an optical transmission apparatus. It is a figure which shows the video transmission system using the optical transmission apparatus of FIG. It is a figure which shows the circuit of the surface emitting laser which has the conventional protection function.

Explanation of symbols

100: n-type GaAs substrate 102: n-side lower electrode 104: n-type lower DBR 106: active layer 108: p-type upper DBR 110: p-type GaAs contact layer 114: groove 116: groove 120: contact electrode 122: interlayer insulating film 124: contact hole 126: p-side upper electrode 128: opening 130: electrode pad 132: lead-out wiring 140: metal layer

Claims (22)

A semiconductor layer including at least a first semiconductor multilayer film of the first conductivity type, an active layer, a second semiconductor multilayer film of the second conductivity type, and a contact layer of the second conductivity type is stacked on the substrate, and laser light A surface emitting semiconductor laser device in which a post structure that emits light and a pad formation region are substantially separated by a first groove formed in the semiconductor layer,
A contact electrode electrically connected to the contact layer of the post structure;
An electrode pad provided in a pad forming region and electrically connected to the contact electrode;
A conductive portion provided in a pad forming region and electrically isolated from the electrode pad;
The conductive portion has a conductive layer electrically connected to the second conductivity type contact layer in the pad formation region, and the conductive layer has an exposed area larger than an exposed area of the contact electrode formed in the post structure. A surface emitting semiconductor laser device. 2. The surface according to claim 1, wherein the conductive portion is surrounded by a second groove formed in the semiconductor layer, and the second groove has a depth from the contact layer to at least the first semiconductor multilayer film. Light emitting semiconductor laser device. 2. The surface emitting semiconductor laser device according to claim 1, wherein the semiconductor layer includes a current confinement portion. The surface emitting semiconductor according to claim 1, wherein the conductive portion is surrounded by a second groove formed in the semiconductor layer, and the second groove has a depth from the contact layer to at least the current confinement portion. Laser device. The surface emitting semiconductor laser device according to claim 2, wherein the second groove has the same depth as the first groove. 6. The second groove according to claim 1, wherein the second groove is formed in an annular shape so as to surround the first groove, and a conductive portion is provided between the first groove and the second groove. Surface emitting semiconductor laser device. The surface emitting semiconductor laser device according to claim 6, wherein the second groove has a C-shape. The surface emitting semiconductor laser device according to claim 2, wherein an end portion of the conductive portion surrounded by the second groove has a substantially curved surface. 6. The surface emitting semiconductor laser device according to claim 1, wherein the conductive layer is a metal layer formed simultaneously with a post-structure contact electrode. The surface emitting semiconductor laser device according to claim 1, wherein a plurality of the conductive portions are provided on a pad formation region. 11. The surface emitting semiconductor laser device according to claim 1, wherein the conductive layer is processed into an identification symbol. The surface emitting semiconductor laser device according to claim 11, wherein the contact layer exposed by the identification symbol is covered with a protective film. A module on which the surface-emitting type semiconductor laser device according to claim 1 and an optical member are mounted. An optical transmission device comprising: the module according to claim 12; and a transmission unit configured to transmit a laser beam emitted from the module via an optical medium. An optical space transmission apparatus comprising: the module according to claim 12; and a transmission unit that spatially transmits light emitted from the module. An optical transmission system comprising: the module according to claim 12; and a transmission unit that transmits a laser beam emitted from the module. An optical space transmission system comprising: the module according to claim 12; and a transmission unit that spatially transmits light emitted from the module. Laminating a semiconductor layer including at least a first conductivity type first semiconductor multilayer film, an active layer, a second conductivity type second semiconductor multilayer film, and a second conductivity type contact layer on a substrate;
Forming a contact electrode and a conductive layer on the contact layer;
Etching the semiconductor layer to form a first groove surrounding the contact electrode and a second groove surrounding the conductive layer in the semiconductor layer;
Forming an insulating film on the semiconductor layer including the first groove and the second groove;
Forming an opening in the insulating film so that the contact electrode and the conductive layer are exposed;
Forming an electrode pad connected to the contact electrode through the opening on the insulating film;
A method of manufacturing a surface-emitting type semiconductor laser device comprising: The manufacturing method according to claim 18, wherein the conductive layer is formed simultaneously with the contact electrode. The manufacturing method according to claim 18, wherein the conductive layer is formed after the contact electrode is formed. 21. The manufacturing method according to claim 18, wherein the conductive layer is processed into an identification symbol. The manufacturing method includes a step of oxidizing the semiconductor layer after the formation of the first and second grooves, and the current confinement portion is formed in the semiconductor layer surrounded by the first groove by the oxidation step. The manufacturing method as described in.

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