JP4856205B2 - 光電気配線板および光電気配線装置の製造方法 - Google Patents
光電気配線板および光電気配線装置の製造方法 Download PDFInfo
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- JP4856205B2 JP4856205B2 JP2009076704A JP2009076704A JP4856205B2 JP 4856205 B2 JP4856205 B2 JP 4856205B2 JP 2009076704 A JP2009076704 A JP 2009076704A JP 2009076704 A JP2009076704 A JP 2009076704A JP 4856205 B2 JP4856205 B2 JP 4856205B2
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- optical
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- light input
- wiring
- optical waveguide
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- G—PHYSICS
- G02—OPTICS
- G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
- G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
- G02B6/24—Coupling light guides
- G02B6/42—Coupling light guides with opto-electronic elements
- G02B6/43—Arrangements comprising a plurality of opto-electronic elements and associated optical interconnections
-
- G—PHYSICS
- G02—OPTICS
- G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
- G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
- G02B6/24—Coupling light guides
- G02B6/42—Coupling light guides with opto-electronic elements
- G02B6/4201—Packages, e.g. shape, construction, internal or external details
- G02B6/4219—Mechanical fixtures for holding or positioning the elements relative to each other in the couplings; Alignment methods for the elements, e.g. measuring or observing methods especially used therefor
- G02B6/422—Active alignment, i.e. moving the elements in response to the detected degree of coupling or position of the elements
- G02B6/4221—Active alignment, i.e. moving the elements in response to the detected degree of coupling or position of the elements involving a visual detection of the position of the elements, e.g. by using a microscope or a camera
- G02B6/4222—Active alignment, i.e. moving the elements in response to the detected degree of coupling or position of the elements involving a visual detection of the position of the elements, e.g. by using a microscope or a camera by observing back-reflected light
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0274—Optical details, e.g. printed circuits comprising integral optical means
-
- G—PHYSICS
- G02—OPTICS
- G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
- G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
- G02B6/24—Coupling light guides
- G02B6/42—Coupling light guides with opto-electronic elements
- G02B6/4201—Packages, e.g. shape, construction, internal or external details
- G02B6/4204—Packages, e.g. shape, construction, internal or external details the coupling comprising intermediate optical elements, e.g. lenses, holograms
- G02B6/4214—Packages, e.g. shape, construction, internal or external details the coupling comprising intermediate optical elements, e.g. lenses, holograms the intermediate optical element having redirecting reflective means, e.g. mirrors, prisms for deflecting the radiation from horizontal to down- or upward direction toward a device
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00011—Not relevant to the scope of the group, the symbol of which is combined with the symbol of this group
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1305—Bipolar Junction Transistor [BJT]
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/11—Printed elements for providing electric connections to or between printed circuits
- H05K1/117—Pads along the edge of rigid circuit boards, e.g. for pluggable connectors
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/01—Dielectrics
- H05K2201/0104—Properties and characteristics in general
- H05K2201/0112—Absorbing light, e.g. dielectric layer with carbon filler for laser processing
Landscapes
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Optics & Photonics (AREA)
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Optical Integrated Circuits (AREA)
- Optical Couplings Of Light Guides (AREA)
- Semiconductor Lasers (AREA)
- Light Receiving Elements (AREA)
Description
図1は、本発明の第1の実施形態に係る光電気配線装置100を示す斜視図である。但し、図1では図示の簡単化のため、電気配線パターンは省略している。図1において、1は光電気配線板基体、2は光導波路(以下、光配線チャネル2と呼ぶことがある)、3はダミー光導波路、4は受光素子アレイ(以下、光半導体素子4と呼ぶことがある)、5は発光素子アレイ(以下、光半導体素子5と呼ぶことがある)である。発光素子アレイ5と受光素子アレイ4とは、光導波路2を介して光信号の授受を行う。
次に本実施形態では、上記第1の実施形態で説明した光電気配線板110の光入出力部9に光半導体素子4、5または外部光導波路を配置してなる光電気配線装置100の製造過程について説明する。具体的には、前記ダミー光入力部11周辺の撮影画像を二値化処理して前記ダミー光入力部11の位置を検出し、該検出結果を位置指標として前記光入出力部9に光半導体素子4、5または外部光導波路を配置する光電気配線装置100の製造方法について説明する。
次に本発明の第3の本実施形態に係る光電気配線装置100が備えるダミー導波路3の端部の形状について図8を用いて説明する。図8(a)〜(d)は、ダミー光導波路3の端部形状(光終端部)の例を示す上面図であり、全てダミー光入力部から入射した光が反射して戻らないようにする例である。また図8(e)に、図8(a)〜(d)に示すダミー導波路3のC−C断面図を示す。
なお、本願発明は上記第1乃至第3実施形態に限定されるものではない。例えば、上述した本願発明の実施形態はいくつかの具体例を示しているが、これはあくまで構成例であり、本願発明の趣旨に従い個々の要素に他の手段(材料、寸法など)を用いても構わないものである。また、実施形態に示された材料、形状、配置などはあくまで一例であり、また、各実施形態を組み合わせて実施することも可能である。例えば、光導波路は基体フィルムの反対側に形成しているが、これは光導波路上に電気配線を形成して、光入出力部の極近傍に光素子が配置されるようにしても良い。また、ここでは1つの発光部と1つの受光部を1対1で接続する形式で示してきたが、これは1対複数(複数対1)、複数対複数などとしても構わないものである。その他、本発明はその要旨を逸脱しない範囲で、種々変形して実施することができるものである。
Claims (5)
- 光導波路による光配線と導電材料による電気配線とを有する光電気配線板に光半導体素子または外部光導波路を配置して前記光導波路との光信号授受を行う光入出力部と、
前記光入出力部の形成時に前記光入出力部と同一工程で形成されたダミー光入力部と、
前記ダミー光入力部に接続され、前記ダミー光入力部と反対の端部に、前記ダミー光入力部に入射された光を前記光電気配線板内で吸収、または散逸させる光終端部を有するダミー光導波路と、
を具備することを特徴とする光電気配線板。 - 前記ダミー光入力部は、前記光入出力部と同一線上に配置されてなる
ことを特徴とする請求項1記載の光電気配線板。 - 前記ダミー光入力部は、前記光入出力部毎に2箇所以上設けられてなる
ことを特徴とする請求項1または2記載の光電気配線板。 - 光電気配線板の光入出力部に光半導体素子または外部光導波路を配置する工程において、ダミー光入力部に入射された光を前記光電気配線板内で吸収、または散逸させつつ、前記ダミー光入力部周辺の画像を二値化処理し、該画像における黒色部分を認識することで、前記ダミー光入力部の位置を検出し、前記検出結果を位置指標として前記光入出力部に光半導体素子または外部光導波路を配置する
ことを特徴とする光電気配線装置の製造方法。 - 前記ダミー光入力部周囲のパターン認識に必要な領域内には前記電気配線を配置しないことを特徴とする請求項4記載の光電気配線装置の製造方法。
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2009076704A JP4856205B2 (ja) | 2009-03-26 | 2009-03-26 | 光電気配線板および光電気配線装置の製造方法 |
US12/700,116 US20100247030A1 (en) | 2009-03-26 | 2010-02-04 | Optoelectronic wiring board including optical wiring and electrical wiring and method of manufacturing optoelectronic wiring device using the same |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2009076704A JP4856205B2 (ja) | 2009-03-26 | 2009-03-26 | 光電気配線板および光電気配線装置の製造方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2010232319A JP2010232319A (ja) | 2010-10-14 |
JP4856205B2 true JP4856205B2 (ja) | 2012-01-18 |
Family
ID=42784356
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2009076704A Expired - Fee Related JP4856205B2 (ja) | 2009-03-26 | 2009-03-26 | 光電気配線板および光電気配線装置の製造方法 |
Country Status (2)
Country | Link |
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US (1) | US20100247030A1 (ja) |
JP (1) | JP4856205B2 (ja) |
Families Citing this family (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP5934932B2 (ja) * | 2011-12-28 | 2016-06-15 | パナソニックIpマネジメント株式会社 | 光導波路、光電気複合配線板、及び光導波路の製造方法 |
US9442251B2 (en) | 2012-01-10 | 2016-09-13 | Hitachi Chemical Company, Ltd. | Optical waveguide with mirror, optical fiber connector, and manufacturing method thereof |
US9383512B2 (en) | 2012-12-31 | 2016-07-05 | Infinera Corporation | Light absorption and scattering devices in a photonic integrated circuit that minimize optical feedback and noise |
CN106575015A (zh) * | 2014-08-04 | 2017-04-19 | 住友电木株式会社 | 波导 |
JP5976769B2 (ja) * | 2014-12-17 | 2016-08-24 | 新光電気工業株式会社 | 光導波路及び光導波路装置 |
JP6469469B2 (ja) * | 2015-02-06 | 2019-02-13 | 富士通コンポーネント株式会社 | 光導波路モジュール |
JP6492169B2 (ja) * | 2015-04-27 | 2019-03-27 | 京セラ株式会社 | 光伝送基板および光伝送モジュール |
US10168475B2 (en) * | 2017-01-18 | 2019-01-01 | Juniper Networks, Inc. | Atomic layer deposition bonding for heterogeneous integration of photonics and electronics |
JP7489756B2 (ja) | 2018-07-25 | 2024-05-24 | 日東電工株式会社 | 光学素子装置およびその製造方法 |
WO2023074482A1 (ja) * | 2021-10-26 | 2023-05-04 | 住友ベークライト株式会社 | 光導波路の製造方法 |
Family Cites Families (5)
Publication number | Priority date | Publication date | Assignee | Title |
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US5155786A (en) * | 1991-04-29 | 1992-10-13 | International Business Machines Corporation | Apparatus and a method for an optical fiber interface |
JP3124467B2 (ja) * | 1995-04-21 | 2001-01-15 | 株式会社精工技研 | 光カプラ |
GB9610621D0 (en) * | 1996-05-21 | 1996-07-31 | Hewlett Packard Co | Optical isolator |
JP2008158440A (ja) * | 2006-12-26 | 2008-07-10 | Toshiba Corp | 光電気配線板及び光電気配線装置の製造方法 |
JP2009008769A (ja) * | 2007-06-26 | 2009-01-15 | Panasonic Electric Works Co Ltd | 光電気変換装置の製造方法 |
-
2009
- 2009-03-26 JP JP2009076704A patent/JP4856205B2/ja not_active Expired - Fee Related
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2010
- 2010-02-04 US US12/700,116 patent/US20100247030A1/en not_active Abandoned
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JP2010232319A (ja) | 2010-10-14 |
US20100247030A1 (en) | 2010-09-30 |
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