JP4826873B2 - ホットルーチンメモリを有するマイクロプロセッサシステム - Google Patents

ホットルーチンメモリを有するマイクロプロセッサシステム Download PDF

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Publication number
JP4826873B2
JP4826873B2 JP2004188272A JP2004188272A JP4826873B2 JP 4826873 B2 JP4826873 B2 JP 4826873B2 JP 2004188272 A JP2004188272 A JP 2004188272A JP 2004188272 A JP2004188272 A JP 2004188272A JP 4826873 B2 JP4826873 B2 JP 4826873B2
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Japan
Prior art keywords
data
memory
hot routine
processor
stored
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Expired - Fee Related
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JP2004188272A
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English (en)
Japanese (ja)
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JP2005025740A5 (enExample
JP2005025740A (ja
Inventor
李會鎭
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Samsung Electronics Co Ltd
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Samsung Electronics Co Ltd
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Publication of JP2005025740A publication Critical patent/JP2005025740A/ja
Publication of JP2005025740A5 publication Critical patent/JP2005025740A5/ja
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    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/22—Microcontrol or microprogram arrangements
    • G06F9/28—Enhancement of operational speed, e.g. by using several microcontrol devices operating in parallel
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3802—Instruction prefetching
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0806—Multiuser, multiprocessor or multiprocessing cache systems
    • G06F12/0842—Multiuser, multiprocessor or multiprocessing cache systems for multiprocessing or multitasking

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Software Systems (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Memory System (AREA)
  • Advance Control (AREA)
  • Executing Machine-Instructions (AREA)
JP2004188272A 2003-07-01 2004-06-25 ホットルーチンメモリを有するマイクロプロセッサシステム Expired - Fee Related JP4826873B2 (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
KR2003-044292 2003-07-01
KR1020030044292A KR100959133B1 (ko) 2003-07-01 2003-07-01 핫 루틴 메모리를 갖는 마이크로프로세서 시스템 및구현방법

Publications (3)

Publication Number Publication Date
JP2005025740A JP2005025740A (ja) 2005-01-27
JP2005025740A5 JP2005025740A5 (enExample) 2007-05-24
JP4826873B2 true JP4826873B2 (ja) 2011-11-30

Family

ID=32844914

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2004188272A Expired - Fee Related JP4826873B2 (ja) 2003-07-01 2004-06-25 ホットルーチンメモリを有するマイクロプロセッサシステム

Country Status (4)

Country Link
US (1) US7363428B2 (enExample)
JP (1) JP4826873B2 (enExample)
KR (1) KR100959133B1 (enExample)
GB (1) GB2403569B (enExample)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI328198B (en) * 2006-12-11 2010-08-01 Via Tech Inc Gpu context switching system
JP4909963B2 (ja) * 2008-09-09 2012-04-04 株式会社東芝 統合メモリ管理装置
WO2014108743A1 (en) * 2013-01-09 2014-07-17 Freescale Semiconductor, Inc. A method and apparatus for using a cpu cache memory for non-cpu related tasks
KR20150006614A (ko) * 2013-07-09 2015-01-19 에스케이하이닉스 주식회사 데이터 저장 장치 및 그것의 동작 방법

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4918586A (en) * 1985-07-31 1990-04-17 Ricoh Company, Ltd. Extended memory device with instruction read from first control store containing information for accessing second control store
US5249294A (en) * 1990-03-20 1993-09-28 General Instrument Corporation Determination of time of execution of predetermined data processing routing in relation to occurrence of prior externally observable event
US5603011A (en) 1992-12-11 1997-02-11 International Business Machines Corporation Selective shadowing and paging in computer memory systems
GB2284911A (en) 1993-12-16 1995-06-21 Plessey Semiconductors Ltd Flexible lock-down cache.
US5956495A (en) * 1997-09-22 1999-09-21 International Business Machines Corporation Method and system for processing branch instructions during emulation in a data processing system
JPH11194973A (ja) * 1997-11-06 1999-07-21 Seiko Epson Corp 画像情報処理装置、その制御方法および記録媒体
JP2000029783A (ja) * 1998-07-15 2000-01-28 Hitachi Ltd プロセッサ及び計算機
US6385721B1 (en) * 1999-01-22 2002-05-07 Hewlett-Packard Company Computer with bootable hibernation partition
KR100347865B1 (ko) 1999-11-15 2002-08-09 삼성전자 주식회사 어드레스 트레이스를 이용한 분기 예측 방법
KR100317976B1 (ko) 1999-12-31 2001-12-24 대표이사 서승모 캐시 메모리가 포함된 시스템에서 인터럽트 서비스 루틴을위한 장치
US6954822B2 (en) * 2002-08-02 2005-10-11 Intel Corporation Techniques to map cache data to memory arrays

Also Published As

Publication number Publication date
KR20050005268A (ko) 2005-01-13
US7363428B2 (en) 2008-04-22
GB2403569B (en) 2005-12-14
GB0414775D0 (en) 2004-08-04
GB2403569A (en) 2005-01-05
KR100959133B1 (ko) 2010-05-26
JP2005025740A (ja) 2005-01-27
US20050005068A1 (en) 2005-01-06

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