JP4815869B2 - 光受信モジュール - Google Patents
光受信モジュール Download PDFInfo
- Publication number
- JP4815869B2 JP4815869B2 JP2005138132A JP2005138132A JP4815869B2 JP 4815869 B2 JP4815869 B2 JP 4815869B2 JP 2005138132 A JP2005138132 A JP 2005138132A JP 2005138132 A JP2005138132 A JP 2005138132A JP 4815869 B2 JP4815869 B2 JP 4815869B2
- Authority
- JP
- Japan
- Prior art keywords
- capacitor
- pin terminal
- power supply
- plate capacitor
- hole
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/48137—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48153—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being arranged next to each other, e.g. on a common substrate
- H01L2224/48195—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being arranged next to each other, e.g. on a common substrate the item being a discrete passive component
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/301—Electrical effects
- H01L2924/3011—Impedance
Landscapes
- Light Receiving Elements (AREA)
Description
Claims (2)
- 金属製のパッケージ基板上に光信号を受光して電気信号に変換する受光素子と、電気信号を増幅するプリアンプと、電源とグランドとの間に平板コンデンサとを備えた光受信モジュールであって、
前記平板コンデンサに貫通孔を設け、前記貫通孔に電源用のピン端子を挿通させて搭載したことを特徴とする光受信モジュール。 - 前記平板コンデンサの貫通孔の内面に、一方の電極と電気的に導通された導電層が形成されていることを特徴とする請求項1に記載の光受信モジュール。
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2005138132A JP4815869B2 (ja) | 2005-05-11 | 2005-05-11 | 光受信モジュール |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2005138132A JP4815869B2 (ja) | 2005-05-11 | 2005-05-11 | 光受信モジュール |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2006319019A JP2006319019A (ja) | 2006-11-24 |
JP4815869B2 true JP4815869B2 (ja) | 2011-11-16 |
Family
ID=37539440
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2005138132A Expired - Fee Related JP4815869B2 (ja) | 2005-05-11 | 2005-05-11 | 光受信モジュール |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP4815869B2 (ja) |
Family Cites Families (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0287559A (ja) * | 1988-09-26 | 1990-03-28 | Hitachi Ltd | 半導体ケース |
JPH05267722A (ja) * | 1992-03-18 | 1993-10-15 | Oki Electric Ind Co Ltd | 受・発光素子 |
JP3047735B2 (ja) * | 1994-05-16 | 2000-06-05 | 住友電気工業株式会社 | 光受信モジュ−ルとその製造方法 |
JP3623144B2 (ja) * | 1994-05-16 | 2005-02-23 | 住友電気工業株式会社 | 光受信モジュ−ル |
JP3680303B2 (ja) * | 1994-11-08 | 2005-08-10 | 住友電気工業株式会社 | 光電変換モジュール |
JP4136009B2 (ja) * | 1995-02-02 | 2008-08-20 | 住友電気工業株式会社 | pin型受光素子、およびpin型受光素子の製造方法 |
JP2003258272A (ja) * | 2002-02-27 | 2003-09-12 | Sumitomo Electric Ind Ltd | 光受信モジュール |
JP2004254125A (ja) * | 2003-02-20 | 2004-09-09 | Sumitomo Electric Ind Ltd | 光受信モジュール |
-
2005
- 2005-05-11 JP JP2005138132A patent/JP4815869B2/ja not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
JP2006319019A (ja) | 2006-11-24 |
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