JP4790750B2 - 樹脂封止型半導体装置の製造方法 - Google Patents
樹脂封止型半導体装置の製造方法 Download PDFInfo
- Publication number
- JP4790750B2 JP4790750B2 JP2008109198A JP2008109198A JP4790750B2 JP 4790750 B2 JP4790750 B2 JP 4790750B2 JP 2008109198 A JP2008109198 A JP 2008109198A JP 2008109198 A JP2008109198 A JP 2008109198A JP 4790750 B2 JP4790750 B2 JP 4790750B2
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- Prior art keywords
- resin
- lead
- semiconductor device
- lead frame
- sheet
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
- H01L2224/48465—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
Landscapes
- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
- Lead Frames For Integrated Circuits (AREA)
Description
第1に、同一面から成る吊りリードおよび前記つりリードの両側に位置する鍔状体の表面を支持手段で支持して、前記リードフレームから切断することで解決するものである。
22 樹脂封止体
22A、22B 硬化樹脂
23 ランド
24 吊りリード
25 凹部
26 リード
30 平坦面
31 曲面
32 外周面
33 バリ
34 打ち抜き面
Claims (4)
- 少なくともランド、前記ランドの4側辺に一端が近接して配置された複数のリード及び前記ランドの角部より延在する吊りリードから成る搭載部を有するリードフレームの前記ランド上に半導体素子を固着する工程と、
前記半導体素子と前記リードとを導電手段により電気的に接続する工程と、
前記リードフレームを樹脂封止金型に配置し、前記搭載部を被覆する樹脂封止体を形成する工程と、
前記樹脂封止体を前記リードフレームから切断する工程とを有する樹脂封止型半導体装置の製造方法に於いて、
前記樹脂封止体を形成する工程では、前記搭載部が前記樹脂封止金型のキャビティ内に収納されるように、前記搭載部周囲の前記リードフレームを前記樹脂封止金型により挟持し、前記キャビティを囲む前記樹脂封止金型の上金型の挟持面は、前記リードフレームの表面側と当接する平坦面から成り、前記キャビティ内への樹脂の注入、前記キャビティからの空気及び前記樹脂の排出は、前記リードフレームの吊りリード近傍に設けられたエアベントを介して行うことで、前記樹脂封止体は、その周囲にその表面が全周に渡り平坦面となる鍔状体が形成され、前記吊りリードの延在部に相当する前記鍔状体は、前記吊りリードの上面が露出し、前記吊りリードの上面と、前記吊りリードの両側に位置する前記樹脂から成る鍔状体の上面は、前記平坦面でなり、
前記平坦面から成る前記吊りリード及び前記両側に位置する鍔状態の表面を支持手段で支持して、前記リードフレームから前記吊りリードを切断することを特徴とする樹脂封止型半導体装置の製造方法。 - 前記リードフレームから前記吊りリードを切断する際は、前記半導体装置の実装面側よりパンチにより切断する請求項1に記載の樹脂封止型半導体装置の製造方法。
- 前記樹脂封止体を形成する工程では、粘着層を有するシートを前記リードフレームの裏面に貼り合わせ、前記リードフレームの裏面に前記樹脂が回り込む事を防
止する請求項1に記載の樹脂封止型半導体装置の製造方法。 - 前記シートは前記樹脂封止金型に載置される際、前記シートをフラットにするために真空吸引する請求項3に記載の樹脂封止型半導体装置の製造方法。
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
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JP2008109198A JP4790750B2 (ja) | 2008-04-18 | 2008-04-18 | 樹脂封止型半導体装置の製造方法 |
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JP2008109198A JP4790750B2 (ja) | 2008-04-18 | 2008-04-18 | 樹脂封止型半導体装置の製造方法 |
Related Parent Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2003019077A Division JP4141270B2 (ja) | 2003-01-28 | 2003-01-28 | 半導体装置の製造方法 |
Publications (2)
Publication Number | Publication Date |
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JP2008182274A JP2008182274A (ja) | 2008-08-07 |
JP4790750B2 true JP4790750B2 (ja) | 2011-10-12 |
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JP2008109198A Expired - Fee Related JP4790750B2 (ja) | 2008-04-18 | 2008-04-18 | 樹脂封止型半導体装置の製造方法 |
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Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2011035142A (ja) * | 2009-07-31 | 2011-02-17 | Sanyo Electric Co Ltd | 回路装置の製造方法 |
JP6477328B2 (ja) * | 2014-09-29 | 2019-03-06 | 日亜化学工業株式会社 | パッケージの製造方法及び発光装置の製造方法、並びにパッケージ及び発光装置 |
Family Cites Families (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH11220087A (ja) * | 1998-02-03 | 1999-08-10 | Hitachi Ltd | リードフレームおよびそれを用いた半導体装置ならびにその製造方法 |
JP2954148B1 (ja) * | 1998-03-25 | 1999-09-27 | 松下電子工業株式会社 | 樹脂封止型半導体装置の製造方法およびその製造装置 |
JP4357754B2 (ja) * | 2000-10-02 | 2009-11-04 | 日東電工株式会社 | 半導体装置の製造方法 |
JP2003001674A (ja) * | 2001-06-26 | 2003-01-08 | Nec Kansai Ltd | 樹脂モールド装置 |
JP3798303B2 (ja) * | 2001-11-27 | 2006-07-19 | 株式会社ルネサステクノロジ | 半導体装置及びその製造方法 |
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