JP4741563B2 - Circuit board - Google Patents

Description

The present invention provides a laminated substrate in which one or more inner conductor layers are formed between ceramic insulating layers, a surface conductor layer formed on the surface of the laminated substrate and electrically connected to the inner conductor layer. an invention which relates to a circuit board having a.

  Conventionally, as a method of manufacturing a circuit board by forming a conductor pattern on the surface of an insulating base material, there has been a manufacturing method as disclosed in Patent Document 1.

The manufacturing method disclosed in Patent Document 1 includes a step of forming an insulating base material having a desired shape, a step of forming a base plating layer made of a conductor (eg, copper) thin film on the surface of the insulating base material, The process of removing the underlying plating layer on the necessary conductor pattern contour by irradiating the laser beam, and the conductive pattern by electroplating the necessary part of the remaining underlying plating layer without being irradiated with the laser beam Forming the process.
Japanese Patent No. 3153682

  However, in the above-described conventional example, since the electroplating power supply conductor layer can be formed only on the surface of the insulating base material, there is a problem that the degree of freedom of the shape and arrangement of the conductor pattern formed on the surface of the insulating base material is low. there were.

The present invention has been made in view of the above circumstances, and its purpose is a circuit in which the degree of freedom of the shape and arrangement of the surface conductor layer formed on the surface of the multilayer substrate is higher than that of the conductor pattern in the conventional example. and to provide a board.

In order to achieve the above object, the invention according to claim 1 is a laminated substrate in which one or more inner layer conductor layers are formed between ceramic insulating layers, and an inner layer conductor layer formed on the surface of the laminate substrate. A circuit board having a surface conductor layer electrically connected to the surface conductor layer, wherein the surface conductor layer is grounded by supplying power through a base plating layer formed on the surface of the multilayer substrate and an inner conductor layer. The electroplating layer is formed on the layer, and at least the base plating layer in the boundary region between the portion of the base plating layer where the electroplating layer is formed and the portion where the electroplating layer is not formed is laser. beam Ri Na is removed by irradiation, further, the first insulating layer on the surface and the first step-like level difference formed by the end face of the second insulating layer laminated on the insulating layer is laminated substrate A first insulating layer provided Wherein the surface or surface conductor layer so as to cover a portion of the inner conductor layer exposed to the end face of the second insulating layer is formed.

The invention of claim 2 is characterized in that, in the invention of claim 1 , the surface conductor layer is formed so as to cover the end face of the inner conductor layer exposed on the same plane as the end face of the second insulating layer.

The invention of claim 3 is the invention of claim 1, the surface conductor layer is formed to cover the portion of the inner conductor layer projecting from the second insulating layer end surface along the first surface of the insulating layer It is characterized by that.

According to a fourth aspect of the invention, in the third aspect of the invention, the third insulating layer laminated on the second insulating layer protrudes from the end face of the second insulating layer and sandwiches the part of the inner conductor layer. It is characterized by facing the first insulating layer in the stacking direction.

According to a fifth aspect of the present invention, in the first aspect of the present invention, the via hole for electrically connecting the plurality of inner layer conductor layers is exposed on the surface of the first insulating layer, and the surface conductor layer is formed so as to cover the end face of the via hole. It is formed.

According to the present invention, the surface conductor layer is formed by performing electroplating on the base plating layer by supplying power through the inner conductor layer formed between the ceramic insulating layers. compared to the conventional example feeding conductor layer can not be formed only on the surface of the insulating substrate, providing a circuit board in which the degree of freedom is high in the shape and arrangement of the surface conductor layer formed on the surface of the laminated substrate it can.

  Hereinafter, the present invention will be described in detail with reference to the drawings.

As shown in FIG. 1, the circuit board 1 according to the present embodiment fires a laminated body in which a green sheet made of ceramics, on which a conductive paste is printed and applied in a predetermined pattern, is fired, thereby insulating layers 3 ₁ to 3 made of ceramics. _A multilayer substrate 2 in which a plurality of inner layer conductor layers 4 ₁ to 4 ₃ are formed between 4 and an electrical connection to the inner layer conductor layers 4 ₁ to 4 ₃ formed on the surface of the multilayer substrate 2 via via holes 5. The surface conductor layer 6 is provided. In the present embodiment, the laminated substrate 2 is divided into a plurality of circuit boards 10 from a single circuit board 1 by dividing the laminated board 2 vertically and horizontally in the thickness direction. A plurality of dividing grooves 7 are formed vertically and horizontally. Further, in a portion corresponding to each circuit board 10,..., A substantially circular recess 11 is provided when viewed from the thickness direction (vertical direction in FIG. 1). The recess 11 has a depth penetrating through a plurality of layers (two layers in the illustrated example) of insulating layers 3 ₃ and 3 ₄ , and the surface of the insulating layer 3 ₂ is exposed on the bottom surface. However, in the present embodiment, the plurality of circuit boards 10 formed by dividing the circuit board 1 are the same, but the plurality of circuit boards 10 do not have to be the same, for example, all May be circuit boards 10 having different structures.

Here, in order to simplify the description, each of the insulating layers 3 _{1 to} 3 _{4 is referred} to as a first insulating layer 3 ₁ , a second insulating layer 3 ₂ , a third insulating layer 3 ₃ , and a fourth insulating layer 3 ₄ . The inner conductor layer 4 ₁ between the first insulating layer 3 ₁ and the second insulating layer 3 ₂ is the first inner conductor layer, and the inner conductor layer 4 ₂ between the second insulating layer 3 ₂ and the third insulating layer 3 _3. Is referred to as a second inner layer conductor layer, and the inner layer conductor layer 4 ₃ between the third insulating layer 3 ₃ and the fourth insulating layer 3 ₄ is referred to as a third inner layer conductor layer.

The laminated substrate 2 having the structure as described above is manufactured by the following method. That is, a laminate is formed by laminating four layers of ceramic green sheets filled with a conductive paste in via holes 5 formed by printing and applying a conductive paste in a predetermined pattern, and further, front and back of the laminate. After forming the dividing grooves 7 on both surfaces, the laminated substrate 2 is formed by firing the laminated body. However, the two green sheets to be the third insulating layer 3 _{3 and} the fourth insulating layer 3 ₄ have circular holes for the recesses 11 arranged in advance vertically and horizontally before lamination, and the laminate is fired. In the laminated substrate 2 formed in this manner, the recesses 11 are provided for each of the regions delimited by the grooves 7. Here, on the inner wall surface of the recess 11, an exposed portion formed by exposing the end surface of the inner conductor layer 4 and the end portion of the via hole 5 is provided on the surface of the insulating layer 3. In addition, the hole for the recess 11 does not necessarily need to be a round hole, and may be a polygonal shape.

Each of the first insulating layer 3 ₁ , the second insulating layer 3 ₂ , the third insulating layer 3 ₃ , and the fourth insulating layer 3 ₄ described above is formed of a single-layer green sheet composed of only one green sheet. It may be formed by a multilayer green sheet in which a plurality of green sheets are laminated. Furthermore, when performing press molding the green sheet, each of the single-layer green sheets and multiple layer green sheet after press forming, the first insulating layer 3 _first to fourth insulating layer 3 ₄ laminating these A laminate may be formed, and thereafter, the laminate may be further press-molded. Alternatively, by laminating a single-layer green sheets and multiple layer green sheet, after forming a laminate of a first insulating layer 3 _first to fourth insulating layer 3 _4, the laminate may be press-molded. In addition, such press molding is performed in order to temporarily press-bond green sheets to each other until sintering integration, or to make the laminated body have a predetermined thickness.

Next, the surface of the multilayer substrate 2, that is, the surfaces of the first insulating layer 3 _{1 and} the fourth insulating layer 3 ₄ and the inner wall surface of the recess 11 (the third insulating layer 3 ₃ forming the side wall of the recess 11 and the second 4 second insulating layer 3 ₂ of the surface forming the bottom wall of the end face and the recess 11 of the insulating layer 3 _4), forming the surface conductor layer 6 of the exposed portion and electrically connected to a predetermined shape (pattern) How to do will be described.

  First, a base plating layer made of a conductive thin film is formed on the entire surface of the multilayer substrate 2 by performing electroless plating, CVD, sputtering, or the like. Then, by irradiating the surface of the multilayer substrate 2 with a laser beam, the underlying plating layer at the irradiated portion is removed. Such a laser beam is irradiated while moving on the surface of the multilayer substrate 2 along the contour of the surface conductor layer 6 by scanning with a galvanometer mirror or the like, and a portion of the underlying plating layer that matches the pattern of the surface conductor layer 6 (Hereinafter referred to as “underlying layer”.) The underlying plating layer in the boundary region between 6a and the portion not matching the pattern of the surface conductor layer 6 is removed. Accordingly, the surface of the multilayer substrate 2 is irradiated with a laser beam on the inner plating layer (underlayer matching the pattern of the surface conductor layer 6) 6a and only the portion along the contour of the underlayer 6a is a laser beam. A base plating layer (not shown) removed by irradiation remains. However, in the case where the interval between the adjacent surface conductor layers 6 is narrow, it is possible to remove not only the contour portion but also the entire underlying plating layer between the surface conductor layers 6 by laser beam irradiation as described above.

Subsequently, the surface conductor layer 6 is formed by thickening a plating layer 6b such as copper on the underlayer 6a corresponding to the pattern of the surface conductor layer 6 by electroplating, and unnecessary undercoat other than the underlayer 6a is formed. If the layer is removed by etching, the laminated substrate 2 in which a desired circuit is formed by the _first to third inner conductor layers 4 ₁ to 4 ₃ and the surface conductor layer 6, that is, the circuit substrate 1 can be manufactured. Here, in order to perform electroplating to form the plating layer 6b, it is necessary to supply power while the base layer 6a is connected to the cathode of the DC power source and the laminated substrate 2 is immersed in the electroplating bath. The first to third inner conductor layers 4 ₁ to 4 ₃ of the substrate 2 are used as power feeding paths. Therefore, a rectangular frame formed on the peripheral edge of the multilayer substrate 2 by providing power supply via holes 5 a electrically connected to the _first to third inner conductor layers 4 ₁ to 4 ₃ at both longitudinal ends of the multilayer substrate 2. The cathode of the DC power supply is connected to the power feeding surface conductor layer 8 so that power is supplied from the power feeding surface conductor layer 8 to the base layer 6a through the via hole 5a and the first to third inner conductor layers 4 ₁ to 4 _3. I have to. Therefore, electroplating is performed by supplying power to the base layer 6a through the _first to _third inner conductor layers 4 ₁ to 4 ₃ formed between the _first to fourth insulating layers 3 _{1 to} 3 ₄ , Since the surface conductor layer 6 is formed by thickening the plating layer 6b, compared to the conventional example in which the electroplating power supply conductor layer can be formed only on the surface of the insulating base material, There is an advantage that the degree of freedom of the shape and arrangement of the surface conductor layer 6 to be formed is increased. In particular, in this embodiment, the dividing grooves 7 are formed vertically and horizontally on the surface of the multilayer substrate 2, so that power is supplied to the surface of the multilayer substrate 2 from the portions of the circuit substrates 10,. Although the surface conductor layer cannot be routed and the degree of freedom of the wiring is reduced, the surface conductor layer 6 can be obtained by using the _first to _third inner layer conductor layers 4 ₁ to 4 ₃ as the feeding path as described above. The degree of freedom of shape and arrangement is improved.

And if the circuit board 1 comprised as mentioned above is parted by the part of the groove | channel 7, the several same circuit board 10, ... can be obtained. In the present embodiment, it extends out surface conductors from the side wall surface of the exposed portion and electrically connected to the recess 11 of the via hole 5 to be exposed to the fourth insulating layer 3 _fourth surface, as shown in FIG. 1 to the bottom wall surface layer 6 and, via holes in the third inner conductor layer 4 ₃ of the exposed portion and electrically connected to the surface conductor layer 6, the bottom wall surface and the first insulating layer 3 ₁ of the surface of the recess 11 in the side wall surface of the recess 11 The surface conductor layers 6 and the like electrically connected to the exposed portions 5 are formed, and the structure of these surface conductor layers 6 will be described in detail below.

2 and the fourth insulating layer 3 ₄ as shown in (a) third inner conductor layer 4 ₃ 3 sandwiched between the insulating layer 3 _3, the exposed portion is provided to be exposed on the side wall surface of the recess 11 There, the sidewall surface of the recess 11 including the third exposure portion of the inner conductor layer 4 _3, the surface conductor layer 6 of a rectangular shape as viewed in plan when viewed from the normal direction of the side wall is provided. Also, FIG. 2 is the bottom wall surface of the recess 11 as shown in (b) Yes with exposed portions provided comprising exposing the ends of the via hole 5, second internal conductor layer 4 ₂ and is electrically connected On the bottom wall surface of the recess 11 including the exposed portion of the via hole 5, the surface conductor layer 6 having a substantially circular shape in plan view when viewed from the normal direction of the bottom wall surface is provided. In this way, an exposed portion is formed by exposing the end surface of the conductor layer 4 or the via hole 5 on the end surface of the insulating layer 3 (the side wall surface or the bottom wall surface of the recess 11), and the surface conductor layer 6 is formed so as to cover the exposed portion. If the structure is formed and electrically connected to the exposed portions of the conductor layer 4 and the via hole 5, the removal of the base plating layer by the laser beam irradiation can be performed only on the surface parallel to the side wall surface and the bottom wall surface. There is an advantage that the circuit formation inside becomes easy.

Further, as shown in FIG. 3, there is provided an exposed portion in which a part of the second inner conductor layer 4 ₂ is exposed along the bottom wall surface of the recess 11 (the surface of the second insulating layer 3 ₂ ). surface conductor layer 6 as from the side wall surface to cover the second exposed portion of the inner conductor layer 4 ₂ place 11 is provided. In this case, although the removal of base plating layer is irradiated with a slightly larger laser beam than the contour of the second inner conductor layer 4 ₂ of the exposed portion in the side wall surface and the bottom wall surface of the recess 11, the side of the recess 11 wall may be irradiated with a laser beam on the side wall surface of the recess 11 for the boundary portion (the third insulating layer 3 end surfaces of ₃₎ and the second inner conductor layer 4 ₂ of the exposed portion, the second inner conductor layer 4 ₂ There is an advantage that it is not necessary to irradiate the (exposed portion) with a laser beam.

Here, to be larger than the diameter of the round hole providing a diameter of the round holes provided in the third insulating layer 3 ₃ in the fourth insulating layer 3 _4, the fourth insulating layer 3 ₄ 4 3 if a structure that faces the second insulating layer 3 ₂ to the stacking direction across the second internal conductor layer 4 ₂ projecting from the end surface of the third insulating layer 3 ₃ and protrudes from the end face of the insulating layer 3 _3, sputtering when forming the lower plating layer by a method having a directivity in the film formation, the fourth portion covered by an insulating layer 3 ₄ among the second inner conductor layer 4 ₂ of the exposed portion thin film formed as Not. Therefore, it is not necessary to irradiate the laser beam on the side wall surface of the recess 11 so that the structure shown in FIG. 3, 4 are covered with the insulating layer 3 ₄ among the second inner conductor layer 4 ₂ of the exposed portion It is possible to form the surface conductor layer 6 that covers only the non-existing portion and is electrically connected. In the present embodiment, the case where the surface conductor layer 6 is formed so as to cover the exposed portion of the inner layer conductor layer 4 exposed on the side wall surface and the bottom wall surface of the recess 11 has been described. As described above, the surface conductor layer 6 can be formed so as to cover the exposed portion of the inner conductor layer 4 exposed on the side surface of the step (the side wall surface of the recess 11) and the surface (the bottom wall surface of the recess 11). .

Here, the laminated substrate 2 has been exemplified in which each insulating layer 3 is composed of one green sheet, but the laminated substrate 2 is composed of each insulating layer 3 by laminating a plurality of green sheets. It doesn't matter. For example, although illustrated a state in which the third insulating layer 3 ₃ is composed of one layer (a single green sheet) in FIG. 4 (b), the third insulating layer 3 ₃ is a plurality Green The laminated substrate 2 may be configured by laminating sheets.

  By the way, according to the method of forming the via hole 5 by irradiating the laminated body obtained by firing the laminated green sheets with the laser beam, the circuit board 1 is compared with the method of forming the via hole 5 in the green sheet before lamination. There is an advantage that the wiring pattern can be easily changed and the degree of freedom of circuit formation is increased.

FIG. 5 (b) to form a surface conductor layer ₆₁ on the side wall surface of the conical recess 11 as shown in (c), the second inner conductor layer exposed at the bottom wall of the recess 11 4 ₂ when forming the surface conductor layer 6 ₂ covering the exposed portion of the third inner conductor layer 4 ₃ through one surface conductive layer 6 ₁ of the base layer exposed portion is provided on the side wall surface of the recess 11 ( the feeding for surface conductive layer ₈₁ to power not shown) to one end of the laminated substrate 2, the feeding surface conductor layer ₈₂ for supplying power to the base layer on the other surface conductor layer 6 ₂ (not shown) What is necessary is just to electroplate separately by providing in the other end side of the multilayer substrate 2, and supplying electric power to each of the surface conductor layers 8 ₁ and 8 ₂ for electric power feeding. For example, mounting the light emitting diode chip on the surface conductor layer 6 _{and second} bottom wall surface (not shown), in the case of a reflective surface of the light emitting surface conductor layer ₆₁ of the side wall surface from the light emitting diode chip, power supply By supplying power to the surface conductor 8 ₂ for use, the surface layer 6 ₂ is formed by thickening a gold plating for mounting on the base layer 6 a, and separately supplying power to the surface conductor 8 ₁ for supplying power to the base layer 6 a it is possible to form the surface conductive layer 6 ₁ of silver-plated thickening to.

  Further, as shown in FIG. 6, an exposed portion formed by exposing the end surface of the inner layer conductor layer 4 is provided on the end surface of the circuit board 1, and the power supply surface conductor layer electrically connected to the exposed portion of the inner layer conductor layer 4. If 8 is formed on the end face of the circuit board 1, there is an advantage that it is not necessary to provide the via hole 5a for feeding.

1A and 1B show an embodiment of the present invention, in which FIG. 1A is a perspective view of a circuit board, and FIG. It is a principal part perspective view of the circuit board in the same as the above. It is a principal part perspective view of the circuit board in the same as the above. (A) is a principal part perspective view of the circuit board same as the above, (b) It is principal part sectional drawing of the circuit board same as the above. 2A and 2B show another embodiment of the present invention, in which FIG. 1A is a perspective view of a circuit board, FIG. 1B is a perspective view of main parts of the circuit board, and FIG. It is a perspective view of the circuit board which shows other embodiment of this invention.

Explanation of symbols

1 circuit board 2 laminated substrate 3 ₁ to 3 ₄ first insulating layer to the fourth insulating layer ₄₁ to ₃ first internal conductor layer through the third inner conductor layer 5 via hole 6 surface conductor layer 7 groove 10 the circuit board 11 recess

Claims (5)

A circuit board having a laminated substrate in which one or a plurality of inner layer conductor layers are formed between ceramic insulating layers, and a surface conductor layer formed on the surface of the laminated substrate and electrically connected to the inner layer conductor layer Because
The surface conductor layer is composed of a base plating layer formed on the surface of the multilayer substrate and an electroplating layer formed on the base plating layer by supplying power through the inner conductor layer. At least the base plating layer in the boundary region between the portion where the electroplating layer is formed and the portion where the electroplating layer is not formed is removed by laser beam irradiation, and the surface of the first insulating layer A stepped step formed between the end surface of the second insulating layer stacked on the first insulating layer is provided on the stacked substrate, and is exposed on the surface of the first insulating layer or the end surface of the second insulating layer. A circuit board, wherein a surface conductor layer is formed so as to cover a part of the inner conductor layer.   2. The circuit board according to claim 1, wherein the surface conductor layer is formed so as to cover the end face of the inner conductor layer exposed on the same plane as the end face of the second insulating layer.   2. The circuit board according to claim 1, wherein the surface conductor layer is formed so as to cover the part of the inner conductor layer protruding from the end face of the second insulating layer along the surface of the first insulating layer.   The third insulating layer stacked on the second insulating layer protrudes from the end surface of the second insulating layer and faces the first insulating layer with respect to the stacking direction with the part of the inner conductor layer interposed therebetween. The circuit board according to claim 3. 2. The circuit according to claim 1, wherein a via hole for electrically connecting a plurality of inner layer conductor layers is exposed on a surface of the first insulating layer, and a surface conductor layer is formed so as to cover an end face of the via hole. Board .

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