JP2006307253A - Implement for electroplating and electroplating method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an implement for electroplating which can be recycled when a plurality of wafers each having the same size and the same shape are electroplated, which is easily adaptive to a change in the size or the like of the wafer and can uniformize the current density on one surface of the wafer to be electroplated to the utmost. <P>SOLUTION: The implement for electroplating is a multilayer substrate 12 formed by layering substrates 12a, 12b, 12c and having metallic layers formed on both surfaces. In a wafer housing hole 14 formed in the multilayer substrate 12, a flange part 16 projected inward along the inside wall surface of the wafer housing hole14 is formed so that, when the wafer is housed in the wafer housing hole 14, the flange part 16 abuts on one surface side on the peripheral part of which a bus line for electroplating the wafer is formed and thus supports the wafer, and each of a plurality of pads 18 formed on one surface side of the flange part 16 and abutted on the electroplating bus line is electrically connected to the metallic layers forming both surfaces of the multilayer substrate 12. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to an electrolytic plating jig and an electrolytic plating method. More specifically, the present invention relates to an electroplating jig and an electroplating method for accommodating a wafer in which an electroplating bus line is provided at the peripheral edge on one side where electroplating is performed and performing electroplating.

At the time of manufacturing a semiconductor device, a plurality of semiconductor devices are formed on one surface side of the wafer, and finally the wafer is cut and separated into individual semiconductor devices.
In such a manufacturing process, it is necessary to apply electrolytic plating to a predetermined portion on one surface side of the wafer in order to form a wiring pattern or the like. An electroplating bus line for supplying power to is provided.
When electrolytic plating is performed on one side of such a wafer, for example, a jig for electrolytic plating proposed in Patent Document 1 below can be used.
Such an electroplating jig is shown in FIGS. 7 and 8, the electroplating jig 100 has a wafer 106 sandwiched between a film-like surface covering material 102 and a back surface covering material 104 made of a resin. An opening 103 (FIG. 8) is formed in the surface covering material 102 so as to be exposed.
Further, a conductor 108 is disposed along the outer peripheral edge of the wafer 106 between the front surface covering material 102 and the back surface covering material 104, and the conductor 108 includes a bus line for electrolytic plating of the wafer 106. Connected electrodes 110, 110... Are formed along the outer peripheral edge of the wafer 106.
The conductor 108 is led out as a lead wire 114 from one place of the electrolytic plating jig 100 and connected to one of the electrolytic plating electrodes.
7 and 8, the rectangular surface covering material 102 and the back surface covering material 104 constituting the electrolytic plating jig 100 are formed with notches 112, 112,.

7 and 8 in which the wafer 106 is accommodated, as shown in FIG. 9, the electrolytic plating solution stored in the electrolytic plating tank 200 in which the anode electrodes 206 and 206 are disposed, as shown in FIG. It is possible to apply electrolytic plating to a predetermined portion of the wafer 106 which is immersed in 202 and exposed from the opening 103 of the surface covering material 102.
At this time, the electrolytic plating jig 100 is engaged with the support bar 204 provided in the electrolytic plating bath 200 at each of the notches 112, 112. It is positioned. The lead wire 114 drawn out from the electrolytic plating jig 100 is connected to the cathode electrode.
After electrolytic plating is performed on a predetermined portion on one surface side of the wafer 106, the electrolytic plating jig 100 is taken out, and the surface coating material 102 and the back surface coating material 104 are cut with a cutter knife or the like to perform electrolytic plating. 106 can be removed.
In the electroplating bath 200 shown in FIG. 9, a gas is jetted from an air diffuser pipe 208 provided on the bottom surface of the electroplating tank 200 to generate a liquid flow parallel to the electroplating jig 100.
JP-A-8-311689 (Claims, FIGS. 1 and 2)

According to the electrolytic plating jig 100 shown in FIGS. 7 and 8, the wafer 106 can be accommodated in the electrolytic plating jig 100, and the electrolytically plated wafer 106 can be easily taken out from the electrolytic plating jig 100. Can do.
Furthermore, even if the size of the wafer 106 or the shape of the orientation flat is changed, the corresponding electrolytic plating jig 100 can be easily formed.
However, in the electroplating jig 100 shown in FIGS. 7 and 8, since the surface covering material 102 and the back surface covering material 104 are cut with a cutter knife or the like after the electroplating is finished, the wafer 106 is taken out. Even when electrolytic plating is performed on a plurality of wafers having an outer shape, the electrolytic plating jig 100 cannot be reused, and it is necessary to form the electrolytic plating jig 100 for each wafer.
In addition, the conductor 108 disposed along the periphery of the wafer 106 and supplying power to the electrolytic plating bus line of the wafer 106 is led out from one place of the electrolytic plating jig 100 as a lead wire 114. .
For this reason, the current density is concentrated at a predetermined location on the wafer 106 close to the connection location with the lead wire 114, and the plating film in the region where the current density is concentrated becomes thicker than the plating coating in the other plating regions. There is a possibility that variations may occur in the thickness of the plating film formed on one side of 106.
Therefore, the subject of the present invention is reusable when electrolytic plating is performed on a plurality of wafers having the same size and shape, and on the other hand, even if the size of the wafer is changed, An object of the present invention is to provide an electroplating jig and an electroplating method that can make the current density on one side of the wafer subjected to electroplating as uniform as possible.

As a result of repeated studies to solve the above problems, the present inventors have laminated a plurality of double-sided metal foil substrates in which both surfaces of the resin layer are formed of metal foil, and a multilayer in which both surfaces are formed of metal foil. The inventors have found that a reusable electrolytic plating jig can be easily formed by using the substrate as an electrolytic plating jig, and the present invention has been achieved.
That is, the present invention relates to an electroplating jig for accommodating an electroplating by accommodating a wafer provided with an electroplating bus line at the periphery on one side where electroplating is performed, and the electroplating jig includes: A multilayer substrate formed by laminating a plurality of substrates and having both sides made of a metal layer, and the wafer accommodating hole formed in the multilayer substrate, when the wafer is accommodated in the wafer accommodating hole, A flange that protrudes inwardly along the inner wall surface of the wafer receiving hole is formed so as to abut against the one surface side of the peripheral edge where the bus line for electrolytic plating of the wafer is formed to support the wafer, and Each of the plurality of pads formed on one surface side of the flange and contacting the electrolytic plating bus line is electrically connected to a metal layer forming both surfaces of the multilayer substrate. There is the solution plating jig.
Further, the present invention provides an electrolytic plating formed on the peripheral edge of one surface side where the electrolytic plating is performed when the above-mentioned electroplating jig is used to perform electrolytic plating on a predetermined portion on one surface side of the wafer. After the plating bus line is inserted into the wafer accommodation hole so as to abut each of the pads formed in the flanges in the wafer accommodation hole of the electrolytic plating jig, the other surface side of the wafer is The entire surface on one surface side of the electroplating jig is covered with a film, the entire other surface side of the electroplating jig is covered with a resin layer, and then a predetermined portion on the one surface side where the electroplating of the wafer is performed The resin layer is patterned so as to be exposed, and then plated on at least one of the metal layers forming both surfaces of the multilayer substrate of the jig for electrolytic plating immersed in a plating solution in an electrolytic plating tank. Connect one pole, is also a electroless plating method characterized by electrolytic plating a predetermined portion of the wafer.

In the present invention, as the multilayer substrate, a multilayer substrate formed by laminating a plurality of double-sided metal foil substrates in which both surfaces of the resin layer are formed of metal foils into a multilayer by an adhesive layer can be suitably used.
Furthermore, by forming the collar on one of the substrates forming the multilayer substrate, a plurality of pads that contact the electrolytic plating bus line of the wafer can be easily formed on one surface of the collar.
The current density of each pad can be adjusted by forming a laminated surface of the substrate on which the flange is formed with another substrate by a metal layer electrically connected to each pad formed on one surface of the flange. It can be made as uniform as possible.
By electrically connecting a plurality of pads formed on one surface side of the buttock and a metal layer forming both surfaces of the multilayer substrate by a via and a metal layer formed between the substrates, the current density of each pad can be reduced. Further, it can be made uniform, which is preferable.
Further, by forming a plurality of wafer accommodation holes in the multilayer substrate and forming a flange projecting inward in each of the wafer accommodation holes, a plurality of wafers can be subjected to electrolytic plating simultaneously. .
By forming a slit between the wafer accommodation holes of the multilayer substrate, damage to the wafer accommodated in the wafer accommodation hole can be avoided even if the multilayer substrate is bent slightly.
In addition, by using a resin layer made of a photosensitive resin layer as a resin layer covering the entire other surface side of the electroplating jig, the resin layer covering the entire other surface side of the electroplating jig is used. Then, patterning can be easily performed so as to expose a predetermined portion on one side where the electrolytic plating of the wafer is performed.

In the jig for electrolytic plating according to the present invention, a wafer accommodation hole for accommodating a wafer is formed in a multilayer substrate formed by laminating a plurality of substrates and having both surfaces made of a metal layer. For this reason, when electrolytic plating is performed on wafers having the same size and shape, the electrolytic plating jig can be reused.
On the other hand, when the wafer to be subjected to electrolytic plating is different from the size or shape of the wafer that can be accommodated in the wafer accommodation hole, the wafer accommodation hole that can accommodate the wafer to be subjected to electrolytic plating is formed in the multilayer substrate. It is possible to easily form an electroplating jig corresponding to different wafers.
In addition, the inwardly protruding flange formed in the wafer accommodation hole of the multilayer substrate abuts the wafer accommodated in the wafer accommodation hole on the one surface side where the electrolytic plating bus line is formed on the periphery. To support. A plurality of pads that contact the electrolytic plating bus line of the wafer are formed on one surface side of the flange, and each pad is electrically connected to a metal layer that forms both surfaces of the multilayer substrate.
In this way, since each of the plurality of pads that contact the bus line for electrolytic plating of the wafer is electrically connected to the metal layers forming both surfaces of the multilayer substrate, the current density of each pad can be made constant, The current density at a predetermined location where the wafer is electroplated can also be made constant.
In addition, by performing electrolytic plating on a predetermined portion on one side of the wafer using the electrolytic plating jig according to the present invention, the current density at the predetermined portion where the electrolytic plating of the wafer is performed can be made constant. The thickness etc. of the electroplating layer formed in the predetermined location of the one surface side can be made constant.

An example of a jig for electrolytic plating according to the present invention is shown in FIG. The electrolytic plating jig 10 shown in FIG. 1 includes three double-sided metal foil substrates 12a, 12b, and 12c (hereinafter simply referred to as substrates 12a, 12b, and 12c) in which both surfaces of a resin layer are formed of copper foil as a metal foil. The multilayer substrate 12 is formed of a copper layer as a metal layer.
A wafer accommodation hole 14 for accommodating a wafer to be subjected to electrolytic plating is formed in the central portion of the multilayer substrate 12. As shown in FIG. 2, the wafer accommodation hole 14 includes a first accommodation hole 14a formed following the outer shape of the wafer to be accommodated, and a second accommodation hole 14b having an opening area smaller than that of the first accommodation hole 14a. Consists of. The second accommodation hole 14b is formed in the substrate 12c, and a flange 16 protruding inward of the wafer accommodation hole 14 is formed by the substrate 12c.
The flat portion 14f formed in the wafer accommodation hole 14 is formed following the shape of the orientation flat of the wafer.
Pads 18, 18... That come into contact with the electrolytic plating bus line formed on the peripheral edge of one surface of the wafer to be inserted are provided on the wafer insertion side of the flange portion 16 protruding inward of the wafer accommodation hole 14. It is formed intermittently in the circumferential direction of the flange 16. The space between the pads 18 and 18 is formed on the resin surface 20 where the resin is exposed.
Each of the pads 18, 18... Is electrically connected to a copper layer as a metal layer that forms both surfaces of the multilayer substrate 12.

FIG. 2A shows a partial cross-sectional view of the electrolytic plating jig 10 on which the pad 18 is formed. As shown in FIG. 2A, the substrates 12a, 12b. 12c, both surfaces of the resin layer 11b are formed of copper foils 11a and 11c, and the substrates 12a, 12b. Each substrate 12c is joined by the prepreg 13.
The substrate 12c is provided with a flange portion 16, and the pad 18 formed on the insertion side surface (inner surface) of the wafer of the flange portion 16 is a part of the copper foil 11a on the bonding surface side of the substrate 12c with the substrate 12b. The part is extended and formed.
The copper foil 11a of the substrate 12b is electrically connected to the copper foils 11a and 11b forming both surfaces of the multilayer substrate 12 by vias 22 provided between the pad 18 and the outer peripheral surface of the multilayer substrate 12. .

On the outer surface side of the flange portion 16, the copper foil 11c is removed and the resin layer 11b is exposed. In the portion where the pad 18 of the flange portion 16 is formed, the inner surface side and the outer surface side are different. As shown by the alternate long and short dash line in FIG. 2A, the wafer accommodating hole 14 may be warped in the inward direction. When this warpage exists, when the wafer is accommodated in the wafer accommodation hole 14 and the wafer is pressed against the pad 18, the flange portion 16 is pushed back to the opposite side (outer surface side) by the pressing force, and one surface of the wafer The connection between the electroplating bus line formed on the peripheral edge of the side and the pad 18 can be sufficiently performed.
FIG. 2B shows a partial cross-sectional view of the electrolytic plating jig 10 in which the resin surface 20 between the pads 18 and 18 is formed. The flange portion 16 formed on the resin surface 20 is also extended from the substrate 12 c, and the resin surface 20 is formed by the prepreg 13.

The electrolytic plating jig 10 shown in FIGS. 1 and 2 can be manufactured by the process shown in FIG. First, as shown in FIG. 3A, double-sided metal foil substrates 12a, 12b, and 12c, in which both surfaces of a resin layer 11b are formed of copper foils 11a and 11c, are laminated by thermocompression bonding via a prepreg 13.
Among the substrates 12a, 12b, and 12c, the copper foil 11a that forms one surface side of the substrate 12c has a surface of the resin layer 11b following the shape of the wafer to be electroplated, as shown in FIG. Pads 18, 18... With copper foil 11 a extending are formed at portions that are exposed and that form the flanges 16 (portions surrounded by a one-dot chain line and a solid line).
Further, as shown in FIG. 4B, the surface of the resin layer 11b is exposed on the copper foil 11c forming the other surface side of the substrate 12c, following the shape of the wafer to be subjected to electrolytic plating.
The patterning on both sides of the substrate 12c is performed by exposing and developing a photosensitive resin layer formed by coating on both sides of the substrate 12c, and then immersing the substrate 12c in an etching solution so that predetermined portions of the copper foils 11a and 11c are formed. Can be performed by etching.

The substrates 12a, 12b, and 12c shown in FIGS. 3A and 4 are stacked via the prepreg 13 and heat-pressed. FIG. 3 (b) shows the state after thermocompression bonding.
As shown in FIG. 3B, the prepreg 13 is filled in the portion of the substrate 12c where the copper foil 11a is removed by etching.
Next, as shown in FIG. 3C, a via 22 is formed between the pad 18 and the outer peripheral surface of the multilayer substrate 12. The via 22 can be formed by filling a conductive resin in a through hole 21 formed by drilling or the like at a predetermined position of the multilayer substrate 12 or filling a metal by plating.
Thereafter, as shown in FIG. 3D, in order to form the wafer accommodation holes 14 in the multilayer substrate 12, first, a predetermined portion of the substrates 12a and 12b is ground by a router according to the outer shape of the wafer to be accommodated. 1 accommodation hole 14a is formed. At this time, the grinding process by the router is finished when the surface of the pad 18 formed on the substrate 12c is exposed. Thus, at the time of forming the first accommodation hole 14a, a part of the prepreg 13 remains in the portion of the substrate c where the copper foil 11a is removed by etching.
Further, the substrate 12c is ground from the copper foil 11c side by a router to form the second accommodation hole 14b, whereby the electrolytic plating jig 10 shown in FIGS. 1 and 2 can be obtained.
In addition, it can replace with the double-sided metal foil board | substrate 12a as the board | substrate 12a, and can use the single-sided metal foil board | substrate in which only the copper foil 11a is formed, and it replaces with the double-sided metal foil board | substrate 12b also as a board | substrate 12b. A resin substrate made only of the layer 11b can be used.

When electrolytic plating is performed on one side of a wafer using the electrolytic plating jig 10 shown in FIGS. 1 and 2, the wafer receiving holes 14 formed in the multilayer substrate 12 are formed as shown in FIG. The wafer 24 is accommodated in the first accommodation hole 14a. At this time, the wafer 24 is inserted into the first accommodation hole 14a so that the electroplating bus line formed on the peripheral edge of the one surface and the pad 18 of the flange 16 come into contact with each other.
Further, the other surface of the wafer 24 not subjected to electrolytic plating and the entire surface of the one surface of the multilayer substrate 12 are covered with the protective film 26, and the one surface of the wafer 24 exposed from the second housing hole 14 b of the wafer housing hole 14 and the multilayer. The entire other surface of the substrate 12 is covered with a photosensitive dry film 28. As the protective film 26, by using an adhesive tape, it can be easily crimped to the entire other surface side of the wafer 24 and the entire one surface side of the multilayer substrate 12 by a normal crimping apparatus. The photosensitive dry film 28 can also be pressure-bonded to the entire surface of the one surface side of the wafer 24 and the other surface side of the multilayer substrate 12 by a normal pressure bonding apparatus.

Next, the photosensitive dry film 28 is exposed to light and developed to expose only the electrolytic plating surface 24a including a predetermined portion of the wafer 24 to be subjected to electrolytic plating, as shown in FIG. 5B.
The remaining dry film 28 serves as a protective film for protecting a power feeding portion such as an electrolytic plating bus line formed on the periphery of the wafer 24.
Thereafter, the electrolytic plating jig 10 in which the wafer 24 is accommodated in the wafer accommodating hole 14 as shown in FIG. 5A is immersed in the electrolytic plating solution in the electrolytic plating tank 200 shown in FIG. . In this electrolytic plating, since only the electrolytic plating surface 24 a of the wafer 24 is exposed, the electrolytic plating can be performed only on a predetermined portion of the electrolytic plating surface 24, and the electrolysis covered with the protective film 26 and the dry film 28 is performed. Electroplating can be prevented from being applied to the periphery of the plating jig 10 and the wafer 24.

After the predetermined electrolytic plating is completed, the electrolytic plating jig 10 is taken out from the electrolytic plating tank 200, and the protective film 26 and the dry film 28 are physically or chemically peeled off, whereby electrolytic plating is applied to predetermined locations. The wafer 24 can be taken out.
The electrolytic plating jig 10 from which the wafer 24 has been taken out can be reused by accommodating the wafer 24 in the wafer accommodation hole 14 again after performing simple cleaning.
Further, the electrolytic plating bus line of the wafer 24 accommodated in the electrolytic plating jig 10 was formed on the flange portion 16 through the metal foils 11 a and 11 c and the vias 22 forming the electrolytic plating jig 10. Power is supplied from the pads 18, 18. Since the pads 18, 18... Are extended from the metal foil 11a forming the substrate 12c, they can contact the electrolytic plating bus line with an average current density. As a result, the portion of the wafer 24 to be subjected to electrolytic plating can have a uniform current density, and a uniform electrolytic plating film can be formed.
By the way, when electrolytic plating is performed on the wafers 24 having different sizes, shapes, etc., it is necessary to form a new electrolytic plating jig 10. The electrolytic plating jig 10 includes three double-sided metal foil substrates 12 a. , 12b, and 12c are extremely simple. For this reason, the electrolytic plating jig 10 that can accommodate the wafers 24 having different sizes, shapes, and the like can be easily formed.
Here, the side surface of the multilayer substrate 12 constituting the electrolytic plating jig 10 is exposed, and the plated metal adheres to the end surfaces of the copper foils 11a and 11c during the electrolytic plating, but the copper foils 11a and 11c Since the thickness is extremely thin, the amount of deposited plating metal is extremely small, which is not a problem.
However, the side surface of the multilayer substrate 12 may be covered with an insulating film such as a resin film to prevent the plating metal from adhering to the side surface.

In the electrolytic plating jig 10 shown in FIGS. 1 to 5, a single wafer accommodation hole 14 is formed in the multilayer substrate 12, but a plurality of wafers are accommodated in the multilayer substrate 12 as shown in FIG. 6. The holes 14, 14... May be formed. According to the electrolytic plating jig 10 shown in FIG. 6, electrolytic plating can be performed on a plurality of wafers 24 at the same time, and the electrolytic plating can be made efficient.
As described above, the multilayer substrate 12 in which the plurality of wafer receiving holes 14, 14,... The distortion due to the bending of the multilayer substrate 12 is applied to the wafer 24 accommodated in the wafer accommodation hole 14, and the fragile wafer 24 may be damaged.
For this reason, as shown in FIG. 6, it is effective to form a linear slit 30 between the wafer accommodation holes 14. That is, in the multilayer substrate 12 shown in FIG. 6, since distortion caused by the bending can be absorbed by deformation of the slit 30, distortion applied to the wafer 24 accommodated in the wafer accommodation hole 14 can be reduced as much as possible. The risk of damage to the wafer 24 can be eliminated.
The slit 30 may be a wavy slit or a dashed slit in addition to the linear slit.

It is a perspective view which shows an example of the jig | tool for electrolytic plating which concerns on this invention. It is a fragmentary sectional view of the jig for electroplating shown in FIG. It is explanatory drawing explaining the manufacturing process of the jig | tool for electrolytic plating shown in FIG. It is the front view and back view explaining the board | substrate 12c shown to Fig.3 (a). It is explanatory drawing explaining the process of accommodating a wafer in the jig | tool for electrolytic plating shown in FIG.1 and FIG.2. It is a front view which shows the other example of the jig | tool for electrolytic plating which concerns on this invention. It is a perspective view explaining the jig | tool for conventional electroplating. It is a fragmentary sectional view of the jig for electrolytic plating shown in FIG. It is the schematic explaining the outline of the electroplating apparatus which electrolyzes the wafer accommodated in the jig | tool for electroplating shown in FIG.

Explanation of symbols

DESCRIPTION OF SYMBOLS 10 Electrolytic-plating jig | tool 11a, 11c Copper foil 11b Resin tank 12 Multilayer board | substrate 12a, 12b, 12c Double-sided metal foil board | substrate (board | substrate)
13 Prepreg 14 Wafer accommodation hole 14f Flat part 16 Eaves part 18 Pad 20 Resin surface 21 Through hole 22 Via 24 Wafer 26 Protective film 28 Dry film 30 Slit

Claims (9)

In an electroplating jig that accommodates a wafer in which an electroplating bus line is provided at the peripheral edge on one side where electroplating is performed, and performs electroplating,
The electroplating jig is a multilayer substrate formed by laminating a plurality of substrates and having both surfaces made of metal layers,
When the wafer is accommodated in the wafer accommodation hole, the wafer accommodation hole formed in the multilayer substrate contacts the one surface side of the peripheral edge portion where the electrolytic plating bus line of the wafer is formed to support the wafer. As described above, a flange projecting inward along the inner wall surface of the wafer receiving hole is formed,
And each of the plurality of pads formed on one surface side of the collar portion and in contact with the electrolytic plating bus line is electrically connected to the metal layers forming both surfaces of the multilayer substrate. Electroplating jig to be used.   The jig for electrolytic plating according to claim 1, wherein the multilayer substrate is formed by laminating a plurality of double-sided metal foil substrates each having a resin layer formed of a metal foil in multiple layers by an adhesive layer.   The jig for electrolytic plating according to claim 1 or 2, wherein the flange portion is formed on one substrate forming the multilayer substrate.   The laminated surface with the other board | substrate of the board | substrate with which the collar part was formed is formed of the metal layer electrically connected to each pad formed in the one surface side of the said collar part. An electroplating jig according to claim 1.   The plurality of pads formed on one surface side of the collar portion and the metal layers forming both surfaces of the multilayer substrate are electrically connected by the via and the metal layer formed between the substrates. An electroplating jig according to claim 1.   6. The electrolytic plating according to claim 1, wherein a plurality of wafer accommodation holes are formed in the multilayer substrate, and a flange that protrudes inward is formed in each of the wafer accommodation holes. Jig.   The electrolytic plating jig according to claim 6, wherein a slit is formed between the wafer accommodation holes of the multilayer substrate. Using the electrolytic plating jig according to any one of claims 1 to 7, when performing electrolytic plating on a predetermined portion on one side of the wafer,
The electrolytic plating bus line formed on the peripheral edge of the one surface on which the electrolytic plating is performed is in contact with each of the pads formed in the flange portion in the wafer receiving hole of the electrolytic plating jig. After inserting into the wafer receiving hole,
Covering the entire surface of one surface side of the electroplating jig including the other surface side of the wafer with a film, and covering the entire surface of the other surface side of the electroplating jig with a resin layer,
Next, patterning is applied to the resin layer so as to expose a predetermined portion on one side where the electrolytic plating of the wafer is performed,
Thereafter, one of the plating electrodes is connected to at least one of the metal layers forming both surfaces of the multilayer substrate of the electrolytic plating jig immersed in the plating solution in the electrolytic plating tank, and electrolytic plating is applied to a predetermined portion of the wafer. Electrolytic plating method characterized by applying   The electrolytic plating method according to claim 8, wherein a resin layer made of a photosensitive resin layer is used as the resin layer.

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