WO2009041484A1 - Circuit substrate manufacturing method, and circuit substrate - Google Patents

Circuit substrate manufacturing method, and circuit substrate Download PDF

Info

Publication number
WO2009041484A1
WO2009041484A1 PCT/JP2008/067281 JP2008067281W WO2009041484A1 WO 2009041484 A1 WO2009041484 A1 WO 2009041484A1 JP 2008067281 W JP2008067281 W JP 2008067281W WO 2009041484 A1 WO2009041484 A1 WO 2009041484A1
Authority
WO
WIPO (PCT)
Prior art keywords
circuit substrate
laminated substrate
layer
laminated
ceramic layers
Prior art date
Application number
PCT/JP2008/067281
Other languages
French (fr)
Japanese (ja)
Inventor
Yoshiyuki Uchinono
Masahide Mutou
Takashi Shindo
Masaaki Minami
Tomoyoshi Tashiro
Original Assignee
Panasonic Electric Works Co., Ltd.
Kyocera Corporation
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Panasonic Electric Works Co., Ltd., Kyocera Corporation filed Critical Panasonic Electric Works Co., Ltd.
Publication of WO2009041484A1 publication Critical patent/WO2009041484A1/en

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/22—Secondary treatment of printed circuits
    • H05K3/24—Reinforcing the conductive pattern
    • H05K3/245—Reinforcing conductive patterns made by printing techniques or by other techniques for applying conductive pastes, inks or powders; Reinforcing other conductive patterns by such techniques
    • H05K3/246—Reinforcing conductive paste, ink or powder patterns by other methods, e.g. by plating
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/18—Printed circuits structurally associated with non-printed electric components
    • H05K1/182—Printed circuits structurally associated with non-printed electric components associated with components mounted in the printed circuit board, e.g. insert mounted components [IMC]
    • H05K1/183—Components mounted in and supported by recessed areas of the printed circuit board
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/03—Use of materials for the substrate
    • H05K1/0306—Inorganic insulating substrates, e.g. ceramic, glass
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/03—Conductive materials
    • H05K2201/0332—Structure of the conductor
    • H05K2201/0335—Layered conductors or foils
    • H05K2201/0347—Overplating, e.g. for reinforcing conductors or bumps; Plating over filled vias
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09818—Shape or layout details not covered by a single group of H05K2201/09009 - H05K2201/09809
    • H05K2201/09981—Metallised walls
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
    • H05K3/027—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed by irradiation, e.g. by photons, alpha or beta particles
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/403—Edge contacts; Windows or holes in the substrate having plural connections on the walls thereof
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
    • H05K3/4626—Manufacturing multilayer circuits by laminating two or more circuit boards characterised by the insulating layers or materials
    • H05K3/4629—Manufacturing multilayer circuits by laminating two or more circuit boards characterised by the insulating layers or materials laminating inorganic sheets comprising printed circuits, e.g. green ceramic sheets

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Manufacturing Of Printed Circuit Boards (AREA)
  • Manufacturing Of Printed Wiring (AREA)

Abstract

Provided is a circuit substrate including a laminated substrate having an inner layer interposed between at least two insulating ceramic layers, and an outer layer formed on a portion of the surface of the laminated substrate and connected with the inner layer. A manufacturing method for the circuit substrate comprises forming the inner layer on the inner face of one of the insulating ceramic layers by a pattern print, sintering the laminated insulating ceramic layers thereby to form the laminated substrate, forming a conductive backing layer on the surface of the laminated substrate, removing the backing layer on at least the boundary between that portion and the remainder of the surface of the laminated substrate with a laser beam, and forming a plated layer on that backing layer over that portion of the surface of the laminated substrate by feeding an electric power through the inner layer, thereby to form that outer layer.
PCT/JP2008/067281 2007-09-28 2008-09-25 Circuit substrate manufacturing method, and circuit substrate WO2009041484A1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2007-254846 2007-09-28
JP2007254846A JP4741563B2 (en) 2007-09-28 2007-09-28 Circuit board

Publications (1)

Publication Number Publication Date
WO2009041484A1 true WO2009041484A1 (en) 2009-04-02

Family

ID=40511367

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2008/067281 WO2009041484A1 (en) 2007-09-28 2008-09-25 Circuit substrate manufacturing method, and circuit substrate

Country Status (3)

Country Link
JP (1) JP4741563B2 (en)
TW (1) TW200930198A (en)
WO (1) WO2009041484A1 (en)

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003133690A (en) * 2001-10-26 2003-05-09 Matsushita Electric Works Ltd Method for forming circuit by using ultra short pulse laser
JP2003283130A (en) * 2002-03-20 2003-10-03 Sumitomo Metal Electronics Devices Inc Manufacturing method for ceramic multi-layer substrate
JP2004349564A (en) * 2003-05-23 2004-12-09 Kyocera Corp Multipiece wiring board
JP2006024878A (en) * 2004-06-11 2006-01-26 Ngk Spark Plug Co Ltd Wiring board of multiple allocation and its manufacturing method

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003133690A (en) * 2001-10-26 2003-05-09 Matsushita Electric Works Ltd Method for forming circuit by using ultra short pulse laser
JP2003283130A (en) * 2002-03-20 2003-10-03 Sumitomo Metal Electronics Devices Inc Manufacturing method for ceramic multi-layer substrate
JP2004349564A (en) * 2003-05-23 2004-12-09 Kyocera Corp Multipiece wiring board
JP2006024878A (en) * 2004-06-11 2006-01-26 Ngk Spark Plug Co Ltd Wiring board of multiple allocation and its manufacturing method

Also Published As

Publication number Publication date
TW200930198A (en) 2009-07-01
JP4741563B2 (en) 2011-08-03
JP2009088171A (en) 2009-04-23

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