JP4652562B2 - メモリ制御装置 - Google Patents

メモリ制御装置 Download PDF

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Publication number
JP4652562B2
JP4652562B2 JP2000395916A JP2000395916A JP4652562B2 JP 4652562 B2 JP4652562 B2 JP 4652562B2 JP 2000395916 A JP2000395916 A JP 2000395916A JP 2000395916 A JP2000395916 A JP 2000395916A JP 4652562 B2 JP4652562 B2 JP 4652562B2
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JP
Japan
Prior art keywords
signal
memory
control
clock signal
sdram
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Expired - Fee Related
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JP2000395916A
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English (en)
Japanese (ja)
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JP2002197863A5 (enExample
JP2002197863A (ja
Inventor
宏泰 井手
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Canon Inc
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Canon Inc
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Priority to JP2000395916A priority Critical patent/JP4652562B2/ja
Publication of JP2002197863A publication Critical patent/JP2002197863A/ja
Publication of JP2002197863A5 publication Critical patent/JP2002197863A5/ja
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Publication of JP4652562B2 publication Critical patent/JP4652562B2/ja
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JP2000395916A 2000-12-26 2000-12-26 メモリ制御装置 Expired - Fee Related JP4652562B2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2000395916A JP4652562B2 (ja) 2000-12-26 2000-12-26 メモリ制御装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2000395916A JP4652562B2 (ja) 2000-12-26 2000-12-26 メモリ制御装置

Publications (3)

Publication Number Publication Date
JP2002197863A JP2002197863A (ja) 2002-07-12
JP2002197863A5 JP2002197863A5 (enExample) 2008-02-14
JP4652562B2 true JP4652562B2 (ja) 2011-03-16

Family

ID=18861294

Family Applications (1)

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JP2000395916A Expired - Fee Related JP4652562B2 (ja) 2000-12-26 2000-12-26 メモリ制御装置

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JP (1) JP4652562B2 (enExample)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003044349A (ja) * 2001-07-30 2003-02-14 Elpida Memory Inc レジスタ及び信号生成方法
US7586355B2 (en) * 2007-07-11 2009-09-08 United Memories, Inc. Low skew clock distribution tree

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6115318A (en) * 1996-12-03 2000-09-05 Micron Technology, Inc. Clock vernier adjustment
WO1999000734A1 (en) * 1997-06-27 1999-01-07 Hitachi, Ltd. Memory module and data processing system
JP2000163308A (ja) * 1998-11-25 2000-06-16 Melco Inc メモリ装置
JP3173728B2 (ja) * 1998-12-07 2001-06-04 日本電気株式会社 半導体装置

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Publication number Publication date
JP2002197863A (ja) 2002-07-12

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