JP4645671B2 - 薄膜トランジスタの製造方法 - Google Patents
薄膜トランジスタの製造方法 Download PDFInfo
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- JP4645671B2 JP4645671B2 JP2008090605A JP2008090605A JP4645671B2 JP 4645671 B2 JP4645671 B2 JP 4645671B2 JP 2008090605 A JP2008090605 A JP 2008090605A JP 2008090605 A JP2008090605 A JP 2008090605A JP 4645671 B2 JP4645671 B2 JP 4645671B2
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- HCZBMENVWKFZDJ-UHFFFAOYSA-N 3-trimethylsilylpropane-1-thiol Chemical compound C[Si](C)(C)CCCS HCZBMENVWKFZDJ-UHFFFAOYSA-N 0.000 description 4
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- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 description 1
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- HCHKCACWOHOZIP-UHFFFAOYSA-N Zinc Chemical compound [Zn] HCHKCACWOHOZIP-UHFFFAOYSA-N 0.000 description 1
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Classifications
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
- H10K71/60—Forming conductive regions or layers, e.g. electrodes
- H10K71/611—Forming conductive regions or layers, e.g. electrodes using printing deposition, e.g. ink jet printing
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K10/00—Organic devices specially adapted for rectifying, amplifying, oscillating or switching; Organic capacitors or resistors having potential barriers
- H10K10/80—Constructional details
- H10K10/82—Electrodes
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
- H10K71/60—Forming conductive regions or layers, e.g. electrodes
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- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Thin Film Transistor (AREA)
Description
2 基板
3 ソース電極
4 ドレイン電極
5 ゲート絶縁層
6 ゲート電極
7 表面無機化膜
8 表面無機化膜
9 表面無機化膜
14 バリア膜
15,16 金メッキ層
17 半導体層
19 スタンプ
60 めっき層
Claims (5)
- ポリマーから構成された基板上に絶縁層と、前記絶縁層の表面に形成されるソース電極及びドレイン電極と、前記ソース電極と前記ドレイン電極との間に形成される半導体層と、ゲート電極とを有する薄膜トランジスタの製造方法であって、
前記基板上にゲート電極を形成するゲート電極形成工程と、
前記ゲート電極を覆うように前記基板上に前記絶縁層を形成するゲート絶縁層形成工程と、
前記絶縁層上に、ソース電極及びドレイン電極を互いに離間して形成するソース・ドレイン電極形成工程と、
前記ソース電極及び前記ドレイン電極間の前記絶縁層上に半導体層を形成する半導体層形成工程とを備え、
前記ゲート電極形成工程及び前記ソース・ドレイン電極形成工程のうち、少なくともどちらか一方の電極形成工程で、前記電極の形成と同時に、前記基板の電極が形成される側と反対側の面に酸素及び水分の透過を防止するバリア膜を形成することを特徴とする薄膜トランジスタの製造方法。 - ポリマーから構成された基板上に絶縁層と、前記絶縁層の表面に形成されるゲート電極と、ソース電極及びドレイン電極と、前記ソース電極と前記ドレイン電極との間に形成される半導体層とを有する薄膜トランジスタの製造方法であって、
前記基板上にソース電極及びドレイン電極を互いに離間して形成するソース・ドレイン電極形成工程と、
前記ソース電極及び前記ドレイン電極間に半導体層を形成する半導体層形成工程と、
前記ソース電極、前記ドレイン電極及び前記半導体層を覆うように絶縁層を形成するゲート絶縁層形成工程と、
前記ゲート絶縁層形成工程で形成された前記絶縁層上に、ゲート電極を形成するゲート電極形成工程とを備え、
前記ソース・ドレイン電極形成工程及び前記ゲート電極形成工程のうち、少なくともどちらか一方の電極形成工程で、前記電極の形成と同時に、前記基板の電極が形成される側と反対側の面に酸素及び水分の透過を防止するバリア膜を形成することを特徴とする薄膜トランジスタの製造方法。 - 前記ゲート電極、前記ソース電極、前記ドレイン電極のうち、少なくとも一つの電極と、前記バリア膜が無電解メッキ法により形成されることを特徴とする請求項1又は2に記載の薄膜トランジスタの製造方法。
- 前記基板及び前記絶縁層のうち、少なくともどちらか一方の表面には、自己組織化単分子膜を形成するための表面無機化膜が形成され、
当該表面無機化膜上に自己組織化単分子膜が形成されていることを特徴とする請求項1乃至3の何れかに記載の薄膜トランジスタの製造方法。 - 前記ゲート電極、前記ソース電極及び前記ドレイン電極の形成時には、マイクロコンタクトプリント法により自己組織化単分子膜を形成し、その後、前記ゲート電極、前記ソース電極及び前記ドレイン電極を形成することを特徴とする請求項1乃至4の何れかに記載の薄膜トランジスタの製造方法。
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2008090605A JP4645671B2 (ja) | 2008-03-31 | 2008-03-31 | 薄膜トランジスタの製造方法 |
PCT/JP2009/053315 WO2009122823A1 (ja) | 2008-03-31 | 2009-02-25 | 薄膜トランジスタの製造方法及びその製造方法により製造された薄膜トランジスタ |
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JP2008090605A JP4645671B2 (ja) | 2008-03-31 | 2008-03-31 | 薄膜トランジスタの製造方法 |
Publications (2)
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JP2009246123A JP2009246123A (ja) | 2009-10-22 |
JP4645671B2 true JP4645671B2 (ja) | 2011-03-09 |
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JP2008090605A Expired - Fee Related JP4645671B2 (ja) | 2008-03-31 | 2008-03-31 | 薄膜トランジスタの製造方法 |
Country Status (2)
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JP (1) | JP4645671B2 (ja) |
WO (1) | WO2009122823A1 (ja) |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
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US20120199822A1 (en) * | 2009-11-25 | 2012-08-09 | Sharp Kabushiki Kaisha | Organic transistor |
GB2481367B (en) | 2010-06-04 | 2015-01-14 | Plastic Logic Ltd | Moisture Barrier for Electronic Devices |
WO2013176247A1 (ja) * | 2012-05-25 | 2013-11-28 | 株式会社ニコン | トランジスタの製造方法およびトランジスタ |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2000004022A (ja) * | 1998-06-16 | 2000-01-07 | Sony Corp | 薄膜トランジスタの製造方法 |
JP2004134694A (ja) * | 2002-10-15 | 2004-04-30 | Toppan Printing Co Ltd | 有機薄膜トランジスタとその製造方法 |
JP2005303262A (ja) * | 2004-03-18 | 2005-10-27 | Sharp Corp | アクティブマトリクス基板、その製造装置、及び表示デバイス |
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2008
- 2008-03-31 JP JP2008090605A patent/JP4645671B2/ja not_active Expired - Fee Related
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2009
- 2009-02-25 WO PCT/JP2009/053315 patent/WO2009122823A1/ja active Application Filing
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2000004022A (ja) * | 1998-06-16 | 2000-01-07 | Sony Corp | 薄膜トランジスタの製造方法 |
JP2004134694A (ja) * | 2002-10-15 | 2004-04-30 | Toppan Printing Co Ltd | 有機薄膜トランジスタとその製造方法 |
JP2005303262A (ja) * | 2004-03-18 | 2005-10-27 | Sharp Corp | アクティブマトリクス基板、その製造装置、及び表示デバイス |
Also Published As
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WO2009122823A1 (ja) | 2009-10-08 |
JP2009246123A (ja) | 2009-10-22 |
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