JP4606565B2 - 同期型半導体記憶装置 - Google Patents

同期型半導体記憶装置 Download PDF

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Publication number
JP4606565B2
JP4606565B2 JP2000335603A JP2000335603A JP4606565B2 JP 4606565 B2 JP4606565 B2 JP 4606565B2 JP 2000335603 A JP2000335603 A JP 2000335603A JP 2000335603 A JP2000335603 A JP 2000335603A JP 4606565 B2 JP4606565 B2 JP 4606565B2
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JP
Japan
Prior art keywords
circuit
signal
frequency
semiconductor memory
memory device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2000335603A
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English (en)
Japanese (ja)
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JP2002140891A5 (enExample
JP2002140891A (ja
Inventor
充洋 東保
一 佐藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Semiconductor Ltd
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Fujitsu Semiconductor Ltd
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Filing date
Publication date
Application filed by Fujitsu Semiconductor Ltd filed Critical Fujitsu Semiconductor Ltd
Priority to JP2000335603A priority Critical patent/JP4606565B2/ja
Priority to US09/907,910 priority patent/US6618310B2/en
Publication of JP2002140891A publication Critical patent/JP2002140891A/ja
Publication of JP2002140891A5 publication Critical patent/JP2002140891A5/ja
Application granted granted Critical
Publication of JP4606565B2 publication Critical patent/JP4606565B2/ja
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Expired - Fee Related legal-status Critical Current

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    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/02—Detection or location of defective auxiliary circuits, e.g. defective refresh counters
    • G11C29/028—Detection or location of defective auxiliary circuits, e.g. defective refresh counters with adaption or trimming of parameters
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/406—Management or control of the refreshing or charge-regeneration cycles
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/4076—Timing circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/50—Marginal testing, e.g. race, voltage or current testing
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/22—Read-write [R-W] timing or clocking circuits; Read-write [R-W] control signal generators or management 
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/22—Read-write [R-W] timing or clocking circuits; Read-write [R-W] control signal generators or management 
    • G11C7/222—Clock generating, synchronizing or distributing circuits within memory device
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Dram (AREA)
JP2000335603A 2000-11-02 2000-11-02 同期型半導体記憶装置 Expired - Fee Related JP4606565B2 (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2000335603A JP4606565B2 (ja) 2000-11-02 2000-11-02 同期型半導体記憶装置
US09/907,910 US6618310B2 (en) 2000-11-02 2001-07-19 Synchronous semiconductor memory device and refresh method thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2000335603A JP4606565B2 (ja) 2000-11-02 2000-11-02 同期型半導体記憶装置

Publications (3)

Publication Number Publication Date
JP2002140891A JP2002140891A (ja) 2002-05-17
JP2002140891A5 JP2002140891A5 (enExample) 2006-10-12
JP4606565B2 true JP4606565B2 (ja) 2011-01-05

Family

ID=18811318

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2000335603A Expired - Fee Related JP4606565B2 (ja) 2000-11-02 2000-11-02 同期型半導体記憶装置

Country Status (2)

Country Link
US (1) US6618310B2 (enExample)
JP (1) JP4606565B2 (enExample)

Families Citing this family (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6513103B1 (en) * 1997-10-10 2003-01-28 Rambus Inc. Method and apparatus for adjusting the performance of a synchronous memory system
DE10302292B3 (de) * 2003-01-22 2004-04-29 Infineon Technologies Ag Verfahren und Regelschaltung zum Auffrischen von dynamischen Speicherzellen
KR100493054B1 (ko) * 2003-03-04 2005-06-02 삼성전자주식회사 지연동기 루프를 구비하는 반도체 장치 및 지연동기 루프제어방법
KR100611775B1 (ko) * 2003-12-29 2006-08-10 주식회사 하이닉스반도체 온도변화에 따라 최적의 리프레쉬 주기를 가지는 반도체메모리 장치
JP2006073062A (ja) * 2004-08-31 2006-03-16 Toshiba Corp 半導体記憶装置
JP2006146992A (ja) * 2004-11-16 2006-06-08 Elpida Memory Inc 半導体メモリ装置
US7206244B2 (en) * 2004-12-01 2007-04-17 Freescale Semiconductor, Inc. Temperature based DRAM refresh
KR100646271B1 (ko) * 2005-12-08 2006-11-23 주식회사 하이닉스반도체 반도체 메모리 장치
JP5038742B2 (ja) * 2007-03-01 2012-10-03 ルネサスエレクトロニクス株式会社 セルフリフレッシュ制御回路、半導体装置
KR100856060B1 (ko) * 2007-04-06 2008-09-02 주식회사 하이닉스반도체 반도체메모리소자의 내부리프레쉬신호 생성장치
WO2009150844A1 (ja) * 2008-06-12 2009-12-17 パナソニック株式会社 半導体記憶装置、半導体装置、および光ディスク再生装置
JP5439955B2 (ja) 2009-06-01 2014-03-12 富士通セミコンダクター株式会社 半導体メモリおよびシステム
US11373698B2 (en) * 2017-05-26 2022-06-28 SK Hynix Inc. Semiconductor device, semiconductor system including the same and operating method for a semiconductor system
US10848165B1 (en) * 2019-05-21 2020-11-24 Silicon Laboratories Inc. Performing low power refresh of a digital-to-analog converter circuit
US10892764B1 (en) * 2020-08-14 2021-01-12 Winbond Electronics Corp. Delay locked loop device and update method thereof
CN114333972B (zh) * 2020-09-30 2023-09-01 长鑫存储技术有限公司 自刷新周期测试方法及装置
WO2022068127A1 (zh) 2020-09-30 2022-04-07 长鑫存储技术有限公司 自刷新周期测试方法及装置、自动刷新次数测试方法及装置

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05217369A (ja) 1992-01-31 1993-08-27 Fujitsu Ltd 半導体記憶装置のリフレッシュタイマ
JP3137422B2 (ja) 1992-04-28 2001-02-19 富士通株式会社 オシレータ回路
JPH0621776A (ja) 1992-07-01 1994-01-28 Sanyo Electric Co Ltd 電圧制御型発振回路
KR950010624B1 (ko) 1993-07-14 1995-09-20 삼성전자주식회사 반도체 메모리장치의 셀프리프레시 주기조절회로
KR0171930B1 (ko) * 1993-12-15 1999-03-30 모리시다 요이치 반도체 메모리, 동화기억 메모리, 동화기억장치, 동화표시장치, 정지화기억 메모리 및 전자노트
JP3489906B2 (ja) * 1995-04-18 2004-01-26 松下電器産業株式会社 半導体メモリ装置
WO1998025304A1 (en) * 1996-12-04 1998-06-11 Hitachi, Ltd. Semiconductor device
JPH1131383A (ja) 1997-07-08 1999-02-02 Hitachi Ltd 半導体記憶装置
JP4339995B2 (ja) * 1999-11-16 2009-10-07 パナソニック株式会社 半導体記憶装置

Also Published As

Publication number Publication date
US6618310B2 (en) 2003-09-09
JP2002140891A (ja) 2002-05-17
US20020051396A1 (en) 2002-05-02

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