JP4584075B2 - 半導体装置の作製方法 - Google Patents

半導体装置の作製方法 Download PDF

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Publication number
JP4584075B2
JP4584075B2 JP2005249781A JP2005249781A JP4584075B2 JP 4584075 B2 JP4584075 B2 JP 4584075B2 JP 2005249781 A JP2005249781 A JP 2005249781A JP 2005249781 A JP2005249781 A JP 2005249781A JP 4584075 B2 JP4584075 B2 JP 4584075B2
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Japan
Prior art keywords
film
semiconductor
insulating layer
layer
light
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Expired - Fee Related
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JP2005249781A
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Japanese (ja)
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JP2006100810A (ja
JP2006100810A5 (enExample
Inventor
理 中村
裕子 山本
淳子 佐藤
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Semiconductor Energy Laboratory Co Ltd
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Semiconductor Energy Laboratory Co Ltd
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Priority to JP2005249781A priority Critical patent/JP4584075B2/ja
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Publication of JP2006100810A5 publication Critical patent/JP2006100810A5/ja
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Publication of JP4584075B2 publication Critical patent/JP4584075B2/ja
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  • Recrystallisation Techniques (AREA)
  • Drying Of Semiconductors (AREA)
  • Weting (AREA)
  • Formation Of Insulating Films (AREA)
  • Thin Film Transistor (AREA)
JP2005249781A 2004-08-31 2005-08-30 半導体装置の作製方法 Expired - Fee Related JP4584075B2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2005249781A JP4584075B2 (ja) 2004-08-31 2005-08-30 半導体装置の作製方法

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2004252497 2004-08-31
JP2005249781A JP4584075B2 (ja) 2004-08-31 2005-08-30 半導体装置の作製方法

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JP2006100810A JP2006100810A (ja) 2006-04-13
JP2006100810A5 JP2006100810A5 (enExample) 2008-09-18
JP4584075B2 true JP4584075B2 (ja) 2010-11-17

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JP2005249781A Expired - Fee Related JP4584075B2 (ja) 2004-08-31 2005-08-30 半導体装置の作製方法

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Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20070212649A1 (en) * 2006-03-07 2007-09-13 Asml Netherlands B.V. Method and system for enhanced lithographic patterning
JP5314842B2 (ja) * 2006-08-25 2013-10-16 株式会社半導体エネルギー研究所 半導体装置の作製方法
JP5329784B2 (ja) * 2006-08-25 2013-10-30 株式会社半導体エネルギー研究所 半導体装置の作製方法
JP5305630B2 (ja) * 2006-12-05 2013-10-02 キヤノン株式会社 ボトムゲート型薄膜トランジスタの製造方法及び表示装置の製造方法
JP5121254B2 (ja) * 2007-02-28 2013-01-16 キヤノン株式会社 薄膜トランジスタおよび表示装置
DE102009015604A1 (de) 2009-04-02 2010-10-07 Siemens Aktiengesellschaft Verfahren zur Strukturierung einer auf einem Substrat befindlichen Schicht mit mehreren Lagen
JP6030455B2 (ja) * 2013-01-16 2016-11-24 東京エレクトロン株式会社 シリコン酸化物膜の成膜方法
JP6739958B2 (ja) * 2016-03-24 2020-08-12 日本放送協会 ポリマー構造の製造方法

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004356637A (ja) * 2003-05-07 2004-12-16 Fumimasa Yo 薄膜トランジスタ及びその製造方法

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JP2006100810A (ja) 2006-04-13

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