JP4549458B2 - Ｄｍａ転送装置 - Google Patents

Ｄｍａ転送装置 Download PDF

Info

Publication number
JP4549458B2
JP4549458B2 JP10690399A JP10690399A JP4549458B2 JP 4549458 B2 JP4549458 B2 JP 4549458B2 JP 10690399 A JP10690399 A JP 10690399A JP 10690399 A JP10690399 A JP 10690399A JP 4549458 B2 JP4549458 B2 JP 4549458B2
Authority
JP
Japan
Prior art keywords
signal
mask
cpu
dreq
dma
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP10690399A
Other languages
English (en)
Japanese (ja)
Other versions
JP2000298638A5 (enrdf_load_stackoverflow
JP2000298638A (ja
Inventor
栄次 我妻
博 上野
Original Assignee
株式会社沖データ
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 株式会社沖データ filed Critical 株式会社沖データ
Priority to JP10690399A priority Critical patent/JP4549458B2/ja
Publication of JP2000298638A publication Critical patent/JP2000298638A/ja
Publication of JP2000298638A5 publication Critical patent/JP2000298638A5/ja
Application granted granted Critical
Publication of JP4549458B2 publication Critical patent/JP4549458B2/ja
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Images

Landscapes

  • Bus Control (AREA)
JP10690399A 1999-04-14 1999-04-14 Ｄｍａ転送装置 Expired - Fee Related JP4549458B2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10690399A JP4549458B2 (ja) 1999-04-14 1999-04-14 Ｄｍａ転送装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10690399A JP4549458B2 (ja) 1999-04-14 1999-04-14 Ｄｍａ転送装置

Publications (3)

Publication Number Publication Date
JP2000298638A JP2000298638A (ja) 2000-10-24
JP2000298638A5 JP2000298638A5 (enrdf_load_stackoverflow) 2005-10-27
JP4549458B2 true JP4549458B2 (ja) 2010-09-22

Family

ID=14445427

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10690399A Expired - Fee Related JP4549458B2 (ja) 1999-04-14 1999-04-14 Ｄｍａ転送装置

Country Status (1)

Country Link
JP (1) JP4549458B2 (enrdf_load_stackoverflow)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005352666A (ja) * 2004-06-09 2005-12-22 Murata Mach Ltd Ｄｍａコントローラ及びｄｍａ制御方法
KR101214068B1 (ko) 2006-02-03 2012-12-20 삼성전자주식회사 직접 메모리 액세스 제어부에서 버스 제어 방법 및 장치
JP5332692B2 (ja) * 2009-02-16 2013-11-06 株式会社リコー データ転送制御装置、データ転送制御方法、データ転送制御プログラム及び記録媒体

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60205652A (ja) * 1984-03-29 1985-10-17 Hitachi Ltd Ｄｍａ転送方式
JPS63214860A (ja) * 1987-03-03 1988-09-07 Toshiba Corp Ｄｍａ装置
JP2579081B2 (ja) * 1991-08-15 1997-02-05 株式会社ピーエフユー 禁止時間付競合調停方式

Also Published As

Publication number Publication date
JP2000298638A (ja) 2000-10-24

Similar Documents

Publication Publication Date Title
US5572686A (en) Bus arbitration scheme with priority switching and timer
JP3604398B2 (ja) 並列パケット化されたモジュール期調停高速制御およびデータバス
JP4457168B2 (ja) 資源要求調停装置、資源要求調停方法、及び、コンピュータプログラム
JP4778199B2 (ja) データ転送装置及びデータ転送方法
US7062582B1 (en) Method and apparatus for bus arbitration dynamic priority based on waiting period
US5761450A (en) Bus bridge circuit flushing buffer to a bus during one acquire/relinquish cycle by providing empty address indications
JP2010286983A (ja) バス調停回路及びバス調停方法
US20080270658A1 (en) Processor system, bus controlling method, and semiconductor device
US20060155903A1 (en) Resource management device
JP2004005677A (ja) 集積回路装置のバスアービター
JP4549458B2 (ja) Ｄｍａ転送装置
US6571306B1 (en) Bus request mechanism for bus master which is parked on a shared bus
US6105082A (en) Data processor used in a data transfer system which includes a detection circuit for detecting whether processor uses bus in a forthcoming cycle
JP5677007B2 (ja) バス調停装置、バス調停方法
JP4309508B2 (ja) Ｄｍａ制御装置
JPS594733B2 (ja) キヨウツウバスセイギヨカイロ
JP2008059047A (ja) 情報処理システム及びこの制御方法
JP2003006139A (ja) Ｄｍａ転送装置
JP2021196681A (ja) 半導体装置
JP2001117860A (ja) メモリアクセス優先順位切替制御装置
JP2004005589A (ja) 資源要求調停装置、資源要求調停方法、及び、コンピュータプログラム
US7747806B2 (en) Resource use management device, resource use management system, and control method for a resource use management device
JPH10334042A (ja) バス調停制御装置及びバス調停制御方法並びにバス調停制御プログラムを記録した記録媒体
JP4898527B2 (ja) リソース使用管理装置、リソース使用管理システム及びリソース使用管理装置の制御方法
JP5494925B2 (ja) 半導体集積回路、情報処理装置およびプロセッサ性能保証方法

Legal Events

Date Code Title Description
A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20050824

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20050829

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20080529

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20080708

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20080905

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20090331

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20090525

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20091124

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20100121

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20100706

A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20100707

R150 Certificate of patent or registration of utility model

Free format text: JAPANESE INTERMEDIATE CODE: R150

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20130716

Year of fee payment: 3

LAPS Cancellation because of no payment of annual fees